Need an answer for a customer (see below).  Thanks;

We are using the Texas Instruments DM3730 System on Chip (SoC) and the TPS65930 Power Management Integrated Circuit (PMIC).

 Our current system clock in set to 38.4MHz and we have some offending harmonics from this in the GPS L1 band (1575.42 MHz).  The harmonic we are seeing is at 1574.4MHz which is the 41^st harmonic.

 We were looking at possibly using a different system clock frequency but found that this selection may not be possible.  Specifically there are comments and app notes which identify problems with particular frequencies.

 The TI Silicon Errata revised on May 2011 indicates that 12 MHz, 13 MHz, and 19.2 MHz could have issues waking up from off mode when initializing the DDR interface.  Only 26 MHz and 38.4 MHz are indicated as supported.

 The TI Silicon Errata revised on January 2012 indicates that both 13 MHz and 26 MHz could have long term frequency drift on HSUSBx_CLK which could cause an external USB PHY to create occasional out of spec transmit signal rate on USB bus.

 This leaves us with only 38.4 MHz as an available option.  Are these issues still current or have some of these been resolved?  I thought I had seen some other clock frequency issues listed in the e2e forum but cannot seem to find them now.

 Thanks,

Hi, All

My system is am3354 based. A splash is required in u-boot. With migrating da8xx-fb.c, the LCD hardware can be setup correctly, but failed when display splash bmp image which is read from NAND. The following are message about the error:

U-Boot SPL 2013.10 (Jan 06 2014 - 14:10:46)
The Expected Linux image was not found. Please check your NAND configuration.
Trying to start u-boot now...

U-Boot 2013.10 (Jan 06 2014 - 14:10:46)

I2C: ready
DRAM: 256 MiB
WARNING: Caches not enabled
NAND: 256 MiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
rev: 0x4f201000 Resolution: 800x480 32
LCD Clock: 200000000 Divider: 6 PixClk: 33300000
Requesting 0x177000 bytes for framebuffer at 0x82000000
data abort

MAYBE you should read doc/README.arm-unaligned-accesses

pc : [<8f77bd74>] lr : [<8f77c82c>]
sp : 8f62adf8 ip : 8f651541 fp : 80813d34
r10: 84000000 r9 : 8f62af30 r8 : 4030cdcc
r7 : 4030cb7c r6 : 8f651538 r5 : 8ffbcc0c r4 : 8ffbcc10
r3 : 0000004d r2 : 00000000 r1 : 00000000 r0 : 84000000
Flags: nZCv IRQs off FIQs on Mode SVC_32
Resetting CPU ...

There are following MACROs about video display in file am335x_evm.h:

#define CONFIG_VIDEO
#if defined(CONFIG_VIDEO)
#define CONFIG_VIDEO_DA8XX
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_CMD_BMP
#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE /* am335x LCD base */
#define PWM_TICKS 0x1388
#define PWM_DUTY 0x200
#define CONFIG_SPLASH_OFFSET 0x00180000 /* for block size = 128KB, block_id = 12 */
#define CONFIG_SPLASH_ADDRESS 0x8f000000 /* the last 16MB of DDR3 (256MB) */
#endif

When u-boot startup, DENX logo can be displayed on upper-left of screen. Command clrlogo can clean that logo, but command bmp info will results the same error above.

I don't quite understand what's exactly mean of "arm-unaligned-accesses", is it related to armv7? It's highly appreciated for any suggestion and hits, thanks!

BR

Cheng Shi

emtronix

Hi, I received the AFE4490SPO2EVM and also a "free" finger type oximeter sensor. I installed the software and the EVM is being detected properly. But when I try the oximeter sensor on my finger, the graphs in ADC capture and analysis look some different than oximeter graphs or photo plethesmogram signals.

I have attached a screen shot.

I am as yet studying the setting of registers of AFE4490.

What am I doing wrong ? Please suggest me.

Regards

Devidas

Hi :)

I have a CC2540 based device and in general the BTLE connection is extremely stable when my device is on the table for testing. But if I put it on my body I tend to get some sporadic disconnections now and then... Most likely a hardware issue, ESD, whatever...

But is it possible in the device software to get more information about why a disconnection event occured?

Thanks :)

Hi, All

There are always a warning message on u-boot start:

U-Boot 2013.10 (Jan 06 2014 - 14:10:46)

I2C: ready
DRAM: 256 MiB
WARNING: Caches not enabled
NAND: 256 MiB

I just implement splash bmp display which is slow, so that I believe the cache is NOT enabled really. Thanks for any suggestion to fix the issue. 

Another issue of speed is nand read which take quite a few seconds to load zImage into DDR3. Are there any patch available to speed up nand reading in em335x_evm? Thanks.

BR

Cheng Shi

emtronix

Hello,

I had develop a Software with the Version: 4.2.4.0004.2.5.00005 after a update from the Network in my compagny (from Windows XP to Windows 7) I had to reinstall CCS 4.2.5.00005.

A the begining I download vers.: 4.2.4.00033 with this page: http://processors.wiki.ti.com/index.php/Download_CCS

In a second time alway with this page: http://processors.wiki.ti.com/index.php/Download_CCS I loaded CCS 4.2.5.00005.

During the update this ERROR appears:

Error in action ExecuteAction

Error in action ExecuteAction

Error in action ExecuteAction

Error in action ExecuteScript

missing close-bracket
    while executing
"::InstallJammer::actions::$component $this"
    while executing
"$obj execute"
    (procedure "::InstallJammer::ExecuteActions" line 62)
    invoked from within
"::InstallJammer::ExecuteActions $action -parent $id -conditions $eval"
    (procedure "::InstallJammer::actions::ExecuteAction" line 35)
    invoked from within
"::InstallJammer::actions::$component $this"
    while executing
"$obj execute"
    (procedure "::InstallJammer::ExecuteActions" line 62)
    invoked from within
"::InstallJammer::ExecuteActions $action -parent $id -conditions $eval"
    (procedure "::InstallJammer::actions::ExecuteAction" line 35)
    invoked from within
"::InstallJammer::actions::$component $this"
    while executing
"$obj execute"
    (procedure "::InstallJammer::ExecuteActions" line 62)
    invoked from within
"::InstallJammer::ExecuteActions $action -parent $id -conditions $eval"
    (procedure "::InstallJammer::actions::ExecuteAction" line 35)
    invoked from within
"::InstallJammer::actions::$component $this"
Error in action ExecuteAction

Error in action ExecuteAction

Error in action ExecuteAction

Error in action ExecuteScript

missing close-bracket
    while executing
"::InstallJammer::actions::$component $this"
    while executing
"$obj execute"
    (procedure "::InstallJammer::ExecuteActions" line 62)
    invoked from within
"::InstallJammer::ExecuteActions $action -parent $id -conditions $eval"
    (procedure "::InstallJammer::actions::ExecuteAction" line 35)
    invoked from within
"::InstallJammer::actions::$component $this"
    while executing
"$obj execute"
    (procedure "::InstallJammer::ExecuteActions" line 62)
    invoked from within
"::InstallJammer::ExecuteActions $action -parent $id -conditions $eval"
    (procedure "::InstallJammer::actions::ExecuteAction" line 35)
    invoked from within
"::InstallJammer::actions::$component $this"
    while executing
"$obj execute"
    (procedure "::InstallJammer::ExecuteActions" line 62)
    invoked from within
"::InstallJammer::ExecuteActions $action -parent $id -conditions $eval"
    (procedure "::InstallJammer::actions::ExecuteAction" line 35)
    invoked from within
"::InstallJammer::actions::$component $this"
    while executing
"$obj execute"
    (procedure "::InstallJammer::ExecuteActions" line 62)
    invoked from within
"::InstallJammer::ExecuteActions $id -when $when"
    (procedure "::InstallJammer::RaiseEventHandler" line 79)
    invoked from within
"::InstallJammer::RaiseEventHandler  .wizard"
    (command bound to event)

Hi TI folks,

We can't find *any* information on how you set the "General Purpose IO. Open-drain I/O" RA0 pin on the BQ27741-G1. Is this pin actually available as an general purpose open drain output? If so, how does one turn it on and off? If it's available, the datasheet should be revised to include this information.

Thanks, Andrew

As an alternative to the TSW1400, does anybody know a more-or-less off-the-shelf solution to stream from a high speed DAQ (e.g. AFE5803) directly to the memory of the host-PC in real-time and at the full rate on all channels (e.g. via USB3.0 or PCIe)?

Happy 2014,

Chris

Hello,

I am writing a bootloader and I have a problem. When it comes to programming the following step: "Initialize copy table, global variables, and constructors". I copied and pasted the following code, which is in the start up code I found in a development kit, but it isn't working. Do I have to use these variables somewhere else or is the compiler responsible for using them? PS: I'm using CCS 5.3

#pragma WEAK(__TI_Handler_Table_Base)
#pragma WEAK(__TI_Handler_Table_Limit)
#pragma WEAK(__TI_CINIT_Base)
#pragma WEAK(__TI_CINIT_Limit)

extern unsigned int   __TI_Handler_Table_Base;
extern unsigned int   __TI_Handler_Table_Limit;
extern unsigned int   __TI_CINIT_Base;
extern unsigned int   __TI_CINIT_Limit;
extern unsigned int   __TI_PINIT_Base;
extern unsigned int   __TI_PINIT_Limit;
extern unsigned int * __binit__;



    /* initalise copy table */
    	if ((unsigned int *)&__binit__ != (unsigned int *)0xFFFFFFFFU)
    	{
    		extern void copy_in(void *binit);
    		copy_in((void *)&__binit__);
    	}

    	/* initalise the C global variables */
    	if (&__TI_Handler_Table_Base < &__TI_Handler_Table_Limit)
    	{
    		unsigned char **tablePtr   = (unsigned char **)&__TI_CINIT_Base;
    		unsigned char **tableLimit = (unsigned char **)&__TI_CINIT_Limit;

    		while (tablePtr < tableLimit)
    		{
    			unsigned char *loadAdr = *tablePtr++;
    			unsigned char *runAdr  = *tablePtr++;
    			unsigned char  idx     = *loadAdr++;
    			handler_fptr   handler = (handler_fptr)(&__TI_Handler_Table_Base)[idx];

    			(*handler)((const unsigned char *)loadAdr, runAdr);
    		}
    	}

    	/* initalise contructors */
    	if (__TI_PINIT_Base < __TI_PINIT_Limit)
    	{
    		void (**p0)() = (void *)__TI_PINIT_Base;

    		while ((unsigned int)p0 < __TI_PINIT_Limit) {
    			void (*p)() = *p0++;
    			p();
    		}
    	}

Hi everyone,

I found the section 12.8.2 of  spruhj1c.pdf explains how to covert Iq to Vq. There are two equation have been used in this conversation, Iq (R+DLs) = Vq-w(LsId+Ke), Id(R+DLs) = Vd + wLsIq, on page 321.

But the example code don't embody these term as above.  

Could you give me any hints? Thanks!

Eli

I am attempting to use the LCr4500 to interpret each color plane of the RGB24@60Hz HDMI input as a separate grayscale image to create a 180Hz grayscale output.  I understand that full 8-bit resolution per plane isn't available, but assume from table 4.1 in the LCr4500 User Guide that I should be able to use the HDMI input at 7bpp per plane.

I've tried numerous configurations within the GUI without success.  The settings which would seem most likely are

But this always gives a Sequence abort error. 

Is this mode of operation supported by the Lcr4500?  Is it supported by the GUI?

I'm attempting to run the FatFS library on the TI Hercule LaunchPad TMS570LS04x, preferably using the HALCoGen APIs for MibSPI/SPI.
I created a makeshift booster pack (http://youtu.be/iOUY6Z6C0jM) to break out the (Mib)SPI signals to a SD board.

Has someone over here done this exercise (or an attempt) before?
I searched the ti.e2e forum and looked at the similar posts that were proposed when I entered the subject of this post
and couldn't find any HALCoGen API related tries.

Hi,

I'm using the SimpliciTI protocol to create a network with one access point and twenty peers, the connection topology works exactly as the demo temperature from TI. How i will put the same firmware in all peers, all of them has the same DEVICE_ADDRESS, and sometimes when i turn ON the peer, the access point don't recognize the linkID peer as new and then the callback function just receive the frame without pass through this part of the code:

if (sJoinSem && (sNumCurrentPeers < NUM_CONNECTIONS))
{
BSP_TOGGLE_LED1();
/* listen for a new connection */
while (1)
{
if (SMPL_SUCCESS == SMPL_LinkListen(&sLID[sNumCurrentPeers]))
{
TXString((char *)success,sizeof success);
break;
}
/* Implement fail-to-link policy here. otherwise, listen again. */
} 

sNumCurrentPeers++;
BSP_ENTER_CRITICAL_SECTION(intState);
sJoinSem--;
BSP_EXIT_CRITICAL_SECTION(intState);
}

I had tested this in my code and when i tried to put the demo, the same thing occured. I would like to know if anyone had this kind of problem and how did resolved.

Thanks, Ânderson I. Silva

I am trying to write a programme where it is possible need to trasmit a string of numbers that can be from 1 to 3 digits long. How do I find out when the entire string has been sent and there are no more characters coming so once it's finished I can run the rest of the my code?

This is what my interrupt for receiving currently looks like,

#pragma vector=USCIAB0RX_VECTOR
__interrupt void USCI0RX_ISR(void)
{

		charData[++i] = UCA0RXBUF;

			if (menuLevel==1){
					UARTSendArray("Received command: ", 18);
					UARTSendArray(&charData[i], 1);
					UARTSendArray("\n\r", 2);
					modeToEdit=charData[1];
					menuLevel=2;
					i=0;
					UARTSendArray("Enter a value out of 100:", 25);
					UARTSendArray("\n\r", 2);
				} else if (menuLevel==2)
				{
					UARTSendArray("Received command: ", 18);
					for (j=1; j<4; j++)
					{
						intData[j]=charData[j];
						UARTSendArray(&charData[j], 1);
					}

					if (i=1)
					{
						dutyCycle[modeToEdit]=intData[1];
					} else if (i=2)
					{
						dutyCycle[modeToEdit]= concatenate(intData[1], intData[2]);
					}
					else
					{
						dutyCycle[modeToEdit]=100;
					}
					menuLevel=1;
					UARTSendArray("Please select which of the three modes you would like to edit: 1 2 or 3", 73);
					UARTSendArray("\n\r", 2);
				}

}

I was thinking of including an if statement that checks the status of the receive bit in the IFG2 flag. however I'm not entirely sure how the flag works and is set. Is the flag set 1 to whenever there's a charachter in the buffer to be read? Does it get set back to 0 when you read out of the buffer? If so when does it get set back to 0? I tried adding an if statement that said something like

if (~(IFG2&=UCA0RXIFG))

so if thebuffer is empty the flag is 0 so it will then pass the if statement, however this didn't work. Am I vaguely along the right lines? Any and all help is appreciated, let me know if you want the entire code for the programme for whatever reason or if you have any questions.

HI,

Do you have a reference design of MSP430F5232?

It will be useful to see how power and clock signals are routed as well as the data-lines.

Thank you.  

Hi Community

I have the TMS570LS04x and I´m trying to run a program with GIO port. I need a delay function but i dont know calculate the delay or clock cycles. I´m using the GCLK with 16MHz. Initality I think to use the instrict function __delay_cycles like MSP430 but on TMS570.

Somebody have an idea.

My customer is using CCS v3.3.  They are using my company's tool which
inserts instrumentation into their C++ source code.  This
instrumentation uses function-level static variables.  When the
function in question is an inline function, and the inline function is
defined in a header #included in multiple .cpp files, the linker
complains that the symbols associated with the function-level static
variables are defined in multiple .o files.

I've duplicated this problem.  In my case, I'm using the cl2000
compiler, whose help banner shows:

  TMS320C2000 C/C++ Compiler              v4.1.3
  Tools Copyright (c) 1996-2006 Texas Instruments Incorporated

  Usage: c:\ccstudio_v3.3\c2000\cgtools\bin\cl2000.exe [-options] filename

In my example, if the inline function is simply:

  inline int myinline(void)
  {
    static int my_static_int = 0;
    return my_static_int++;
  }

and I compile the .cpp files with:

  cl2000 -c -q -ml -v28 -mf -mt 1.cpp 2.cpp m.cpp

and I link with:

  cl2000 -z -q -c -w -x 1.obj 2.obj m.obj

I get this error:

  <Linking>
  >>   error: symbol ___LSG__my_static_int__L0__myinline__Fv is defined multiple
              times: 1.obj and 2.obj

Is there a way to avoid this problem?

Thanks.

David

Hello

I use XDS100v2 with my TMS57020216 custom board.for fast development  and debug I must use internal RAM.

first I change cmd file as below:

MEMORY{
    VECTORS   (X)  : origin=0x00000000 length=0x00000020
    RAM0         (RW) : origin=0x00000020 length=0x00002000
    RAM1      (RW) : origin=0x00002020 length=0x00025FE0
    FLASH     (RX) : origin=0x08000000 length=0x00200000
    RAM_ALIGN (RW) : origin=0x00031000 length=0x0000E000
}

SECTIONS{
    .intvecs : {} > VECTORS
    .text    : {} > RAM1
    .const   : {} > RAM1
    .cinit   : {} > RAM1
    .pinit   : {} > RAM1
    .bss     : {} > RAM1
    .data    : {} > RAM1
    .sysmem  : {} > RAM1
    .stack   : {} > RAM0
}

and also assign stack base address  to 0x00000000 instead of 0x08000000.

also I change tms570ls202x6sRAM.gel as attached file .after connection set  MemoryMap = RAM and after connect  swap_mem(RAM); added, so before load  program memory switch must done.but when I start debug it does not work and I must reload program to work properly. another problem is that interrupt not work in this situation.

an other question is about CCS5.5 , it  has some change copare to CCS5.1  and also in debug menu " load" item added.what is main different between these versions?

tvp5158 2d1 capture。

It's looks like lose some lines。 How to solve this problem？

configs：2 D1 ，54Mhz， 728*1250