From the LMH6629 data sheet, for most Gain vs Frequency curves, the bandwidth appears to be much higher (close to 1 GHz) for the non-inverting configuration. It almost appears you cannot get much above ~ 250 MHz for the inverting configuration. Why such a low bandwidth for the inverting configuration?

Dear Sir

Good days,

My customer can't link 913/914.

May we check if 914QEVB R1~R27 is nessary? due to my customer remove these device?

                                      Best regards,

                                                 Bogey

Do SN75DP129 and SN75DP139 correspond to the DVI output of Dual-Link?
Or does only Single-Link correspond?
If there is the method of making it correspond to Dual-Link when only Single-Link corresponds, please let me know.
 
Thank you for your consideration.

I'm using CCS5.5.0-0007 to evaluate MSP430 uC. I had one project built in CCS5.2. Thanks for TI's great incompatible strategy, I had to build the project from scratch for CCS5.5 again.  Hey, CCS developer, does the incompatibility ever bother you guys?

Anyway, I built the project. Now, all the ISR handlers are in the InterruptVectors_Init.c, which, I think , is great. Because the structure is now much more clear than the old one. I tried to add my code in there as following.

/* USER CODE START (section: InterruptVectors_init_c_prologue) */
/* User defined includes, defines, global variables and functions */
#include "gh.h"
extern unsigned char time, local_timer,timer_updated,task_timer; // second timer
extern unsigned char uart_rx_buf[16]; // uart rx buffer
extern unsigned char uart_tx_buf[8]; //uart tx buffer
extern unsigned char uart_rx_pt, uart_tx_pt,event_status,timer; // UART RX buffer pointer, tx buffer pointer

/* USER CODE END (section: InterruptVectors_init_c_prologue) */

Now, I got the error of "InterruptVectors_init.c", line 24: fatal error #1965: cannot open source file "gh.h" . The gh.h file is in the project folder. I add it using "new header file" option. It did complain it when I used it in the main.c. I have the project path in the include option for the compiler. Now, I can not understand why it can not find it. How can I fix this issue?

Before I post this, I did some search on this forum . it seems that CCS's compiler option was never user friendly. Lots of questions about  how to add include file and include file not being found. Do you guys know that it's almost for sure that the customer will add some new header file in the project folder. So why the hell you can not put project path as a default search option in your compiler include?

Hello,

we are currently pondering whether to use a Li-Ion battery with BMS for our
mobile respiratory ventilator.
Our load for the battery would vary between 0,5A and 4A with a frequency of
max 1Hz and an ON/OFF ratio of 1:1 through 1:5.

Looking at the bq20z45 we assume the coulomb counter to have a measurement
update rate of 4Hz. Is this assumption correct?

The bq20z45 has got something called " Pulsed Load Compensation". But the
technical manual does not explain the algorithm which presumably makes
use of a variable called "Delta Voltage".

What accuracy can one expect for the calculation of the remaining capacity
with above mentioned pulsed loads and the "Pulsed Load Compensation"?

Is the algorithm in question designed in a manner to make sure the
remaining capacity will never display more energy than actually is in
the battery?

Kind regards, looking forward to your answers!

Heye

Hi,

I have prepared a Golden file and I would like to use the data to program the rest of my battery packs.

When I write the data flash image to another device, then is impossible for me to calibrate it. I cannot make the current to report 0mA when is not working.

How is this possible if the battery packs are totally equal?

I am following the SLUA329 as reference.

Thanks in advance.

Bimi.

After running my application for about 4hours and thousands of messages has been sent my applications stops working. This is because all four entries in my sInFrameQ, fi_usage is somehow left with the value FI_INUSE_TRANSITION and new incoming frames can't be queued because all entries are busy. Anyone encountered this problem? What might I have done wrong?

Hi,

Using Linaro toolchain for Sitara AM335x Starter Kit with CCS v5.5.0, Ubuntu 12.04, I find that there are '\t' in the disassembly window. It is some distraction to see disassembly code. Can it be turned off?

Thanks,

 7            printf("Hello World!\n");
000083d0:   movw\tr0, #33848\t; 0x8438
000083d4:   movt\tr0, #0
000083d8:   blx\t0x82c0
 9            return 0;
000083dc:   movs\tr3, #0
10        }
000083de:   mov\tr0, r3

We have a situation that I wasn’t anticipating.  The older TPS40222 regulator that we were using has an UVLO value of 3.8v on startup. The new LMR10510X value is 2.7v.  We are powering our product over a 6 foot USB cable.  Power supply input ramp up time is significant.  The old regulator would hold off the output until the input reached 3.8v and then buck down immediately to the 3.3v.  The new regulator attempts to start up at 2.7v, but can’t regulate so it lets the output follow the input voltage ramp until the output reaches the set point voltage at which point it regulates.  This added delay on the LMR10510X output is causing some unpredictable results on our PCBA.  Several of the components have different supply Vmin values so the board is coming up in states we haven’t experienced before.  See the attached scope picture.  Red is the input to the LMR10510X, blue is the output.  I’m using 10x probes so multiply the Y axis scales by 10.

Can we use a simple voltage divider (with a filter cap) to drive the EN pin on the LMR10510X so that it won’t attempt to regulate and will hold off the output until the input voltage reaches about 3.8v?

I just tried a simple resistive divider and also a capacitive delay on the EN pin and find that the regulator does not seem to be honoring the 1.8v minimum enable threshold.  Is this pin slope sensitive?  I don't find any minimum input rise time in the the data sheet.  Now that we have a TINA model of the LMR10510X we were able to verify that the regulator will start up at a lower EN voltage than the spec sheet indicates with slow rising signal.

I am planning to use a DIT4096 in HW mode and would like to use the reset line to disable the output.  i.e. If I don't want to send a s/pdif signal out I will just pull the reset line low indefinitely.  I just want to confirm that I can do that while the DIT4096 is still getting clocks and data and it will not damage the chip.

Thanks,

Fawad

Hi all,

We have an RMII ethernet interface connected to an AM3352 chip. We're aware of the clock errata, and have the PHY providing the clock. After some initial difficulties getting our MDIO working, we now have an ethernet device showing up in Linux.

When we use the route command, we see sensible output (see attached). 

When we try to send any data, whether via ping, netcat, or any other tool, we see no activity on our TX lines to the PHY, and no packets are sent. We've verified the pin-muxing of the TX lines by looking at the processor registers. Our RX lines do show traffic, but even when we specifically direct traffic to the board, we see no indication that the board has received it.

One interesting behavior is that when we attempt to send a packet, we do not see the TX or RX count increment on eth0. However, we do see the lo interface increment both TX and RX packets by 1 (see second attachment). However, when we try to send data to 'localhost' with a corresponding receive process, the connect fails, and it indicates 'no route to host' (see third attachment).

I've tried everything I can think of: instrumenting the TCP framework, double-checking our pin muxing, verifying that we have devices for the PHYs, MDIO, etc - what could be causing our board to not be able to use the Ethernet interface?

(Please visit the site to view this file)

(Please visit the site to view this file)

(Please visit the site to view this file)

Thanks,

Ben

While creating a new target configuration for a TMS320C6671 I notice that TI's default configuration shows two cores in the device. See image below. I'm wondering why...the 6671 is a single core device or am I misunderstanding the configuration?

I am comparing the UC2525A to the UC2525B. IN DN-36 the A has a cross conduction charge of 150 nC and the B has a cross conduction charge of 30 nC. When operating from 15V supplies at 200kHz the difference in supply current should be substantial but in my tests the difference is within my measurement error. Please explain this disparity. Thanks.

I am using bqCONFIG to setup the bq27531-G1 gas gauge and the Chem ID I believe I should use is not available in the list. It is also missing from the GaugeStudio Chem ID list.

Chem ID 3154 (LGC: LGJD55EE5456 3000mAh) seems to be the best match to my cell (LGHD55E5456 3000mAh).  This is from the chemistry_selection_table.xls file in the SLUC138 Mathcad Chem Tool folder.

How can I program the gauge to work with this cell?

Thanks!

Since my old thread regarding this problem was filled with some off-topic-trash and never was answered, I'll try it again here:

I'm using the dmtimer-Example to toggle an output and to toggle a LED (this LED is of course switched only every 10000th..100000th call of ISR execution to see it blinking).

I'm using exactly the code from the BeagleBone example of Starterware except the serial interface output and timer start and reload count value. When I use values of 0xFFFFFE00 (equal to 21 usec) here, the ISR is called periodically as expected.

When I change the timer count/reload to 0xFFFFFF00 (equal to 10.6 usec) or higher values, the ISR is no longer called in expected way:

- ISR is called once more or less immediately (possibly after these 10.6 usec)
- then it is not called for several minutes
- then it is called periodically but according to frequency it seems the 32kHz clock is used instead of 24MHz CLK_M_OSC

My calculation is as follows: in 10.6 usec a CPU @1GHz can execute about 10000 clock cycles in ISR which should be more than enough for my little code, so this should not be a reason for stumbling about timing.

Is this calculation correct?

If not: there is an internal RAM/cache available that should be much faster - is it possible to move the ISR and all used variables into that RAM to execute the whole thing faster and to avoid timing problems?

All I want to do is to call a ISR with a frequency of 100 kHz (equal 10usec, equal timer value of 0xFFFFFF0F) which really should not be too fast for such a CPU?

Thanks!

Do you have an example design of AM335x connected to a 10/100 Phy using RMII interface. What I am wondering is whether the Phy or the CPU is supossed to provide the 50MHz clock. Advisory 1.0.16 in the AM335x Errata states that its output clock doesn’t comply with requirements of external RMII phy.

Will this be fixed in Rev 2 silicon?

Is there any Linux driver of TLV320AIC3204?
Is providing for a customer possible in a certain case?

Thank you for your consideration.

Hi,

Our customer has a question about the setup of ADDR pin.

They want to change the voltage of the ADDR pin from high to low or low to high

while keeping Vccp at its operating level, and without using RESET pin.

Is it available if they would set up before start condition?

If it is available, how long should they wait from the change of ADDR voltage to start condition?

Best Regards,

Kato / Japan disty

Dear All,

I have some serious problems with Audio codec AIC3106 on OMAP-L137 board.I want to handle the codec in ARM. I fed the codec with a clean sinusoid wave and play it on output. I used "arecord" and "aplay" functions. I have three problems:

1. The output is so noisy. The SNR is less than 50 db !!!! wow. It is so disappointing.The codec datasheet claims that its SNR is 90db. By the way, I read the codec registers. They say "all things are ok"

2. The output level is very low. I changed the setting by "amixer" function and I was successful in heightening it to 2 volts (pick to pick). How can I restore the output to 3.3 volts?

3.The codec claims that it supports 32 and 24 bit format. However, when I set the format to 24-bit the data is not really 24-bit. It seems to be 16-bit. I tested it.

We have three OMAP-L137 boards. All of them have the following problems.

I would be very thankful if someone can help me.

Thanks alot

Dear All,

I am a professional in digital field. We have bought 3 OMAP-L137 boards. We are going to work with Audio Codec AIC3106. However, its performance is very lower than that mentioned in datasheet. We used the default setting of the codec and board. I think the default setting of  a board primarily should give the best signal in terms of SNR. The setting of the audio codec registers are as follows: (the register values are in hexadecimal format)

Reg[0]=0                                                                        
Reg[1]=80                                                                       
Reg[2]=0                                                                        
Reg[3]=10                                                                       
Reg[4]=4                                                                        
Reg[5]=0                                                                        
Reg[6]=0                                                                        
Reg[7]=0                                                                        
Reg[8]=0                                                                        
Reg[9]=0                                                                        
Reg[10]=0                                                                       
Reg[11]=1                                                                       
Reg[12]=0                                                                       
Reg[13]=0                                                                       
Reg[14]=0                                                                       
Reg[15]=18                                                                      
Reg[16]=18                                                                      
Reg[17]=f                                                                       
Reg[18]=f0                                                                      
Reg[19]=40                                                                      
Reg[20]=78                                                                      
Reg[21]=78                                                                      
Reg[22]=40                                                                      
Reg[23]=78                                                                      
Reg[24]=78                                                                      
Reg[25]=0                                                                       
Reg[26]=0                                                                       
Reg[27]=fe                                                                      
Reg[28]=0                                                                       
Reg[29]=0                                                                       
Reg[30]=fe                                                                      
Reg[31]=0                                                                       
Reg[32]=18                                                                      
Reg[33]=18                                                                      
Reg[34]=0                                                                       
Reg[35]=0                                                                       
Reg[36]=0                                                                       
Reg[37]=0                                                                       
Reg[38]=0                                                                       
Reg[39]=0                                                                       
Reg[40]=0                                                                       
Reg[41]=0                                                                       
Reg[42]=6c                                                                      
Reg[43]=80                                                                      
Reg[44]=80                                                                      
Reg[45]=f                                                                       
Reg[46]=f                                                                       
Reg[47]=8f                                                                      
Reg[48]=0                                                                       
Reg[49]=0                                                                       
Reg[50]=0                                                                       
Reg[51]=c                                                                       
Reg[52]=f                                                                       
Reg[53]=f                                                                       
Reg[54]=8f                                                                      
Reg[55]=0                                                                       
Reg[56]=0                                                                       
Reg[57]=0                                                                       
Reg[58]=c                                                                       
Reg[59]=0                                                                       
Reg[60]=0                                                                       
Reg[61]=0                                                                       
Reg[62]=f                                                                       
Reg[63]=f                                                                       
Reg[64]=8f                                                                      
Reg[65]=c                                                                       
Reg[66]=0                                                                       
Reg[67]=0                                                                       
Reg[68]=0                                                                       
Reg[69]=f                                                                       
Reg[70]=f                                                                       
Reg[71]=8f                                                                      
Reg[72]=c                                                                       
Reg[73]=f                                                                       
Reg[74]=f                                                                       
Reg[75]=8f                                                                      
Reg[76]=f                                                                       
Reg[77]=f                                                                       
Reg[78]=8f                                                                      
Reg[79]=8                                                                       
Reg[80]=f                                                                       
Reg[81]=0                                                                       
Reg[82]=80                                                                      
Reg[83]=0                                                                       
Reg[84]=0                                                                       
Reg[85]=0                                                                       
Reg[86]=8                                                                       
Reg[87]=0                                                                       
Reg[88]=0                                                                       
Reg[89]=0                                                                       
Reg[90]=f                                                                       
Reg[91]=0                                                                       
Reg[92]=80                                                                      
Reg[93]=8                                                                       
Reg[94]=0                                                                       
Reg[95]=0                                                                       
Reg[96]=0                                                                       
Reg[97]=0                                                                       
Reg[98]=0                                                                       
Reg[99]=0                                                                       
Reg[100]=0                                                                      
Reg[101]=0                                                                      
Reg[102]=2                                                                      
Reg[103]=0                                                                      
Reg[104]=0                                                                      
Reg[105]=0                                                                      
Reg[106]=0                                                                      
Reg[107]=0                                                                      
Reg[108]=0                                                                      
Reg[109]=0       

I used a signal generator to generate a sinusoid signal shown in Figure 1. It is clean. Then, I used following instruction that captures from line in and plays on line out (ALSA driver):

arecord -d 20 -D 'hw:0,0' -r 96000 -f S32_LE -c 2 | aplay -D 'hw:0,0' -c 2

I saw the output by a scope. Figure 2 shows the result. The result is so noisy. Our analysis by Matlab shows that the SNR is about 50 db. This is really disappointing.

Figure 1

Figure 2

All three OMAP-L137 have the same mistake. I checked the different setting but the mistake was not solved. The SNR is vital for our application.

Please, help us on this issue.

Thanks,

Jack,