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TPS62095: TPS62095

November 5, 2019, 1:54 am
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Part Number: TPS62095

The issue is below:   we use TPS62095 to converte 5.0V to 2.5v,and we provide the 2.5v  to FPGA, but it couses some spurious signals interval 144KHz. If we provide a 2.5v to FPGA via DC POWER SUPPLY instead, then there is no the spurious signals interval 144KHz.

I also tried using this external DC source as input supply for the TPS62095 instead of the +5V_Block_FPGA,and the result was there were still some spurious signal every 144KHz. The spurious signals are the red lines around the blue line in the screenshot as the below attachment    (ps: the blue line is known for us,and you no need to care)

How can we eliminate the spurious signals interval 144KHz? Thank you. some screenshots are in attachment as below

(ps:the issue case is CS0090769)

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PCM1754: Is there any test data about VCC max voltage and time for a spike?

November 5, 2019, 1:54 am
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Part Number: PCM1754

Hi, team,

In PCM1754 datasheet, VCC abs. max voltage is 6.5V. In my customer design, the VCC power rail is 5V, but in system battery drop test, the VCC pin voltage will go high as a spike, the peak value is ~7.6V, the duration of >6.5V time is ~14us. The spike is caused by system level reason and cannot be eliminated now.

Do you have such test or data on the VCC pin voltage spike about the peak voltage and time? Customer needs this to evaluate the risk to device.

Thanks.

Johnny

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DRA829_TDA4VM: C7x memory map

November 5, 2019, 1:54 am
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Hello TI Support,

I'm currently porting some code to run on the C7x DSPs on a TDA4VM board. In order to get first code pieces running I'm using linker command files I found on some of the C7x examples. In order to expand those files for my own code, I'll need a memory map for the C7x. The TRM for the board only provides a detailed memory map for the C66x. The main memory map states:

Region NameStart AddressEnd AddressSize
COMPUTE_CLUSTER0_DSP0   0x00640000000x0064FFFFFF16 MB
COMPUTE_CLUSTER0_DSP1   0x00650000000x0065FFFFFF16 MB

I have following questions.

  1. What are the regions of DSP0 and DSP1? There is one C7x and two C66x DSPs on the boards.
  2. Is there a detailed memory map for the C7x available, similar to the C66x memory map?
  3. Is the assumption from the example linker command files correct, that the L2SRAM for the C7x starts at 0x64800000 and has a maximal length of 0x080000?
  4. Is there a L2 SRAM/Cache configuration similar to the C66x possible?
  5. How can I access data outside the L2SRAM? Currently I run bare metal applications on the C7x. In the case I have data larger than the allowed heap/stack size, how can I access it from the global memory?

This information would help to write correct linker command files.

Thanks and kind regards,

Florian

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MSP430FR2433: Without ACLK in the UART of MSP430FR2433, how can SMCLK achieve low power consumption when sending and receiving communication?

November 5, 2019, 1:55 am
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Part Number: MSP430FR2433

1.MSP430FR2433 from LPM3 sleep state to active state, which register bit can indicate? The crystal oscillator has started normally. The frequency of DCO16M we used should be ensured to ensure the normal start of the crystal oscillator before the next measurement data can be made

2. Without ACLK in the UART of MSP430FR2433, how can SMCLK achieve low power consumption when sending and receiving communication? There is no clear statement in this document. Although it can communicate normally and consume low power, it does not conform to our cognition. I hope you can answer it. Thanks.

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AMC1311-Q1: AMC1311 for 4 to 20mAmp current measurement- Circuit Review and Shunt Value

November 5, 2019, 1:56 am
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Part Number: AMC1311-Q1

As suggested in the thread (https://e2e.ti.com/support/amplifiers/f/14/p/836435/3093804we decided to use AMC1311 for 4 to 20mAmp current measurement. Below is the final schematic, request you to

1) Please review the schematic and suggest changes if any

2) Suggest Rsh value for our below requirement

Input Range:4 to 20milliAmp , DC

Accuracy:0.1%

Sampling Rate:1mS

Test Compliance:EMI/EMC;5kV impulse;2kV dielectric withstand

3)As per AMC1311 EVM, Vout ranges between 0.5V to 2.5V. What are changes to be done to make it 0.5 to 3.3V?

Thanks

Haranath V

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AMC1305M25: what's the output mode when AVDD is off?

November 5, 2019, 1:58 am
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Part Number: AMC1305M25

Hi,

Customer tried AMC1203 before, when AVDD is off, they found there is a software issue. so what about AMC1305?

thanks.

Yuan

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IWR6843AOPEVM: IWR6843AOPEVM heat

November 5, 2019, 2:03 am
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Part Number: IWR6843AOPEVM

Hi champs,

When running the 68xx_aop_mmwave_sdk_hwa code example on the IWR6843AOPEVM, it becomes rapidly very hot.

When trying on another IWR6843AOPEVM board, the behavior is the same.

Is this something expected?

Where could we find additional information about IWR6843AOP management on top of this thread https://e2e.ti.com/support/sensors/f/1023/t/816332?

Thank you

Best regards,

Guillaume

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ADS9224REVM-PDK: PHI controller board

November 5, 2019, 2:05 am
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Part Number: ADS9224REVM-PDK

Hi team

Where can I find the schematic diagram and it's software of PHI controller board? 

Thanks

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BQ25619: Enquiry on Battery Capacity Status Monitoring

November 5, 2019, 2:07 am
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Part Number: BQ25619

Hi,

Is it possible to monitor the battery capacity (mAh) on an MCU using BQ25619 via the I2C communication line?

I would like to know how many percentage left my battery has. If the MCU can monitor it via I2C bus, I can use it to perform further actions.

Any help or suggestion is much appreciated.

Thanks

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TPS62273: What is the Vout=3.3V efficiency for this part?

November 5, 2019, 2:12 am
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Part Number: TPS62273

There are many charts in the datasheet for efficiency at other Vout voltages, but I couldn't find any for Vout=3.3V.

Also, is there a better 400 mA for my application?

Vin= 3.7 to 5V; Vout=3.3V +/-3%; Can not use BGAs.

Total PCB area and the ability to run no more than warm (Tambient + 20 deg C) in still air, with no heatsink is important.

I don't need the voltage switch feature.

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TSW14J56EVM: HSDC Pro new release

November 5, 2019, 2:13 am
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Part Number: TSW14J56EVM

Hello,

I was wondering if there are any news in regard with the release of HSDC Pro 5.1?

I ask this because in the current release when embedding the use of the FPGA within a C or Matlab software, the data extracted from the FPGA are saved on an array, which incredibly slows things down. I was told in the past that it should have been ready on May and then July.

It would be great if there could be an update on this.

Kind regards,

Francesco

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LM5175: LM5175 waveform unstable in 3A

November 5, 2019, 2:15 am
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Part Number: LM5175

Dear Sir/Ms.

My customers report that they designed the LM5175 to have a high-frequency sound when it was loaded at 3A.  When the customer found that more than 0.8A was loaded, Vout would fall. It should be top to protect.

The customer's specifications are as follows.
Vin= 5V
Vout=8.7V

Iout =  3A

schematic 

0A Load Wave form , Ch2 = Pin15 (L9 ,Q8, Q9), Ch1= Indicator current (L9)

3A (Electronic DC Loader)

would you please give us some advice?

Best Regards,

Kami Huang

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CCS/TMS320F28379D: Bitfield code example for F28379D

November 5, 2019, 2:15 am
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Part Number: TMS320F28379D

Tool/software: Code Composer Studio

Hello,

I am trying to look for an example of pwm chopper of an EPWM module in bitfield code section but it is not given. I dont want to do it with driver library code example any solution ?

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TPS65988: Questions about CC command change the voltage

November 5, 2019, 2:17 am
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Part Number: TPS65988

Hi,

1. If PD choose  20V sink voltage first, then EC set PDO to change the voltage to 15V by using CC command, will VBUS drop to 5V then back to 15V, or to 15V directly?

2. Is their any guide for write the PD FW in OS?

Thank you very much.

     

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DRV8880: DRV8880

November 5, 2019, 2:19 am
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Part Number: DRV8880

Hi Team,

In the datasheet of DRV8880 for determining the step frequency following equation highlighted in the attachment below is given.

It is mentioned that at high speed motor will not spin, so need a clarification on this.

And also is there any relation with Full scale current of winding of stepper motor to find the Step frequency at higher RPM of motor?

And if there is a relation between Step Frequency and Full Scale Current of Stepper, kindly suggest for the same.

Warm Regards,

Karthik 

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BQ77915: charging of Li-ion battery

November 5, 2019, 2:20 am
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Part Number: BQ77915

Hi,

  • Can this IC support charging of Li-ion batteries?
  • If not, could you please suggest a cost effective solution for the same along with BQ77915?

Thank-you

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CCS/LAUNCHXL-F280049C: TMS320F280049C: 11 bits ADC resolution?

November 5, 2019, 2:23 am
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Part Number: LAUNCHXL-F280049C

Tool/software: Code Composer Studio

Dear Sir

I have a problem with the number of bits of the ADC in LAUNCHXL-F280049C board.

The datasheet of the processor is clear, the ADC is not configurable and have a resolution of 12 bits.

I configure the 3 ADCs reference as internal at 3.3V and VrefLO at 0V. (as c2000 example).

// initADC - Function to configure and power up ADCA, ADCB, ADCC.
void initADC(void)
{
    // Setup VREF as internal
    SetVREF(ADC_ADCA, ADC_INTERNAL, ADC_VREF3P3);
    SetVREF(ADC_ADCB, ADC_INTERNAL, ADC_VREF3P3);
    SetVREF(ADC_ADCC, ADC_INTERNAL, ADC_VREF3P3);

    EALLOW;

    // Set ADCCLK divider to /4
    AdcaRegs.ADCCTL2.bit.PRESCALE = 6;
    AdcbRegs.ADCCTL2.bit.PRESCALE = 6;
    AdccRegs.ADCCTL2.bit.PRESCALE = 6;
    // Set pulse positions to late
    AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
    AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1;
    AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1;
    // Power up the ADC and then delay for 1 ms
    AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
    AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;
    AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;
    EDIS;

    DELAY_US(1000);
}

When I read 0V on the pin the value is about 0, when I read 3.3V on the pin the value is about 2048, when I read 1.65V on the pin the value is about 1024.

sampleTestA = (int)AdcaResultRegs.ADCRESULT0;
sampleTestB = (int)AdcbResultRegs.ADCRESULT0;
sampleTestC = (int)AdccResultRegs.ADCRESULT0;

It seems the ADC is 11bit. What's wrong?

Regards

Piero

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LM5116: About the sync buck converter design

November 5, 2019, 2:29 am
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Part Number: LM5116

Hi,

I will design a buck converter with two LM5116.I need a high current. Therefore, i will use sync design .

The design I found is 2 phase buck converter(PMP7282 Two-phase buck converter ). I intend to take this design as a reference.

*My input voltage will be single phase dc. What should I pay attention to in sync design for single phase?

*In the dual design I have found, there is a separate EN and UVLO input for both ICs.  Are there any pins that can be used in sync design? For example, can EN and UVLO inputs be used together sync design? 

*Error comparator designed externally. Should I change?

*The synchronization clock is generated from LM555. However, the phase difference between the two IC's was created (180 degrees). Is this phase difference a design specific to a 2-phase inverter?

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TPS7B69-Q1: Input short circuit test ,IC is broken,no output 5V

November 5, 2019, 2:30 am
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Part Number: TPS7B69-Q1

HI,

TPS7B6950QDBVRQ1, Input short circuit test (Vin&GND),IC is broken,no output 5V,What is the reason? What are the good improvement measures

The IC was tested many times and broke every time.

 Input capacitor is 10uF, Output capacitor is 20uF,

When the output capacitor is changed to 4.7+ 4.7uF, the IC will not be damaged in the input short circuit test,

The actual test found that, when the input short circuit, the output current backflow to the input,such as FIG2,CHI1 .

Thanks!

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Compiler/TMS320F280049: Issue CLA compiler(v18.12.3.LTS): CLA memory allocation size

November 5, 2019, 2:34 am
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Part Number: TMS320F280049

Tool/software: TI C/C++ Compiler

We have an issue in the size the CLA linker allocates:

situation1:

#pragma DATA_SECTION(CH_Bits, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Bits, 4)

volatile uint16_t CH_Bits;

#pragma DATA_SECTION(CH_Sample_Array, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Sample_Array, 4)

volatile int16_t CH_Sample_Array[41];

#pragma DATA_SECTION(CH_Sample_Array1, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Sample_Array1, 4)

volatile int16_t CH_Sample_Array1[41];

Allocated size by linker: 105

Situation2 : Total size of the variables are the samel

#pragma DATA_SECTION(CH_Bits, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Bits, 4)

volatile uint16_t CH_Bits;

#pragma DATA_SECTION(CH_Sample_Array, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Sample_Array, 4)

volatile int16_t CH_Sample_Array[41][2];

allocated size by linker:  146.  Somehow the linker has a problem with 2 dimensional arrays

also volatile int16_t CH_Sample_Array[2][41]; gives the same problem.

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