Part Number: BQ34Z100-G1

Hi,

Quick question.

Is the QMax Cell 0 parameter for a single cell or the battery pack as a whole?  All references to QMax alone refer to the battery pack, but the name of this particular  parameter is ambiguous.  The bq34z100 -g1 reference document specifies that it should start with the C-rate of the battery (not a single cell), but its name suggests otherwise.  Also, the Application Report SLUA664 - Configuring the bq34100 Data Flash states  that QMax Cell 0 is "... the maximum chemical capacity of the battery cell".

I have successfully run a learning cycle by using the total battery capacity (4 cells), but wanted to confirm that I was using the correct value to start with.

Regards,

Julian

Part Number: UNIFLASH

When programming the Tiva TM4C123GH6PM part using Uniflash 5.1.0 GUI, there is an error message trying to read RAM 0x20008000., which is reserved memory.

If I create a standalone command-line, it programs fine.  It should be the same result...  

I want to be able to use the GUI.

Why do I get two different results when the programming *should* be identical?

Part Number: RM57L843

Hello,

An example code for RTI DWWD usage works perfectly. I was wondering what happens if I try to write the WDKEY key values without enabling the counter? Tried doing that and my system goes into a complete hang state:

"Trouble Halting Target CPU:
(Error -1060 @ 0x0)
Device is not responding to the request.
Reset the device, and retry the operation.
If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings *e.g. lower TCLK).
(Emulation package 5.0.747.0)"

I am confident that the issue is with accessing the WDKEY before enabling the counter and couldn't find any information relating to it in the ref manuals. Any information on the system state when this happens would be helpful.

Thank you!

Tool/software: Code Composer Studio

Hello experts,

I'm still using Code Composer version 3.3.82.13 with a DSPBIOS application with a c6457 processor. I was trying to reproduce a bug that was reported by a colleague of mine on the unit equipped with the board which hosts the c6457 DSP.

To achieve in reproducing that I was using DSPBIOS (version 5.33.06) message logs and my emulator connected to jtag. Unfortunately when I used those then the application aborted after few seconds because an internal exception was thrown: "Loop buffer exception and missed stall". I did many attempts to try not to generate the exception. Message log was the only way I could hope to debug my code but when I tried to use those I always obtain the same error (not the one I was searching to reproduce). No way to obtain that strange exception if I didn't use the emulator connected to the board.

Finally, just as the last attempt, I have tried to run my application in real-time mode. That eliminates the above problem definitely! How is it possible? I thought that this modality only had to do with the ability to break programs and let the interrupt being serviced at the same time. Do you have some kind of technical answer explaining this unexpected behavior?

Part Number: TDA3XEVM

Hello,

My project is building inside a Linux based docker environment which is installed on a windows 10 host.
I have build errors when I try to build VisionSDK in the above setup.

But if I have Linux host for the docker, I do not face the same issues. 

VISION SDK version = 3.3 .   compiler = gcc

Thanks. 

--------    build ERROR ----------------------------

root@docker-desktop:/data# make -C code/TDA3X dms MAKECONFIG=tda3xx_custom_evm_bios
make: Entering directory '/data/code/TDA3X'
make -C /data/code/TDA3X/apps/configs -f build_makeconfig.mk all
make[1]: Entering directory '/data/code/TDA3X/apps/configs'
mkdir -p /data/code/binaries/links_fw/include/config
mkdir /data/code/binaries/links_fw/include/config/dms
mkdir: cannot create directory '/data/code/binaries/links_fw/include/config/dms': File exists
build_makeconfig.mk:18: recipe for target 'all' failed
make[1]: [all] Error 1 (ignored)
mkdir /data/code/binaries/links_fw/include/config/dms/tda3xx_custom_evm_bios
mkdir: cannot create directory '/data/code/binaries/links_fw/include/config/dms/tda3xx_custom_evm_bios': File exists
build_makeconfig.mk:18: recipe for target 'all' failed
make[1]: [all] Error 1 (ignored)
# makeconfig: Config is [ tda3xx_custom_evm_bios ]
# makeconfig: Output file is @ /data/code/binaries/links_fw/include/config/dms/tda3xx_custom_evm_bios/system_cfg.h
# makeconfig: Input file is @ /opt/tda3x/vision_sdk/apps/configs/tda3xx_custom_evm_bios/cfg.mk
# makeconfig: Generating header ...
make -fbuild_makeconfig.mk header -s -j1
make[2]: Entering directory '/data/code/TDA3X/apps/configs'
make[2]: Leaving directory '/data/code/TDA3X/apps/configs'
# makeconfig: Generating alg plugin config ...
make -fbuild_makeconfig.mk alg_config -s -j1
make[2]: Entering directory '/data/code/TDA3X/apps/configs'
make[3]: Entering directory '/data/code/TDA3X/apps/configs'
make[3]: Leaving directory '/data/code/TDA3X/apps/configs'
make[2]: Leaving directory '/data/code/TDA3X/apps/configs'
# makeconfig: Generating usecase config ...
make -fbuild_makeconfig.mk uc_config -s -j1
make[2]: Entering directory '/data/code/TDA3X/apps/configs'
make[3]: Entering directory '/data/code/TDA3X/apps/configs'
make[3]: Leaving directory '/data/code/TDA3X/apps/configs'
make[2]: Leaving directory '/data/code/TDA3X/apps/configs'
# makeconfig: Generating footer ...
make -fbuild_makeconfig.mk footer -s -j1
make[2]: Entering directory '/data/code/TDA3X/apps/configs'
make[2]: Leaving directory '/data/code/TDA3X/apps/configs'
# makeconfig: Done !!!
make -s -fbuild_makeconfig.mk check_cpu_include
make[2]: Entering directory '/data/code/TDA3X/apps/configs'
#
# CPUs that are NOT required but included in config [ tda3xx_custom_evm_bios ],
#
#
# CPUs that are required but not included in config [ tda3xx_custom_evm_bios ],
#
#
# Edit /opt/tda3x/vision_sdk/apps/configs/tda3xx_custom_evm_bios/cfg.mk to include or exclude CPUs in an application
#
make[2]: Leaving directory '/data/code/TDA3X/apps/configs'
make[1]: Leaving directory '/data/code/TDA3X/apps/configs'
make -C /data/code/TDA3X/apps/build/rtos/makerules -fbuild_edma3lld.mk edma3lld
make[1]: Entering directory '/data/code/TDA3X/apps/build/rtos/makerules'
make -C /opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv MODULE_NAME=edma3lld_drv edma3lld_drv_PLATFORM_DEPENDENCY=yes CORE=ipu1_0 ISA=m4
make[2]: Entering directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv'
make /data/code/binaries/lib/tda3xx-evm/m4/debug/edma3lld_drv.aem4
make[3]: Entering directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv'
make[3]: '/data/code/binaries/lib/tda3xx-evm/m4/debug/edma3lld_drv.aem4' is up to date.
make[3]: Leaving directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv'
make[2]: Leaving directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv'
make -C /opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/rm MODULE_NAME=edma3lld_rm edma3lld_rm_PLATFORM_DEPENDENCY=yes CORE=ipu1_0 ISA=m4
make[2]: Entering directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/rm'
make /data/code/binaries/lib/tda3xx-evm/m4/debug/edma3lld_rm.aem4
make[3]: Entering directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/rm'
make[3]: '/data/code/binaries/lib/tda3xx-evm/m4/debug/edma3lld_rm.aem4' is up to date.
make[3]: Leaving directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/rm'
make[2]: Leaving directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/rm'
make -C /opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv MODULE_NAME=edma3lld_drv edma3lld_drv_PLATFORM_DEPENDENCY=yes CORE=c66xdsp_1 ISA=66
make[2]: Entering directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv'
make /data/code/binaries/lib/tda3xx-evm/66/debug/edma3lld_drv.ae66
make[3]: Entering directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv'
# Compiling tda3xx-evm:c66xdsp_1:debug:edma3lld_drv: src/edma3_drv_init.c
/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/bin/cl6x -ppd=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug/.deps/edma3_drv_init.P -c -qq -pdsw225 -mv6600 --abi=elfabi -mo -eo.oe66 -ea.se66 -ms --embed_inline_assembly -DBUILD_C6XDSP -DBIOS_BUILD -DSYSBIOS --emit_warnings_as_errors -DA15_TARGET_OS_BIOS --symdebug:dwarf -Dxdc_target_name__=C66 -Dxdc_bld__profile_debug -D_DEBUG_=1 -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_bld__vers_1_0_7_2_0_10271 -DTDA3XX_BUILD -DTDA3XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_CAL_BUILD -DVPS_ISS_BUILD -DVPS_DSS_BUILD -I/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/include -I. -I../../../.. -Isrc -I/packages -I/data/code/binaries/links_fw/include/config/dms/tda3xx_custom_evm_bios -I/opt/tda3x/ti_components/codecs/framework_components_3_40_02_07/packages -I/opt/tda3x/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/opt/tda3x/ti_components/algorithms/vxlib_c66x_1_1_3_0/packages -fr=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fs=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fc src/edma3_drv_init.c
/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/bin/cl6x -c -qq -pdsw225 -mv6600 --abi=elfabi -mo -eo.oe66 -ea.se66 -ms --embed_inline_assembly -DBUILD_C6XDSP -DBIOS_BUILD -DSYSBIOS --emit_warnings_as_errors -DA15_TARGET_OS_BIOS --symdebug:dwarf -Dxdc_target_name__=C66 -Dxdc_bld__profile_debug -D_DEBUG_=1 -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_bld__vers_1_0_7_2_0_10271 -DTDA3XX_BUILD -DTDA3XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_CAL_BUILD -DVPS_ISS_BUILD -DVPS_DSS_BUILD -I/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/include -I. -I../../../.. -Isrc -I/packages -I/data/code/binaries/links_fw/include/config/dms/tda3xx_custom_evm_bios -I/opt/tda3x/ti_components/codecs/framework_components_3_40_02_07/packages -I/opt/tda3x/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/opt/tda3x/ti_components/algorithms/vxlib_c66x_1_1_3_0/packages -fr=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fs=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fc src/edma3_drv_init.c
# Compiling tda3xx-evm:c66xdsp_1:debug:edma3lld_drv: src/edma3_drv_basic.c
/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/bin/cl6x -ppd=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug/.deps/edma3_drv_basic.P -c -qq -pdsw225 -mv6600 --abi=elfabi -mo -eo.oe66 -ea.se66 -ms --embed_inline_assembly -DBUILD_C6XDSP -DBIOS_BUILD -DSYSBIOS --emit_warnings_as_errors -DA15_TARGET_OS_BIOS --symdebug:dwarf -Dxdc_target_name__=C66 -Dxdc_bld__profile_debug -D_DEBUG_=1 -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_bld__vers_1_0_7_2_0_10271 -DTDA3XX_BUILD -DTDA3XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_CAL_BUILD -DVPS_ISS_BUILD -DVPS_DSS_BUILD -I/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/include -I. -I../../../.. -Isrc -I/packages -I/data/code/binaries/links_fw/include/config/dms/tda3xx_custom_evm_bios -I/opt/tda3x/ti_components/codecs/framework_components_3_40_02_07/packages -I/opt/tda3x/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/opt/tda3x/ti_components/algorithms/vxlib_c66x_1_1_3_0/packages -fr=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fs=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fc src/edma3_drv_basic.c
/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/bin/cl6x -c -qq -pdsw225 -mv6600 --abi=elfabi -mo -eo.oe66 -ea.se66 -ms --embed_inline_assembly -DBUILD_C6XDSP -DBIOS_BUILD -DSYSBIOS --emit_warnings_as_errors -DA15_TARGET_OS_BIOS --symdebug:dwarf -Dxdc_target_name__=C66 -Dxdc_bld__profile_debug -D_DEBUG_=1 -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_bld__vers_1_0_7_2_0_10271 -DTDA3XX_BUILD -DTDA3XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_CAL_BUILD -DVPS_ISS_BUILD -DVPS_DSS_BUILD -I/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/include -I. -I../../../.. -Isrc -I/packages -I/data/code/binaries/links_fw/include/config/dms/tda3xx_custom_evm_bios -I/opt/tda3x/ti_components/codecs/framework_components_3_40_02_07/packages -I/opt/tda3x/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/opt/tda3x/ti_components/algorithms/vxlib_c66x_1_1_3_0/packages -fr=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fs=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fc src/edma3_drv_basic.c
# Compiling tda3xx-evm:c66xdsp_1:debug:edma3lld_drv: src/edma3_drv_adv.c
/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/bin/cl6x -ppd=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug/.deps/edma3_drv_adv.P -c -qq -pdsw225 -mv6600 --abi=elfabi -mo -eo.oe66 -ea.se66 -ms --embed_inline_assembly -DBUILD_C6XDSP -DBIOS_BUILD -DSYSBIOS --emit_warnings_as_errors -DA15_TARGET_OS_BIOS --symdebug:dwarf -Dxdc_target_name__=C66 -Dxdc_bld__profile_debug -D_DEBUG_=1 -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_bld__vers_1_0_7_2_0_10271 -DTDA3XX_BUILD -DTDA3XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_CAL_BUILD -DVPS_ISS_BUILD -DVPS_DSS_BUILD -I/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/include -I. -I../../../.. -Isrc -I/packages -I/data/code/binaries/links_fw/include/config/dms/tda3xx_custom_evm_bios -I/opt/tda3x/ti_components/codecs/framework_components_3_40_02_07/packages -I/opt/tda3x/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/opt/tda3x/ti_components/algorithms/vxlib_c66x_1_1_3_0/packages -fr=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fs=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fc src/edma3_drv_adv.c
/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/bin/cl6x -c -qq -pdsw225 -mv6600 --abi=elfabi -mo -eo.oe66 -ea.se66 -ms --embed_inline_assembly -DBUILD_C6XDSP -DBIOS_BUILD -DSYSBIOS --emit_warnings_as_errors -DA15_TARGET_OS_BIOS --symdebug:dwarf -Dxdc_target_name__=C66 -Dxdc_bld__profile_debug -D_DEBUG_=1 -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_bld__vers_1_0_7_2_0_10271 -DTDA3XX_BUILD -DTDA3XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_CAL_BUILD -DVPS_ISS_BUILD -DVPS_DSS_BUILD -I/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/include -I. -I../../../.. -Isrc -I/packages -I/data/code/binaries/links_fw/include/config/dms/tda3xx_custom_evm_bios -I/opt/tda3x/ti_components/codecs/framework_components_3_40_02_07/packages -I/opt/tda3x/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/opt/tda3x/ti_components/algorithms/vxlib_c66x_1_1_3_0/packages -fr=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fs=/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug -fc src/edma3_drv_adv.c
#
# Archiving tda3xx-evm:c66xdsp_1:debug:edma3lld_drv
#
/opt/tda3x/ti_components/cg_tools/linux/ti-cgt-c6000_8.2.4/bin/ar6x rq /data/code/binaries/lib/tda3xx-evm/66/debug/edma3lld_drv.ae66 /data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug/edma3_drv_init.oe66 /data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug/edma3_drv_basic.oe66 /data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug/edma3_drv_adv.oe66
--> error: '/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug/edma3_drv_init.oe66' not found
--> error: '/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug/edma3_drv_basic.oe66' not found
--> error: '/data/code/binaries/obj/edma3lld_drv/tda3xx-evm/66/debug/edma3_drv_adv.oe66' not found
/data/code/TDA3X/apps/build/rtos/makerules/rules_66.mk:206: recipe for target '/data/code/binaries/lib/tda3xx-evm/66/debug/edma3lld_drv.ae66' failed
make[3]: *** [/data/code/binaries/lib/tda3xx-evm/66/debug/edma3lld_drv.ae66] Error 1
make[3]: Leaving directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv'
/data/code/TDA3X/apps/build/rtos/makerules/common.mk:235: recipe for target 'c66xdsp_1' failed
make[2]: *** [c66xdsp_1] Error 2
make[2]: Leaving directory '/opt/tda3x/ti_components/drivers/edma3_lld_02_12_00_21/packages/ti/sdo/edma3/drv'
build_edma3lld.mk:18: recipe for target 'edma3lld' failed
make[1]: *** [edma3lld] Error 2
make[1]: Leaving directory '/data/code/TDA3X/apps/build/rtos/makerules'
Makefile:73: recipe for target 'edma3lld' failed
make: *** [edma3lld] Error 2
make: Leaving directory '/data/code/TDA3X'

Part Number: 66AK2G12

Hi,

I am developing a board using 66AK2G12 SoC and I'd like to have a confirm about the unused pins.
I read the datasheet where the "Connections for Unused Pins" is described. This chapter defines explicity the connection for several pins and recommends to tie-off unconnected pads because their internal pull up/down could be weak but the external pull up/down is not mandatory for the signal balls without Pad Configuration Register. For example we don't use ECC for DDR therefore, according to explanation above, can I leave DDR3_CB0X unconnected since these pads are not defined with a pad configuration register?

Thanks for the collaboration.

Regards

Graziano Rufolo

Electronic Hardware Design

Hitachi Rail  

Part Number: TMS570LS1227

Hello

I'm working with a TMS570 LS1227, configured as MibSPI slave, in a 4-wire comunication. The SPI master (an IMX6) sends out a frame of 60 bytes every 10 milliseconds.

I would like to use the MibSPI1 on the slave side.

I have configured the MibSPI1 as slave in Halcogen, setting Charlen = 16 in MibSPI Data Format 0 and Length = 30 for transfer Group 0.

Everything is fully working, on the slave side I can see the 60 bytes frame correctly received in 30 words of 16 bits. For each of the 30 word, the SPI master pulls down the Chip Select, transmits the 16bit data and then pulls up the Chip Select.

I would like to improve the performance of this communication (I want to shorten the time to trasmission/reception) , by setting the SPI master to keep the Chip Select low/enabled for all the 60 bytes frame (I mean Chip select driven low for all the 30 words and then driven high). On MibSPI slave side, which setting I have to do in Halcogen in order to cope with this communication pattern?

What I have to do  to manage the previously described communication pattern for MibSPI slave? Just select the "Chip Select Hold" in MIBSPI1 Transfer Group 0 to prepare the SPI slave?

Best regards

Part Number: DP83867CS

My customer has a problem with 1Gb PHY DP83867 - issue with packet loss.

System architecture is following:

1Gb switch connects up to 50 measuring devices, that send in real-time 200-byte packets, and the controller.

There is a DP83867 PHY and a Freescale ls1021 processor on a controller. The switch synchronously receives Ethernet packets which are transmitted to the controller for processing. The traffic is about 50 Mbps, IPG - 96ns.

Controller receives damaged packets with fcs error inSGMII or RGMII mode 3-5 times in 2 sec. Traffic is continuous at the same frequency.

For the diagnosis, the following experiments were carried out:

- other devices were taken instead of our controller. No packet loss.

- put an external switch between the switch and the controller. No packet loss.

Could you please help with identifying the problem?

Thank you

Part Number: UCC28780

Hello,

I am having an issue with a DCDC converter prototype using the UCC28780. I have chosen the RVS1 resistor for the appropriate brown-in/brown-out voltage desired, yet the actual brown-in threshold observed is much higher.

Additionally, there appears to be no difference between the brown-in and brown-out threshold, whereas the datasheet specifies the brown-out threshold to be 83% of the brown-in threshold.

RVS1: 27K0
RVS2: 8K20
Np: 13
Na: 2
Ns: 4
Vout: 30V

Desired brown-in threshold: approximately 66VDC (with RVS1 = 27K0 I should have 64VDC)

I have set the input voltage to 125V and the converter operates as expected:

CH1 (yellow): QL gate voltage
CH2 (green): QL drain voltage
CH3 (blue): Vbulk
CH4 (pink): Vaux

With a Na/Np ratio of 2/13, a Vbulk of 125V should give approximately 19V for the negative swing of Vaux. The 20.5V measured is pretty close to this.

Measuring the VS pin:

CH1 (yellow): QL gate voltage
CH2 (green): QL drain voltage
CH3 (blue): Vbulk
CH4 (pink): VS voltage

The VS pin is clamping the voltage to -262.5mV, which matches the specified -250mV.

I am not sure if the VS voltage when QL is off should look like this, with the large spike towards the beginning. Perhaps the scope probe is interfering with the signal.

When the input voltage is reduced to below 121VDC, it enters what looks like brown-out detection:

CH1 (yellow): QL gate voltage
CH2 (green): QL drain voltage
CH3 (blue): Vdd
CH4 (pink): Vaux

The switching for 56ms (close to the 60ms brown-out timer) followed by a UVLO cycle leads me to believe this is a genuine brown-out fault.

Zoomed in:

CH1 (yellow): QL gate voltage
CH2 (green): QL drain voltage
CH3 (blue): Vbulk
CH4 (pink): Vaux

When the input voltage is raised above 122VDC, the converter operates as in the first screen capture. There is practically no hysteresis with the brown-in/brown-out.

I feel like I am missing something obvious.

I would appreciate any insight into this problem.

Thanks,

Connor

Hello, help me build a class D amplifier for a guitar that has a SideGig-Guitar Evaluation Module board, I can’t find the amplifier board and power supply so that it is the same for the kit, thanks

Part Number: AWR1642BOOST

Hi All ,

We use an AWR1642boost with an ECU, whereas AWR1642BOOST Eval kit supports CAN FD and ECU supports only classic CAN. We know also that the AWR1642 Single-Chip 77- and 79-GHz FMCW Radar Sensor supports both CAN(MCAN) and CANFD(DCAN) :

1. Do we need a conversion CANFD To Classic CAN? (if yes how it should be done (software or hardware or both)
2. Could you please provide us CAN Technical Description for the AWR1642 Evaluation Module (AWR1642BOOST) ?
3. AWR1642BOOST CAN connector is only for CANFD or it's also wired to CAN (MCAN) ?

Thank you

Regards

Dear Engineer, 

When I use UCC 28780 design a 65W Active Clamp Converter by referring your reference design such as TIDA-01622A;

I met with some problems. The primary inductance value is 146 uH, Rbur1=196 kOhm, Rbur2=56 kOhm, Nps=6.5; Npa=6.5; Rvs1= 43 kOhm, Rvs2=9.1 kOhm; Rcs =0.17 Ohm;

Rrdm= 95.3 kOhm, Rtz = 300 kOhm, RFB= 22.1 kOhm, Rcomp=540 kOhm, Ccomp =100 pF, Ropp = 1 kOhm.  ISO 7710 is used as high-side level-shift.

The start-up process is normal and at 80Vac the circuit could start up normally. But even at the no-load condition, the circuit would enter the AAM mode automatically, with the load current increases, the AAM keeps all the time. Taking the 90Vac input for example, when the load current increases from 0A to 2.4A, the voltage between Rcs is as following. It indicates the negative peak magnetizing current is fixed and the positive peak magnetizing current increases with the load increasing.

I would like to consult how the UCC 28780 could detect the output condition and determine the different operation modes to sustain the stable output voltage such as 20V.

The FB pin, BUR pin, and CS pin all affect the operation mode. But do they affect the operation mode together or individually? 

If the circuit enter the AAM mode with complimentary PWML and PWMH signals, what might be the reason to trigger this abnormal operation?

Thanks,

Kailun

Part Number: TPS23758EVM-080

Part Number: TMS320C6746

Tool/software: Code Composer Studio

Hello

I request a example source  for below features.

-. H/W Interrupt (GPIO)

-. Queue Message (Message exchange between task and task)

-. Semaphores

 Best Regards.

Part Number: LAUNCHXL-CC3235SF

Hello,

I can successfully set standard HTTP headers such as req_content_type / "application/json" using the following command:

AT+HttpSetHeader = [index],[option],[flags],[format],[length],[data]

My question is how do I set a custom header; i.e. an option that does not exist?

Thanks in advance!

-Ben

Part Number: LM27762

Background:
We have designed a specialized instrumentation system with embedded micro controller/s.
Basically the instrumentation on board consists of 10 high impedance high voltage monitors and 10 isolated floating current monitors fault tolerant to 1000 VDC, both the current and voltage monitors can both measure an ac and dc component.

The system monitoring system utilizes 2 PGA117, 20 TS12A12511, 20 OPA197, 10 Lmp7715 10 SN6505 and 11 LM27762's.
We designed and had fabricated a PCB to evaluate system function and provide assurance that the system functioned as expected, before changing form factor and commitment to our first true prototype beta. In this first alpha prototype we have implemented only 4 channels of each of the voltage and current measurement sub systems.

Current status:
We have built and tested the supporting circuitry utilizing the on board micro controller and two channels of the current measuring sub system. All seems to be functioning well except the 2 LM27762's in the current measurement system and the lm27762 in the support circuit.
In the support circuit we have designed it for +/- 2.5Volts at 20mA per rail (1). The current measurement circuits lm27762 designed for +/-2.5 Volts at 2-5mA per rail (10).

Most of the systems have been simulated using Tina. The lm27762 have been evaluated using the flash based Web Bench. In addition we tried to directly design using the HTML version of web bench but it reports that the LM72262 is not implemented. We did open the old version design using the HTML version but went back to the old version since it seemed to lack some of the features of the old one. We also exported the design to Tina and have run large number of simulations.

What appears to be happening with the LM72262 is the positive regulator output is as designed, approximately 2.5V and has reasonable regulation with a stepped load. The output is certainly within the tolerance of the internal reference and voltage setting resistors. The problem is with the negative output. Typically it seems to falls into two categories with the three circuits so far implemented. Either no output at all (1-2mV) or a voltage somewhere around -0.8v.

I thought I had put the wrong caps or resistors in place so I removed all components including the LM72262 and placed the caps in first, and measured in circuit are all correct no shorts and connected to the right places. Tested the 4 resistors off board and placed them and checked values in on board including testing for shorts, then placing the LM72262 and checking for shorts and opens using a microscope. Powered up and had exactly the same problems. I went back to Tina and web bench and worked for a day changing the macro models for various esr's and component values including input caps and input supply voltages. Under all of these scenarios I could not reproduce the problem in any simulation.

The board fab house also tested the board to match the layout with no issues. Of course during the simulations the start-up wave forms and running wave forms are different based on values etc but outputs all stabilized to +/- 2.5 Volts. Thinking I may have damaged the device I replaced them with the same result. I decided manually to experiment with different values of capacitor concentrating on the swing cap, cp and the output cap on the negative supply. I discovered by accident, by forgetting to solder cp in place, that I now had the positive supply OK and an incorrect but higher negative output, in some cases -3.6. I put in a lower cp of approximately 1uF and then experimented with the op cap. I found if I reduced this to 1uF as well the negative output started to stabilize at closer to the target -2.5.
I went back to Tina and implemented the changes and the simulation results looked OK
I eventually settled on a 2000pF XR7 cap for the Cp and now I have both the positive and negative somewhat in spec. The positive reg responds OK to a step change in current the negative supply drops a little but is still OK for our needs. On the other two regulators I changed the values to mimic the first regulator, however, I omitted the cp cap altogether and at the lower current requirement they seem to work satisfactorily.

My concern is that the circuits may not be stable in actual use. So finally to get to my question what am I doing wrong to make cp and negative output rail cap so very sensitive. To-date I have also assumed that I may have damaged the devices so I have replaced all of them several times over but all seem to respond in the same way. We have used up at least 10 of my purchase of 20. It should be noted that I am using ESD precautions with the bench and soldering equipment.

Should we persevere with the LM72262 or use different methods to obtain +/- 2.5v at 5-20mA, and if we are to use other devices what would you suggest?

Part Number: DS90UH947-Q1

Hi 

We are using 3.3V MCU whose IO is 3.3V are below connection correct

1. Can i connect PDB pin directly to MCU's 3.3V I/O ?

2. Is it correct I2C connect directly to MCU's 3.3V I2C and also pull high to 3.3V?

3. is it correct INTB pull high to 3.3V

4. We do not use REM_INTB pin, can we left it open?  

Part Number: BQ25120A

Part Number: BQ40Z60

Hello Team,

Can you help me with a schematic review using the BQ40Z60. I cant attach the schematic but will direct message attach over E2E or email. Thanks for the help!

Part Number: DS90UB953-Q1

Dear Sir.

Does TI Serdes have a roadmap that imports functional safety(ASIL) information or schedule?

Please provide relevant information for our reference. Thanks~