LAUNCHXL-CC1350: xds110 bricked?

October 15, 2019, 8:23 am

≫ Next: DS90UB954-Q1: how to configure the 0,1, 2,3 based on the virtual channel

Part Number: LAUNCHXL-CC1350

Hello,

I'm setting up an development environment for the cc1350 and the cc2650 based on openocd and arm-none-eabi-gdb.

On the cc2650 it works, on the cc1350 launchpads I had few problems (probably unrelated to this), and during an attempt to fix it, I upgraded the xds110 firmware (to the version 3.something), but then openocd stopped working. This is the error it shown up.

Error: JTAG tap: cc13x0.jrc  expected 1 of 1: 0x0b9be02f (mfg: 0x017 (Texas Instruments), part: 0xb9be, ver: 0x0)

After a while I though that probably the wrong ID was due to the xds110 firmware v3, so I tried to install an older fiwmare in the xds110 (I found it in an old instance of ccs I had installed a couple of years ago). However, after the update (I've done it using xdsdfu), the device looks bricked. I don't see any activity when I plug the usb, and the windows Device Manager don't react when I plug it.

Moreover, since I was not happy with this, I tried the same procedure on the cc2650 launchpad (that was working) with the same result, the device i no more accessible...

So, did I brick the debuggers? Can I do something to fix?

Thank you,

Davide.

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DS90UB954-Q1: how to configure the 0,1, 2,3 based on the virtual channel

October 15, 2019, 8:27 am

≫ Next: CC3220SF: Code signing and secured/signed file

≪ Previous: LAUNCHXL-CC1350: xds110 bricked?

Part Number: DS90UB954-Q1

Hi team,

My customer cannot under how to configure the 0,1, 2,3 based on the virtual channel. Could you please share more details about it? Thanks.

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CC3220SF: Code signing and secured/signed file

October 15, 2019, 8:29 am

≫ Next: AWR1243: external clock

≪ Previous: DS90UB954-Q1: how to configure the 0,1, 2,3 based on the virtual channel

Part Number: CC3220SF

Hi all,

I need some clarification about certs, about SSL/TSL I understand all but I'm little confused about certs for code signing and secured files, my questions are:

1) Which is the reason to add a sign to the firmware? Normally, if I understand right, in the pc world signing for example an app or an exe is used to allow who try to execute it to be sure about the app origin (like sign in pdf document), but into firmware world, why a microcontroller should check the authenticy of the firmware that is flashed into it?

2) is a CA root certificate (that is self signed) that add the sign (using its private key) to the firmware?

3) who trust the trust chain used to sign the firmware (like the kitchen and egg dilemma:))?

4) about user file, they can be secured with or without sign if I understand right. But I see some difference in the case they are created by uniflash or by code: by uniflash is required a CA certificate and its private key to create the sign, by code instead, if the file is edited, on close function is required the certificate and the sign as an array (???), if the file is created instead, it returns a token that is written inside host application (I don't understand how and where is written, and how is it available after a power off/on cycle).

5) which is the difference between sign embedded into a secured file and sign in a separated file?

6) Why a code sign cert has to be bought? If I'm the entity that will flash the code sign trust chain, surely all firmware signed by me are authentic, so I could generate all the trust chain by tool like OpenSSL, why not?

I read a lot of TI pdfs and forum, but I think that is missing a simple schematic that specify all the logic and criteria behind this argument.

Thanks a lot

Riccardo

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AWR1243: external clock

October 15, 2019, 8:30 am

≫ Next: CC1352P: Power table entry for 10dbm is missing in the later SDK's

≪ Previous: CC3220SF: Code signing and secured/signed file

Part Number: AWR1243

Hello team,

I have the following questions:

1. Can external PLL/VCO be used instead embedded 20 GHz PLL synthesizer? The AWR1243 on-chip synth. has very poor phase noise performance. Anyway, in cascaded application only one PLL synth work, while other just sleep. So, why not to use external high-quality chirp modulated PLL source with sync signal for all chips? If necessary, the same 40 MHz clock may be used as clock for the external PLL and AWR1243.

2. Can we recommend a high quality GaAs mmW LNAs between receive antennas and receiver inputs of the AWR1243? The 15dB noise figure for AWR1243 is high compared to some external devices with 3.6 dB. What max RF input level to avoid the AWR1243’s LNA being broken?

3. For multichip mmW cascading much easy to use separate chips on transmit and receive. It allows flexible separation and better isolation of the transmit and receive antennas arrays. Can we use the AWR1243 in receive or transmit mode only, by disabling excessive function to save the power?

Thanks!

Errol

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CC1352P: Power table entry for 10dbm is missing in the later SDK's

October 15, 2019, 8:33 am

≫ Next: LM73605-Q1: The Rsync definition and purpose

≪ Previous: AWR1243: external clock

Part Number: CC1352P

Team,

in SDK simplelink_cc13x2_26x2_sdk_3_10_00_53 (and before) we were using the RF_TxPowerTable_HighPAEntry entry for 10dbm BLE (file: ble_user_config).

Now in the latest SDK:

We dont see the 10dbm in the table anymore - goes from 5dbm to 14dbm with no entries in between.
It has been moved to another file - ti_radio_config - I guess for sysconfig reasons.

Are these changes documented somewhere ? How can I derive the 10dbm table value ?

I then went to latest SmartRF studio and it reflects the same TX power entries for the 1352P, and 2652P. Also I dont understand why the 1352 does not appear in the 2.4Ghz tab ?

Thanks.

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LM73605-Q1: The Rsync definition and purpose

October 15, 2019, 8:33 am

≫ Next: AM3358: DDR Data Integrity check Failed

≪ Previous: CC1352P: Power table entry for 10dbm is missing in the later SDK's

Part Number: LM73605-Q1

Hi Expert,

I didn't see the detail description about Rsync, could you help to know why need to add Rsync when use external clock ? and why recommend to use 50 to 100 ohm of the terminal resistor?

thanks.

Mark

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AM3358: DDR Data Integrity check Failed

October 15, 2019, 8:34 am

≫ Next: TPS65987D: HV1 switch does not close in dead battery condition

≪ Previous: LM73605-Q1: The Rsync definition and purpose

Part Number: AM3358

Hi,

I am working on AM3358 based custom board and RAM memory size is 1GB RAM( part no - IS43TR85120B-125KBLI )

I done RAM config using AM335x_EMIF_Configuration_Tool.xlxs. i try to test ddr ram using GEL file. i am getting Data Integrity check Failed.

pls give me a solution for that and thanks in advance.

my GEL file DDR3 values below:

/*******************************************************************
//DDR3 PHY parameters
//*******************************************************************

#define CMD_PHY_CTRL_SLAVE_RATIO 0x00000100
#define CMD_PHY_INVERT_CLKOUT 0x00000001

#define DATA_PHY_RD_DQS_SLAVE_RATIO 0x00000041
#define DATA_PHY_FIFO_WE_SLAVE_RATIO 0x000000d4
#define DATA_PHY_WR_DQS_SLAVE_RATIO 0x000000d0
#define DATA_PHY_WR_DATA_SLAVE_RATIO 0x00000110

#define DDR_IOCTRL_VALUE 0x0000018B

//******************************************************************
//EMIF parameters
//******************************************************************
#define ALLOPP_DDR3_READ_LATENCY 8
#define ALLOPP_DDR3_SDRAM_TIMING1 0x0AAAD4D3
#define ALLOPP_DDR3_SDRAM_TIMING2 0x246B7FDA
#define ALLOPP_DDR3_SDRAM_TIMING3 0x50FFE67F

#define ALLOPP_DDR3_SDRAM_CONFIG 0x61A053B2
#define ALLOPP_DDR3_REF_CTRL 0x00000C30
#define ALLOPP_DDR3_ZQ_CONFIG 0x50074BE1

Regards,

Jagadeesh

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TPS65987D: HV1 switch does not close in dead battery condition

October 15, 2019, 8:39 am

≫ Next: ADS1258: SPI Communication issues

≪ Previous: AM3358: DDR Data Integrity check Failed

Part Number: TPS65987D

Hello,

In my system, I use the USB-C connector as a Power Adapter input for the CPU board. This means that there is no battery in my system, I connect an USB-C charger and expect the 5V to be routed to my on board power supply which will supply the CPU. Finally this CPU will program the TPS65987 for extended features.

The TPS65987 has no Flash connected. I expect to program it though I2C when CPU has booted.

I use the BP_ECWait_Internal config:

What I have today:

* When I supply my CPU directly, and I program the TPS65987 with I2C, the PDO setup work properly. It does for example negotiate a 15V supply with the Power Adapter, and closes the HV1 power switch with no problem. The events (like sink PDO1 negotiated) do work also. If PDO are limited to 5V, it finished at 5V.

* Now If I only connect the Power Adapter to the USB-C (Nothing alive on the board yet, no voltage, no supply), the power adapter sets the VBUS to 5V, BUT the HV1 switch does not close, even if the LDO_3V3 is at right voltage, and the ADCIN1 is at 0.34V.

*I also tried to use the BP_ECWait_External, hoping that the GPIO16 would toggle (GPIO16 is supposed to enable an external switch instead of internal). But it does not work.

Does somebody have clues or proposal of tests to find out the problem ?

Thanks a lot.

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ADS1258: SPI Communication issues

October 15, 2019, 8:42 am

≫ Next: SN74LVC125A: current support

≪ Previous: TPS65987D: HV1 switch does not close in dead battery condition

Part Number: ADS1258

I'm working on a customer issue where an FPGA is having trouble communicating with the ADS1258 through SPI port. They have tried a sample C program from the TI website. We are able to control the PWDN and RESET pins. START and CLKSEL are held high through hard wires. CS, SDI, SCLK and SDO connect to the FPGA SPI pins. The FPGA firmware has a Texas Instrument mode, which keeps the clock running continuously. This would seem to be necessary since the data sheet says "If SCLK is held inactive for 4096 or 256 fclk cycles, read or write operations in progress will terminate and the SPI interface resets."

There are other FPGA modes which do not do that. We have used a different mode successfully with a different TI A/D converter.

Questions:

1. Do we need to keep the SCLK line running in this manner with this device?
2. The sample code seems to read the data and status signals through the SPI in 8 bit chunks. Is that what we need to do?
3. Are there any samples of what the SPI signals would look like when successfully operating?

I have attached a scope screen shot showing an attempt at communication. You can see the clock is running continuously. The CS goes high at the start of communication. The SDI pin is toggled with the attempted command. However, the SDO pin seems to communicate almost randomly.

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SN74LVC125A: current support

October 15, 2019, 8:46 am

≫ Next: BQ76920EVM: BQstudio cannot find the correct device.

≪ Previous: ADS1258: SPI Communication issues

Part Number: SN74LVC125A

Hi,

I want to know does this IC support 20mA current load at 3.3v and 10mA load at 2.5v.

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BQ76920EVM: BQstudio cannot find the correct device.

October 15, 2019, 8:26 am

≫ Next: LMX2615-SP: Screening and QCI for part number LMX2615W-MLS

≪ Previous: SN74LVC125A: current support

Part Number: BQ76920EVM

The BQ76920EVM is running firmware v1.04. When I start the BQstudio v1.3.93, it says that the auto detected device is 1e9b_1_04 then when I choose 1E9B_1_03_bq78350-R1.bqz from the list, it complains that the detected device is not compatible and the system may enter an unrecoverable state. I also tried with the BQstudio1.3.86.3. The result is the same.

How can I proceed safely ?

Thanks in advance.

↧

LMX2615-SP: Screening and QCI for part number LMX2615W-MLS

October 15, 2019, 8:47 am

≫ Next: UCC28881: Limit the peak current in a Flyback using UCC28881

≪ Previous: BQ76920EVM: BQstudio cannot find the correct device.

Part Number: LMX2615-SP

I'm looking for the specific Screening and QCI flows for part number LMX2615W-MLS.

I expect if follows a modified flow, as specified in MIL-PRF-38535, Class S/V...

Is there a document that describes this Space Grade flow?

Best regards,

Greg

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UCC28881: Limit the peak current in a Flyback using UCC28881

October 15, 2019, 8:54 am

≫ Next: TPS25740B: NRND Details

≪ Previous: LMX2615-SP: Screening and QCI for part number LMX2615W-MLS

Part Number: UCC28881

Hi Experts!

I designed a Flyback using UCC28881,

Input power is 300mW,

input DC-rail is regulated at 300V

and we are using a hysteresis control scheme (manipulating the FB pin) to regulate the output voltage at 700V.

However, the efficiency is very low (in the range of 40 ~50%). I know that this IC powers-up from the high-voltage sinking somewhere around 100uA in HVIN pin.

I am trying to limit the peak current to reduce losses and increase the efficiency a bit. Is there any way to do this in this package?

Any other ways to increase the efficiency?

Thanks!

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TPS25740B: NRND Details

October 15, 2019, 8:56 am

≫ Next: DLP2000: Structured Light Code

≪ Previous: UCC28881: Limit the peak current in a Flyback using UCC28881

Part Number: TPS25740B

Hello,

I see the TPS25740B is NRND because it doesn't pass the latest PD3.0 specs, but is there more detail I can get on this? (Specifically which specs it does/doesn't pass)

Are there any specific devices on the market that you know it is not compatible with? I am more concerned with meeting the current device market than meeting the latest spec.

Thanks for the help!

Adam

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DLP2000: Structured Light Code

October 15, 2019, 8:56 am

≫ Next: DS90UB962-Q1: connect DS90UB953-Q1 mode selection

≪ Previous: TPS25740B: NRND Details

Part Number: DLP2000

Hello,

I'm working with the DLP2000 EVM and the DLP2600. What I'm looking to accomplish is use 40 bmp images that represent a mask that I would like to load up onto the DMD. Like others, I came across Kyle Rakos' code for doing this. I am, however, having some issues I can't seem to figure out.

I'm hoping to integrate this into the code I've already been writing via Visual studio, so I'll need to build it out specificly for that, but I can't seem to build it stand alone via Visual Studio, I keep getting this error. T

1>C:\Users\mascenzi\source\repos\DMDMask\DMDMask\display_core.c(73,72): error : ‘MAP_ANONYMOUS’ undeclared (first use in this function)
1>C:\Users\mascenzi\source\repos\DMDMask\DMDMask\display_core.c(73,72): error :   *buffer = mmap (0, *screensize, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, (off_t)0); // Second buffer
1>C:\Users\mascenzi\source\repos\DMDMask\DMDMask\display_core.c(73,72): error :

I'm also getting a lot of warnings.

Obviously, because I'm using VS, I'm not in the opt/scripts/device/bone/capes/DLPDLCR200/structure_light folder. Correct me if I'm wrong, but this shouldn't matter as there are no other references to any of the other directories.

I'm assuming that it has something to do with how its being built.

First thing I noticed was that the make file is using gcc instead of g++ that VS is using. The 2nd thing that I noticed was the CFLAG. Could someone point me in the right direction for building this via Visual Studio?

In regards to my VS setup, I'm using VS2017. I created the project as an Empty Linux project, under the Cross Platform > Linux template. Added each of the header and source files into the project under a "Headers" and "Source" folders.

Thank you in advance.

Michael

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DS90UB962-Q1: connect DS90UB953-Q1 mode selection

October 15, 2019, 8:59 am

≫ Next: TMS3705: TMS3705 receive sensitivity

≪ Previous: DLP2000: Structured Light Code

Part Number: DS90UB962-Q1

Hi Sir,

I am checking the datasheet about DS90UB962-Q1 about mode selection. Due to this does not mention when we link DS90UB953-Q1 (Tx) DS90UB962-Q1 (Rx). Please kindly help to check what mode should we select in DS90UB962-Q1. The datasheet page 6 Table2. (Strap Configuration Mode Select)

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TMS3705: TMS3705 receive sensitivity

October 15, 2019, 9:00 am

≫ Next: Recommendation for MCU

≪ Previous: DS90UB962-Q1: connect DS90UB953-Q1 mode selection

Part Number: TMS3705

Hi,

What is the minimum receive amplitude that the TMS3705 can successfully demodulate i.e. receive sensitivity?

I am trying to calculate the maximum uplink range for a specific application, and my missing piece of information is the FSK receive sensitivity.

Thanks.

Kind Regards

Paul Lotter

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Recommendation for MCU

October 15, 2019, 9:00 am

≫ Next: LAUNCHXL-CC1350: High-Speed Mode with Advanced Packet Mode (CMD_PROP_RX_ADV/CMD_PROP_TX_ADV)

≪ Previous: TMS3705: TMS3705 receive sensitivity

Hello team,

my customer is looking for an MCU which has an integrated Ethernet controller and a footprint smaller than 6x6mm, do we have any device that could suit these needs?

Thank you in advance for your support!

Best regards,

Adrian

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LAUNCHXL-CC1350: High-Speed Mode with Advanced Packet Mode (CMD_PROP_RX_ADV/CMD_PROP_TX_ADV)

October 15, 2019, 9:00 am

≫ Next: CC2640R2F: Muxing ADC Vref to a pin

≪ Previous: Recommendation for MCU

Part Number: LAUNCHXL-CC1350

Is there any documentation available for setting up and using High Speed mode for the CC13x0/CC26x0 line of radios? It's advertised with the radio, but I've found one bit of example code for setting up HSM which more-or-less works and absolutely no documents explaining it. In addition to the lack of docs, the command structures for CMD_HS_TX/CMD_HS_RX in rf_hs_cmd.h are in a completely different order from the command structures for CMD_PROP_RX/CMD_PROP_TX found in rf_prop_cmd.h and in the CC13x0 documentation. I can't tell if that's because the processor reads the commands differently (why would it be implemented like that?) or if the provided driver is wrong but close enough to work in some cases.

The end goal of this exercise is to use high-speed mode with the advanced packet structure so that we can send more than 255 bytes at a time. We're using the simplelink_cc13x0_sdk_3_20_00_23 libraries.

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CC2640R2F: Muxing ADC Vref to a pin

October 15, 2019, 9:09 am

≫ Next: CCS/TMS320C6727B: Assigning GPIO to EMIF Address lines using genBootCfg Utility

≪ Previous: LAUNCHXL-CC1350: High-Speed Mode with Advanced Packet Mode (CMD_PROP_RX_ADV/CMD_PROP_TX_ADV)

Part Number: CC2640R2F

Hi,

I would like to output the 1.48V ADC Vref to a pin as a reference for an amplifier stage. This was covered already here, but for the AUXIO7 pin only - can the signal be output to other pins or, more broadly, is there a description for the bit-values of the MUX4 register which controls this (it is not detailed in the TRM)?

Also, is there a way of performing this muxing from within the Sensor Controller using its bundled commands?

Thanks,

Jamie

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