Part Number:DS90UB940-Q1
Hi,
I used DS90UB940-Q1 as Deserializer and DS90UB925Q-Q1 as Serializer. I can receive the normal signal. But I followed the guide in the datasheet to set up the BIST function and the PASS and LOCK pins are always low.
Could you please explain the detailed steps of building BIST function between DS90UB940-Q1 and DS90UB925Q-Q1?
Thanks.
Kevin Xiong
Part Number:ADS1299
Hi Folks,
I have a custom board with ADS1299 (the 8 ch version). I am using the SPI_MODE1 and 10 MHz clock rate. To see, what I have done, I check the SPI clock and the /DRDY signal on oscilloscope.
The problem is that I would like to stop /DRDY signal: it is my interrupt source, so I have tried SDATAC and STOP commands too without success. On the oscilloscope I see the data ready.
To validate my communication, I set the data rate to 2kSPS (instead of the default 250SPS), then read the registers back and it seems to work: the CONFIG1 register contains the right value and on the scope I also see the /DRDY signals with the new frequency.
Can anybody help me, what did I miss?
Regards,
Norbert
Part Number:TMS320F28335
Tool/software: Code Composer Studio
Hi,
we tried to code tms320f28335 and debug into flash but after that the processor doesn't connects with the debugger
Part Number:AM3352
Tool/software: TI-RTOS
Hi
I am testing UDP data with the NDK. When I call the sendto function,
It returns -1 and then I call fdError().Check the error code, the received error code is 6,
where I have not configured?
this is my test code:
void ftpserver_thread_entry(UArg a0, UArg a1)
{
SOCKET sclient = NULL;
struct sockaddr_in sin;
char * sendData = "1234567890";
memset(&sin, 0, sizeof(sin));
sin.sin_family = AF_INET;
sin.sin_port = NDK_htons(5555);
sin.sin_addr.s_addr = NDK_htonl(INADDR_ANY);
int len = sizeof(struct sockaddr_in);
int ret = 1;
ret = fdOpenSession (TaskSelf ());//必须在第二级的任务调用才能成功？？why？？？
UART_printf("fdOpenSession = %d\n",ret);
sclient = socket (AF_INET, SOCK_DGRAM, IPPROTO_UDP);
if(sclient == NULL)
{
UART_printf("socket open failed\n");
return;
}
else
{
UART_printf("socket open successful!\n");
}
if (bind(sclient, (struct sockaddr *)&sin, sizeof(sin)) < 0)
{
UART_printf("bind failed!\n");
}
while (TRUE)
{
ret = sendto(sclient, sendData, strlen(sendData), 0, (struct sockaddr_in *)&sin, len);
UART_printf("sendto result = %d\n",ret);
ret = fdError();
UART_printf("fdError = %d\n",ret);
Task_sleep(10000);
}
}
Part Number:TMS320F28377S
Hi
My customer use 28377+ FPGA(spartan6) to extend 2pcs RAM(512K) and Flash(128K), double check with you about the hardware design and software change.
CPU1RAM is enabled by 74LV32
F28377
FPGA
Use CS2 to extend RAM1 RAM2, CS4 is used to extend Flash, read and writing controlled by FPGA
Change example code as below
emif1_16bit_asram.c
Set IO to function 2 as expansion port
GPIO92 used for XA19, No changes in others code.
CCS7.4 MEMOREY observation
1. Write a 32-bit data, only the upper 16 bits have been written in, the address value will be cleared immediately when next statement is executed.
2. When writing to address 0x100002, the address line A0-A4 is 1000; How to configure XA19? is it necessary to set?
3. Emif1ConfigRegs.EMIF1MSEL.all = 0x93A5CE71; After write in, the read out data is 01?
Thanks a lot.
Part Number:DRA72XEVM
Tool/software: Linux
Hi TI team,
We are using PVSDK_03_04 SDK in DRA72XEVM board.
While running apps.out getting ### XDC ASSERT - ERROR CALLBACK START ###
[ 50.784428] DMA: Module install successful, device major num = 242
[ 50.793642] DRV: Module install successful
[HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6993000 of size 0x00100000
[HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6f93000 of size 0x0fa00000
[HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6ed3000 of size 0x00040000
[HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6f13000 of size 0x00080000
[HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000
[HOST] OSA: IPU1-0 Remote Log Shared Memory @ 0xa0200000
[HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140
[HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0
SYSTEM: System A15 Init in progress !!!
[HOST] [IPU1-0] 30.936100 s: ***** IPU1_0 Firmware build time 16:47:32 Apr 23 2019
[HOST] [IPU1-0] 30.936283 s: *** SYSTEM: CPU Frequency <ORG = 212800000 Hz>, <NEW = 212800000 Hz>
[HOST] [IPU1-0] 30.939150 s: SYSTEM: System Common Init in progress !!!
[HOST] [IPU1-0] 30.948362 s: UTILS: CIO: Init Done !!!
[HOST] [IPU1-0] 30.948453 s: SYSTEM: IPC init in progress !!!
[HOST] [IPU1-0] 30.948575 s: SYSTEM: Attaching to [DSP1] ...
[HOST] [IPU1-0] 31.169950 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!!
[HOST] [IPU1-0] 31.170042 s: SYSTEM: Notify register to [DSP1] line 0, event 15...
[HOST] [IPU1-0] 31.170194 s: SYSTEM: Notify init done !!!
[HOST] [IPU1-0] 31.171933 s: SYSTEM: MsgQ init done !!!
[HOST] [IPU1-0] 31.172878 s: RpmsgInit in progress...
[HOST] [IPU1-0] 31.172970 s: Connection established with HLOS, calling rpmsgInit
[HOST] [IPU1-0] 31.173031 s: rpmsgStartUp 209
[HOST] [IPU1-0] 31.173275 s:
[HOST] [IPU1-0] 31.173305 s: ### XDC ASSERT - ERROR CALLBACK START ###
[HOST] [IPU1-0] 31.173397 s:
[HOST] [IPU1-0] 31.173732 s: assertion failure
[HOST] [IPU1-0] 31.173793 s:
[HOST] [IPU1-0] 31.173854 s: ### XDC ASSERT - ERROR CALLBACK END ###
[HOST] [IPU1-0] 31.173915 s:
[HOST] [DSP1 ] 31.167571 s: ***** DSP1 Firmware build time 16:46:53 Apr 23 2019
[HOST] [DSP1 ] 31.167602 s: *** SYSTEM: CPU Frequency <ORG = 600000000 Hz>, <NEW = 750000000 Hz>
[HOST] [DSP1 ] 31.167785 s: SYSTEM: System Common Init in progress !!!
[HOST] [DSP1 ] 31.167968 s: UTILS: CIO: Init Done !!!
[HOST] [DSP1 ] 31.167998 s: SYSTEM: IPC init in progress !!!
[HOST] [DSP1 ] 31.167998 s: SYSTEM: Attaching to [IPU1-0] ...
[HOST] [DSP1 ] 31.169950 s: SYSTEM: Attaching to [IPU1-0] ... SUCCESS !!!
[HOST] [DSP1 ] 31.169981 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15...
[HOST] [DSP1 ] 31.170011 s: SYSTEM: Notify init done !!!
[HOST] [DSP1 ] 31.170133 s: SYSTEM: MsgQ init done !!!
[HOST] [DSP1 ] 31.170194 s: RpmsgInit in progress...
[HOST] [DSP1 ] 31.170255 s: SYSTEM: IPC init DONE !!!
[HOST] [DSP1 ] 31.170835 s: SYSTEM: System Common Init Done !!!
[HOST] [DSP1 ] 31.170865 s: SYSTEM: System DSP Init in progress !!!
[HOST] [DSP1 ] 31.171018 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024
[HOST] [DSP1 ] 31.171048 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB)
[HOST] [DSP1 ] 31.171109 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 522056 B (509 KB)
[HOST] [DSP1 ] 31.171140 s: SYSTEM: Initializing Links !!!
[HOST] [DSP1 ] 31.177758 s: SYSTEM: Initializing Links ... DONE !!!
[HOST] [DSP1 ] 31.177819 s: lz4CompDecomp Init
[HOST] [DSP1 ] 31.177850 s: SYSTEM: System DSP Init Done !!!
[HOST] [DSP1 ] 31.199780 s: Connection established with HLOS, calling rpmsgInit
[HOST] [DSP1 ] 31.199810 s: rpmsgStartUp 209
[HOST] [DSP1 ] 31.199871 s:
[HOST] [DSP1 ] 31.199902 s: ### XDC ASSERT - ERROR CALLBACK START ###
[HOST] [DSP1 ] 31.199902 s:
[HOST] [DSP1 ] 31.199993 s: assertion failure
[HOST] [DSP1 ] 31.200024 s:
[HOST] [DSP1 ] 31.200024 s: ### XDC ASSERT - ERROR CALLBACK END ###
[HOST] [DSP1 ] 31.200054 s:
Please help me resolve this issue..
Thanks & Regards,
Sudhi
Part Number:BQ34110
Hi,
We are performing GPC Cycle to learn Full charge capacity and other parameters.
Discharge Endpoint (10V) and Charge Endpoint(14.6V) are updated according to our Battery pack.
But after starting the GPC Cycle, Precycle Discharge block is not changing the state to precycle relax block even after reaching the pre-cycle discharge endpoint.
States are changing only when Board is Turned OFF and ON. Is this how GPC Cycle works??
Please suggest where we are facing the problem and Let us know the proper procedures we need to follow in GPC Cycle.
Part Number:AM5718
Tool/software: TI-RTOS
For building SBL component ,document(http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#boot) describes two steps
Part Number:BQ24780S
Hi,I am from ASUS SZ NB POWER Team.We have some questions about bq24780 now.Our protection use the independent comparator of bq24780(when CMPIN pull high,CMPOUT pin's output is low,our protect will be enable).We find independent comparator doesn't work at the second protection after ACFET is latched off .
we can find COMPOUT pull low when AC_BAT_SYS is up to 25v at the first time.however,when AC_BAT_SYS pull up to 25v again,COMPOUT doesn't pull low.Can you give a reason for this?Our ovp is under 26V,which is charge IC's ovp.In normal operation,our ovp will work before charge IC trigger ovp.
Before ACFET is latched off,our ovp works normally with bq24780's independent comparator.There is a picture about it below.
.In fact ,COMOUT can change its level when the ACFET is latched off.It fails to work after several transformation.
we find that the independent comparator fails to work .COMOUT pull high when COMIN arrive at 2.372v.
What is the difference between ACFET is latched off or not?Why independent comparator dosen't work persistently? And we want to know how to make sure that the independent comparator will work normally.
Thanks!
Part Number:DLPLCR4500EVM
In the description it is mentioned there is chipset. Does this inlcude DMD as well?
Part Number:LM317
Hi,
We are using LM317 IC for regulation purpose ,where input voltage is 24V . Now with the output resistor settings I am getting 20.5V as well as 23.5V. But the datasheet says minimun headroom of 3V has to be given between input and output for the the IC to operate in regulation mode if the headroom is not provided it works in drop out mode. My concern is if the IC is operating in drop out mode and operating for a long time what effect will it have on Thermal condition of the IC, Stability and in drop out mode how long is it possible to operate without any failure?
Please provide the details ASAP.
Thank you
Part Number:TMDSSOLARPEXPKIT
Tool/software: Code Composer Studio
Respected TI community
Greeting!! I want to confirm if the TMDSSOLAR(P/C)EXPKIT has a data acquisition capability or not? In the watch window, I am able to see the continuous values of voltage, power and current. Can these values are stored in any type of array, where I can used these stored values later?
Waiting for your kind response.
Part Number:BQ76920
Hi Team,
My customer burned the fuse on battery pack protection broad during short circuit test at 55C. They didn't meet the same issue while testing at 25C.
May I know the SCD comparator offset drift value or what else might cause such issue?
Thanks and best regards,
Victor
Part Number:LAUNCHXL-CC1310
Tool/software: TI-RTOS
Hi,
I intend to change the extended address of CC1310 and give it a customised address of my own and communicate thereafter. Is it possible to do it ?
Regards
Part Number:DRV8323R
(Please visit the site to view this file)Hi,
We are using DRV8323RS in 1x PWM mode
We are able to read and write the values on registers through SPI.
Default values are correct according to datasheet.
But when we are changing it into 1x PWM mode by changing the values of registers. Its show fault.
We have set the values as shown below in registers->
Driver Control Register (address = 0x02) ==> 0x0040
Gate Drive HS Register (address = 0x03)==> 0x0388
Gate Drive LS Register (address = 0x04)==> 0x07AA
OCP Control Register (address = 0x05)==> 0x0159
CSA Control Register (address = 0x06)==> 0x0283
Then it shows Fault according to below registers
Fault Status Register 1 (address = 0x00) ==> 0x0500 (Fault +Indicates gate drive fault condition )
Fault Status Register 2 (address = 0x01) ==> 0x0004 (Indicates gate drive fault on the B low-side MOSFET)
And on GHx its giving 24v and on GLx its giving 0v
And I have attached schematic also, please review it.
Connections-:
We have connected MCU with EVM according to 1x PWM Mode
Enable pin ==> MCU GPIO (Write High)
SCLK pin ==> SPI Serial clock pin
SDI pin ==> MOSI
SDO pin ==>MISO
nSCS pin ==>Chip Select
INLC (Brake) ==>MCU GPIO (Write High)
INHC (DIR) ==>MCU GPIO (Write HIGH)
INLA ==>HALLA of motor
INHB ==>HALLB of motor
INLB ==>HALLC of motor
nFault ==> MCU GPIO (Read High) No fault case
Cal ==> MCU GPIO (Write LOW)
Power Supply 24v
Please help to solve this issue. Thanks in advance.
Part Number:DS90UB954-Q1
Dear,
Based on TI recomendation regarding PCB Tracks impedance of FPDLink, we have this table:
Since you have to measure the S parameters working in PoC mode, I mean single ended, could you confirm, which is the proper way to do this measurements?, with VNA. As far as I understand:
Measurement of S11 parameters, 954 IC has been removed from the PCB, and two termination resistor has been soldered
In this case, to measure S21 Paremeter.
Thanks and BR