OPA835
Customer are using OPA835 with ±2.7V P/S. need THD data. in DS there's no data for VOUT P-P for above 2VP-P. please advise!
View ArticleADS5281 ..
Hello ,can anyone help on this please,I am working on project named 'Data Acquisition System'. here I am using ADS5281 8 channel and 12 bit output , here output of ADS5281 will be differential signal...
View ArticleFailed to run example code from TI Resource Explorer on Pandaboard ES
HiI am trying to run the Hello example code from TI Resource Explorer on the DSP core(c646x) of Pandaboard ES with Jtag(XDS510). The example project is from /SYSBIOS/C6000/OMAP4/PandaBoard_ES/Generic...
View ArticleExtending the sensing voltage range of the INA219
Dear e2e,I am looking to use the INA219 as a system indicator in order to monitor a battery-powered audio amplifier. The battery is as 12V system, which fits the INA219 fine. However, the output of the...
View ArticleBest practice for accurate square wave generation?
I have a MSP430F2619 HT CPU with an external 10Mhz clock. Using CCS.I want to output the most accurate square wave as possible onto P.4.0/TB0. My output signal range will be in between 0 - 3 KHz.I have...
View ArticleCC3000 Throughput around 1Mbit/s
HelloI made a speedtest with WPA2 and TCP/IP with the new Firmware - Version 1.11 and could only achieve around 1Mbit/s Throughput. With the older Version 1.10.2 I could achieve around 2Mbit/s, but the...
View ArticleStellaris enet_uip sample code running on LM3S9D96
I got the sample code enet_uip compiled under CCS and working using default values for Runtime Model Options, however my application requiresstructure alignment of 4 bytes ( --align_structs = 4 ), but...
View ArticleADS4229 sampling frequency
Hi, I'm planning to use the ADS4229 dual adc for an FPGA driven RF signal acquisition application. I need to sample 2 analog signals with a 250 MHz sampling clock.It is not clear to me if the 250...
View ArticleDAC904 transformer configuaration
HIMy customer would like to use the DAC904 with the following configuration :"IOUTshould be set to20mA.Forthe generation of asingle-endedsignalwe want to usea50 ohmADT2-1T(2:1Transformer).The output...
View ArticleGPIO Pull-Up/Pull Down Values
I need to understand for the GPIO what are the values of the PU and PD resistors, from the leakage current specification, I can guess they are in the range of 33K – 90K.Could someone please qualify this?
View ArticleDVR RDK - suitability of a use case
Hi,We are designing an application for the DM8168 (using the DVR RDK 3.00).The documentation seems a little sparse around certain details, and as a consequence, I am posting this here for comments from...
View ArticleECAN; triggering transmissions of several mailboxes from receive of another
Does anybody know how to enable the eCAN hardware (2803x family) to trigger tranmission of one or more mailboxes from a receive of another?Preferably without interrupts!The application is this; CANOpen...
View ArticleI2C -Write function
Haixiao, I had some trouble generating the reset condition but was resolved.Now continue developing a function for writing, could you provide me some example related to this functionality please?Regards.
View ArticleBQ27510 - how to find out if the part has been programmed with a golden DFI...
Hello,Is there a way of querying the part whether it has been programmed with a golden DFI or not?Thank you.
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MSP430 Multiple SPI Transmission Processing
I am using the MSP430 FR5739 to work as a 4-pin SPI slave device. When I connect the device to an oscilloscope, I've noticed that the SPI clock has 24 clock cycles, rather than 8. According to my...
View Articlecannot find tutorial directory cited in "TMS320C6000 Programmer’s Guide"...
Hello,I am new to DSPs and TI Code Composer. I've got the TMS320C6748 development kit LCDK. I am reading the guides provided by TI, specifically the "TMS320C6000 Programmer’s Guide" (Literature Number:...
View ArticleCCS compiler support for #pragma pack(n)
I have some structures shared between an Stellaris project and a Microsoft's Visual Studio projectWhen I try to build my Stellaris project with CCS, it does not recognize the #pragma pack(4) statement....
View ArticleADS4229 input clock to output clock delay variation
I have a situation where I am using multiple ADS4229 ADCs to connect to different FPGAs and need the sampled data to arrive at each FPGA on the same clock edge, and assume the FPGAs are all phase...
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EVM Silverlight graphical artifacts (bsp_xrplugin_opengl=1)
We have rendering problems with the OpenGLES accelerated Silverlight on the AM3359 EVM platform: The BSP comes with the environmental flag bsp_xrplugin_opengl=1, which configures the XAML rendering...
View ArticleHeapMemMP_alloc clarification
sysbios 6.34.03.19, ipc 1.25.1.9The documentation suggests that HeapMemMP_alloc just returns NULL if the allocation isn't possible, and to me this is the correct behavior. However, it is also raising...
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