Part Number:TIDM-1000
Is there any information that you can provide regarding EMI filter for this Vienna rectifier with increased power?
Part Number:TIDM-1000
Is there any information that you can provide regarding EMI filter for this Vienna rectifier with increased power?
Part Number:TCA8418
Hi,
according to datasheet revised June 2018 page 3 unused pins should be connected to Vcc via pull-up.
Isn't it possible to mask out rows and column pins used for the key matrix and forget about the rest?
This product is not battery powered, so no power concerns.
best regards
Part Number:TPS62110-Q1
Hi Experts,
I want to know about thermal shutdown of TPS6211-Q1. How TPS62110-Q1 does resume from thermal shutdown? The datasheet does not state it.
- Does it resume by automatically?
- What is resumed temperature?
- How does it resume?
Best Regards,
Fujiwara
Part Number:ADS1248
Dear Sir,
My customer is testing ADS1248 using R6161 DC voltage generator to supply. The generator supplies 0mV to ADC input through INA129, then monitor ADC digital output. An issue is that ADC output not zero but 1uV to 50uv depending on R6161 range setting 1V(divide=off) to 10mV(divider=on).
It is supposed that there is some common voltage isolated between R6161 power ground and ADC DC ground. If both grounds are shorted, ADC output is zero volt (normal).
It is also observed error voltage is reduced from 50uv to 3uV when data rate is changed from 40sps to 20sps.
They checked same test for ADS1210 and it outputs no error voltage (zero volt output) in any conditions above.
They checked bypassing INA129 but the error is still existed, so it looks ADC performance difference.
Does CMRR less performance of ADS1248 cause this error?
CMRR is min 80dB (at DC and G=1) for ADS1248 and min 100dB for ADS1210.
If so ADS124S06 has better CMMR (min 110dB) which might be much safer for testing with isolated ground CMV between DC generator and ADC?
Best regards,
Masa
Part Number:TMS320F28375S
Respected sir,
Please reply asap. Its urgent.
I have added one more case into RxHandler which is USB_EVENT_ERROR in the usb_dev_serial example. I want to check USBERR_DEV_RX_FIFO_FULL error. But i am not able to generate this error. My program does not go into the USB_EVENT_ERROR case. I have set 256 buffer size and i filled it completely. The USBBufferSpaceAvailable(); function also returns 0 remaining buffer size. But it does not generate USB_EVENT_ERROR . So my questions are
1. Can I add USB_EVENT_ERROR case into RxHandler (); ??
2. As per LIB GUIDE USBERR_DEV_RX_FIFO_FULL gets generated when FIFO is full. So when buffer is full , will this error get generated?? Is FIFO same as buffer??
3. How to generate and verify this error manually??
Regards,
Digvijay
Part Number:TLC5916
Please let me confirm about correct data sequence, MSB First or LSB First.
When set LSB First, test data was fine.
But I look like MSB First by datasheet page-20(attached), is this misread?
Which is correct MSB or LSB?
Best regards,
Satoshi
Part Number:CC2564C
Tool/software: Linux
Hello,
Our terminal phone bonded two devices via HFP, one is handset, the other one is headset.
Handset keeps hookoff to switch between WBS and BLE for some times, and then the headset will lose connection.
But if disable BLE in such case, the action above will not lead to headset disconnection.
I attach the FW log and help check the cause please.
(Please visit the site to view this file)
Part Number:OPA2134
Hi
Our current sensor is easy to be influenced by EM waves in some frequency points, and its OPAMP is RC4580. But I tested out that its EMIRR is above 50dB in 10MHz-1GHz, so it shouldn't come out Dozens of millivolt in the output port. So I want to ask if TI can share the EMIRR test report of RC4580 and OPA2134? and to make a study of EMIRR, I also want to know which OPAMP is not EMI robustness because I want to know magnitude of the offset shift caused by EM waves.
Part Number:TPD4S012
Hello, customer would like to get the certification data for IEC61000-4-2 and IEC61000-4-5. Could you support such info.! thanks.
Part Number:UCC256302
Hi Sir
At present, the 1000W with PFC pre-research project is useful for the standby function. The UCC25630 power supply is powered by standby, and the PFC chip is also powered by standby.
The UCC25630 chip itself is powered by the high voltage HV pin. The problem is that the high voltage input does not require standby power supply, and does not require PFC operation. The LLC works directly.
However,we want to know if you do not use HV pin power supply, disconnect the HV pin, directly from the standby to the VCC pin 15V voltage, the UCC256302 can work? Will it bring other problems?
Part Number:LM358
Hi team,
Could you please help to explain of the output current meaning as below table shows?
When Vs=15V, Vo=0V, VID=1V, source current -30mA(typ) and Vs=15V, Vo=15V, VID=-1V, sink current 12mA(min)?
Thanks.
James.
Part Number:TIDA-010016
Tool/software: Code Composer Studio
Hi all,
are there any news concerning this statement:
"...In a second step we are planning to integrate IO Link Master firmware with stack example into TI SDK. I don not have a fixed date for SDK releaseyet."
Regards, Thomas
Part Number:MSP432E401Y
The silicon errata SLAZ709–October 2017 lists an errata (GPIO#09) of which I don't know how to deal with if I need both CANbus IP's CAN0 and CAN1. Is there a work around or can I only use one CANbus IP on this device if I want to avoid the high "current draw error" on those pins ?
Copied from errata sheet:
"GPIO#09 In some cases, noise injected into GPIO pins PB0 and PB1 can cause high current draw"
....
Workaround
1. Do not use PB0 and PB1. Connect both to GND through a 1-kΩ resistor and
configure them as GPIO inputs.
....
With this workaround I loose one CANBus IP if I understand it correctly. Any clarifiaction would help.
I need both CANbus cores.
br
Markus
If there Flyback controller roadmap for matched below specification, please let me know.
・High power: 100W~
・Secondary Side Regulation
・Active X-Capacitor discharge
・Spread Spectrum Clock
Nearly device is below, but spec is not completely matched;
・UCC28600: Non-include X-Cap and SSC
・UCC28630: Primary Side Regulation
Best regards,
Satoshi
Part Number:DRV5053-Q1
Hi,
My customer is considering to use DRV5053 and the customer asks some specifications are as follows.
Will you give me your advice?
Q1) Can DRV5053 realize the specifications or are there any other ICs that can be handled ?
- Overall measurement range is 2 mm
- Resolution 0.5 μm
- Temperature effect 0.05 μm or less
- Hysteresis less than 1 μm
- Repeatability of 1 μm or less
- Linearity 1 μm or less
Q2) And do you have a specification data of "accuracy" in each X/Y/Z axis?
Also, as to the assembly error during mass production, can you give out information?
Q3) "Temperature Compensation" of Block diagram, page8.
I think that this compensation block compensates "bias current(constant current)" to hall sensor over the temperature, correct?
Thank you for your support!
Best Regards,
Part Number:BQ25898D
Hello team,
In application diagram, the device USB used a switch to change usb to BQ25898D or Host as following:
They are asking whether they just connect a high impedance resistor as following?
Can they make BQ25898D into DCP mode forever and let the D+,D- pin short together if they can detect SDP,DCP,CDP by input PMIC and set INLIM of BQ25898D?
They can reduce the cost of switch.
Thanks,
Ben,
Part Number:AWR1642
I am trying to use this board design for a custom PCB. The gerber and layer plot PDF only show layer 1 and layer 6, the in between layers are not shown. Is this how it is supposed to be?
I looked at the SRR reference design. That is showing all the 6 layers and via's through them.
Part Number:ADC32RF45EVM
Hello,
We're intending to interface this board with our in house FPGA board.
To do this we need 3D (STEP ) model of the EVM.
The actual layout file (.brd), can be used both for extracting the 3D data and will help us during the design process.
Can you provide it?
Thanks,
David.
Part Number:ADS54J66
Hi,
We manufacture a board according ADS54j66EVM, and test it with TSW14J56.
We configure ADS54j66 to mode 8 using ADS54JXX EVM.
We find that when we set DCLK(to ADC) to 300MHz(We have changed VCXO whose output is 125Mhz), JESD204B link will lost.
But when DCLK dividers are set 12 and 6,or 24 and 12 seperately, JESD204B link works fine.
We are confused the reason that this happens.
Do you have any idea?
Best regards