Part Number:DS90UB954-Q1
Hi,
we are currently trying to get an imager running with your serialzer DS90UB953-Q1 and the deserializer DS90UB954-Q1.
For debug purposes we would like to read a register for both serializer and deserializer, which confirms that data from the imager is present (frame count for example).
We also did read the datasheets but we could not find a register which would provide this.
Many thanks
Maximilian
Part Number:CC2650
Tool/software: Code Composer Studio
Hi,
When using the resource explorer in CCS, I want to open the I2C TMP007 example. CCS complains about no build-tools being installed for ISA family 'ARM4, although I can verif this is the case.
Any remedy for this issue would be appreciated!
regards
Jeroen
Part Number:BQ78Z100
Hi ,
Customer got older version chip, the hardware version is 0x0A and firmware version is 0x04.
Their golden sample was based on hardware version 0xa2 and firmware version 0x05.
Could they direct overwrite the firmware from version 0x04 to 0x05 ? I ask this question because
they are different hardware version.
Thanks
Part Number:MSP430F5359
Tool/software: Code Composer Studio
Hello,
I'm using a audio PWM for Voice output . For that i compressed the sound signal and stored it in the flash. The stored voice don't have any click and pop but the hardware is producing click and pop in audio. I using LM4951A in sound circuit with low pass filter as shown below. With the Rf=20ohm. what can i do to remove click and pop sound in hardware?
Part Number:CC3220SF-LAUNCHXL
Hello I am trying to use the SPI peripheral to communicate with and off board LCD, that being the "LCD Mini Click". I uploaded the sample code from the SPIMASTER example in the SDK. With this I have been editing it and adding bits and pieces of the Display example but for some reason i cannot get the board to recognize it has the LCD connected.
Here is the pin layout of the LCD Mini Click:
I am using pins 3-8 for the LCD
Part Number:IWR6843
I'm designing a custom radar PCB based on the IWR6843ISK, and I was wondering if I could get any support (or be directed to any relevant documentation) on making antenna modifications for having slightly less directivity?
Looking at the Azimuth radiation patterns in the User Guide, it looks like gain is relatively flat over an angle of about +/-20deg. I'd ideally like to increase that to something like +/-50deg, but if that's too drastic of a modification (i.e. would be more like a complete redesign), even increasing the angle slightly would be something we're interested in.
Part Number:TLV320ADC3101
I downloaded several times the PurePath app for TLV320ADC3101 but I'm not able to install it.
Part Number:AWR1443BOOST
When attempting to run the out-of-box demo, I encounter the error depicted in the screenshot. I don't know what configuration properties would be incorrect, and the user guide does not indicate I have any settings that should produce this error. I flashed the radar with C:\ti\mmwave_sdk_01_02_00_05\packages\ti\demo\xwr14xx\mmw\xwr14xx_mmw_demo_mss.bin.
Part Number:DM3730
Hello,
I am using McBSP2 and McBSP3 on a DM3730 processor to send data to and from another hardware device. My hardware configuration uses McBSP2 as a master to transmit data to the other device, and McBSP3 as a slave to receive data from the other device as per the attached diagram. Currently the hardware between the McBSPs is gating the clock to McBSP3 so that it is only present when FSX is active - as per the attached scope capture. Ch1 = FSX, Ch2 = CLKX input to McBSP3, and Ch3 = CLKX output from McBSP2. FSX is configured for active-low, 8-bit frames, 8-cycle pulse width. Data and Frame sync are sampled on the rising edge.
In this configuration we cannot receive data from McBSP3 - we can transmit any number of bytes from McBSP2, but the McBSP3 DRR register is empty afterwards. If we connect the free-running McBSP2 clock directly to McBSP3 and make no other HW or SW changes, we can receive data correctly. Can you help us understand why we are not receiving data?
1. In our configuration McBSP3 never sees FSX inactive (high) on a rising clock edge. Does the McBSP need to sample frame sync inactive before sampling it active in order to recognize the start of a frame?
2. In our configuration McBSP3 CLKX stops after the end of the frame, and doesn't resume until the start of the next frame. Are any CLKX pulses required after the end of a frame to move the received data from the shift register to the DRR register?
Thank you for your help,
Steve
Part Number:LAUNCHXL-F28027F
I've tested LAUNCHXL-F28027F + BOOSTXL-DRV8301 bundle and now working on reconfiguring motorware user.h for DRV8304.
I recalculated the parameters according to 
guide. I changed USER_ADC_FULL_SCALE_VOLTAGE_V, USER_ADC_FULL_SCALE_CURRENT_A and USER_VOLTAGE_FILTER_POLE_Hz.
// (ADC_IN_MAX*R1 + R2)/R2 = (3.3*82 + 7.5)/7.5 = 37.08 // for boostxl-drv8304, R7, R8,R9 = 82K, R3,R4,R5 = 7.5K
#define USER_ADC_FULL_SCALE_VOLTAGE_V (37.08) // 26.314 boostxldrv8301_revB voltage scaling
/#define USER_ADC_FULL_SCALE_CURRENT_A (47.1) // 33.0 boostxldrv8301_revB current scaling
// For drv8304 kit
// Rp = (R2*R1)/(R1+R2) = (82*7.5)/(82+7.5) = 6.87
// C = 0.1 uF - C2, C3, C4 were not soldered on the stock kit, so added them manually
// 1/(2*pi*R*C) = 1/(2*pi*6870*0.0000001) = 231.784
#define USER_VOLTAGE_FILTER_POLE_Hz (231.784) // 364.682, value for boostxldrv8301_revB hardware
But the motor behaves badly - shakes and pulls big current.
USER_ADC_FULL_SCALE_VOLTAGE_V seems calculated correctly, because measured Vdc is correct.
But how to calculate USER_ADC_FULL_SCALE_CURRENT_A? I set it to 33*0.01/0.007 = 47.1, because DRV8301 kit has 0.01 shunts and DRV8304 one has 0.007 shunts, so I just changed USER_ADC_FULL_SCALE_CURRENT_A proporitonally.
The instaspin guide offers a formula in the chapter 5.2.1, that uses opamp resistors values, but I didn't find what resistors values opamps integrated into DRV8304 have.
GAIN is default - 10V/V (tied to GND through 47k)
MODE is 6x PWM - tied to GND
The only modification I made to the DRV8304 kit was soldering 0.1 uF capacitors for voltage sensing.
May be I missed something else.
Part Number:LMR14006
Hello team,
my customer has been using the LMR14006 and wants to add another switching to his sensor board. The supply rails are 18V-32V (nominal voltage is 24V); output current is 650 mA @3,3V. The application does directly from 24V to 3.3V and space is critical, so far I've bumped only into devices that require a large inductor.
Do you have any suggestion that requires a small inductor? They are using the lps4018 series of inductors.
Thank you in advance.
Best regards,
Adrian
Part Number:AWR1443BOOST
Tool/software: Code Composer Studio
According to the homepage for the AWR1443BOOST, there should be available example CCS projects to try on this radar. However, when I downloaded CCS I couldn't find any that were immediately available. Where are they located?
Only 1 example project is included in the listed software support, and it doesn't even include binaries for this model! Instead it is for the 1643.
Part Number:MSP430FR4133
Hello,
I have interfaced a temperature sensor MCP9808 with MSP430FR4133 trough i2c communication. I am using the following code to read the output voltage from the sensor. But it doesn't seem to be working. Could you please have a look?
tool - IAR Embedded
#define I2C__MSP430FR4133_H_
#include <MSP430.h>
#include <stdint.h>
#include <stdio.h>
#define AMBIENT_TEMPERATURE 0x05
#define DEVICE_ID_REGISTER 0x04
#define MANUFACTURE_ID_REGISTER 0x0054
uint16_t tlen =7;
uint16_t rlen =7;
int *tx =NULL;
int *rx =NULL;
uint8_t addr = 0x18;
volatile unsigned char RXData;
long temp;
void Stop_WD (void);
void Set_I2C(void);
uint16_t I2C_write(void* tx, uint16_t tlen,uint8_t addr);
uint16_t I2C_read(void* rx, uint16_t rlen, uint8_t addr);
int main(void)
{
Stop_WD();
// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
Set_I2C();
//Assuming yopu wish to write 8 bits to the sensor with char = 'DDDDDDDD'
char toWrite='DDDDDDDD';
I2C_write(toWrite,8,0*18);
//Assuming you receive 16 bits from the address sent
// the valueis stored in retrieved
string retieved='';
retrieved = I2C_read(_____,16,0*18); // ___ denotes pin address probably.. still looking for this.
__bis_SR_register(GIE);
while (1)
{
__delay_cycles(2000);
while (UCB0CTL1 & UCTXSTP); // Ensure stop condition got sent
UCB0CTL1 |= UCTXSTT; // I2C start condition
__bis_SR_register(LPM0_bits|GIE); // Enter LPM0 w/ interrupt
}
}
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = USCI_B0_VECTOR
__interrupt void USCIB0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCIB0_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG))
{
case USCI_NONE: break; // Vector 0: No interrupts
case USCI_I2C_UCALIFG: break; // Vector 2: ALIFG
case USCI_I2C_UCNACKIFG: // Vector 4: NACKIFG
UCB0CTL1 |= UCTXSTT; // I2C start condition
break;
case USCI_I2C_UCSTTIFG: break; // Vector 6: STTIFG
case USCI_I2C_UCSTPIFG: break; // Vector 8: STPIFG
case USCI_I2C_UCRXIFG3: break; // Vector 10: RXIFG3
case USCI_I2C_UCTXIFG3: break; // Vector 14: TXIFG3
case USCI_I2C_UCRXIFG2: break; // Vector 16: RXIFG2
case USCI_I2C_UCTXIFG2: break; // Vector 18: TXIFG2
case USCI_I2C_UCRXIFG1: break; // Vector 20: RXIFG1
case USCI_I2C_UCTXIFG1: break; // Vector 22: TXIFG1
case USCI_I2C_UCRXIFG0: // Vector 24: RXIFG0
RXData = UCB0RXBUF; // Get RX data
__bic_SR_register_on_exit(LPM0_bits); // Exit LPM0
break;
case USCI_I2C_UCTXIFG0: break; // Vector 26: TXIFG0
case USCI_I2C_UCBCNTIFG: // Vector 28: BCNTIFG
break;
case USCI_I2C_UCCLTOIFG: break; // Vector 30: clock low timeout
case USCI_I2C_UCBIT9IFG: break; // Vector 32: 9th bit
default: break;
}
}
void Stop_WD (void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop WDT
}
void Set_I2C(void)
{
P5SEL0 |= BIT2 | BIT3; // I2C pins
UCB0CTLW0 |= UCSWRST; // Software reset enabled
UCB0CTLW0 |= UCMODE_3 | UCMST | UCSYNC; // I2C mode, Master mode, sync
UCB0CTLW1 |= UCASTP_2; // Automatic stop generated
// after UCB0TBCNT is reached
//UCB0I2COA0 = 0x0A | UCOAEN; // own address is 0x0A| enable
UCB0BRW = 0x08; // baudrate = SMCLK / 8
UCB0TBCNT = 0x07; // number of bytes to be received
UCB0I2CSA = 0x18; // Slave address is 0x18
UCB0CTL1 &= ~UCSWRST;
UCB0IE |= UCRXIE | UCNACKIE | UCBCNTIE ;
}
uint16_t I2C_write(void* tx, uint16_t tlen,uint8_t addr)
{
uint16_t r_val = 0;
UCB0I2CSA = addr; // Assing slave address
while ((UCB0IFG & UCSTPIFG)); // Check if Stop condition on
UCB0CTL1 |= UCTR + UCTXSTT; // Start writing through I2C
while (!(UCB0IFG & UCTXIFG)); // Wait until TX buffer ready
for(uint16_t i = 0; i < tlen; i++)
{
UCB0TXBUF = *((uint8_t*)tx + i); // Write string in TX buffer of I2C
while (!(UCB0IFG & UCTXIFG)); // Wait until TX buffer ready
if( i == tlen - 1)
{ // If only one byte left to write
UCB0CTL1 |= UCTXSTP; // I2C stop condition
UCB0IFG &= ~UCTXIFG; // Clear USCI_B0 TX int flag
}
r_val++; // Increment return value
}
return r_val;
}
uint16_t I2C_read(void* rx, uint16_t rlen, uint8_t addr)
{
uint16_t r_val = 0;
UCB0I2CSA = addr; // Assing slave address
if (rlen != 0)
{
while ((UCB0CTL1 & UCTXSTP)); // Check if Stop condition on
UCB0CTL1 &= ~UCTR; // Set writing bit in register to 0
UCB0CTL1 |= UCTXSTT; // Start reading through I2C
while (!(UCB0CTL1 & UCTXSTT));
if (rlen == 1)
{
while (!(UCB0IFG & UCRXIFG))
{
if((UCB0CTL1 & UCTXSTT)==0)
UCB0CTL1 |= UCTXSTP;
}
while (UCB0CTL1 & UCTXSTP);
*((uint8_t*)rx) = UCB0RXBUF;
return 1;
}
for (uint8_t i = 0; i < rlen-1; i++)
{
while (!(UCB0IFG & UCRXIFG));
*((uint8_t*)rx + i) = UCB0RXBUF;
r_val ++;
}
UCB0CTL1 |= UCTXSTP;
while (UCB0CTL1 & UCTXSTP);
*((uint8_t*)rx+rlen-1) = UCB0RXBUF;
}
return r_val++;
}
Best Regards,
Mr. Shetty
Part Number:TMS570LC4357
Hello,
We want to test the Fprom Bank0 and Bank1 (0x00000000 to 0x003FFFFF) and associated flash Data ECC area (0xF0400000 to 0xF0480000).
This is our procedure :
1- Erase flash Bank0 / bank1 and program corresponding flash data ECC
2- program bank0 and bank 1 with 0x00 values and program corresponding flash data ECC
3- read and check flash Bank1 and 2 and check Data = 0x00 and no ECC occurs
4- Erase flash Bank0 / bank1 and corresponding flash data ECC
5- read and check flash Bank0 and 1 and check Data = 0xFF and no ECC occurs
6- Erase flash DATA ECC only (0xF0400000 to 0xF0480000) with flash Bank0 and 1 unchanged (0xFF values)
7- read and check flash DATA ECC = 0xFF and no ECC occurs
8- program flash DATA ECC only (0xF0400000 to 0xF0480000) with 0x00 values and with flash Bank0 and 1 unchanged (0xFF values)
9- read and check flash DATA ECC = 0x00 and no ECC occurs
This is my questions :
1- For steps 6 to 9, is it possible to write and read in Flash Data ECC area without a coherent Data in Flash Bank0 and 1? Is there a flash ECC check in this case?
2- If ECC IT occurs, is there a mean to check the erasing of flash DATA ECC area only?
Best regards,
François
Part Number:AWR1443BOOST
When I attempt to flash a binary that should be compatible with this radar according to the directory structure, I get the error shown below. What do I need to do differently?
It doesn't work no matter what image slot I place the binary.
The binary from SDK 1.2 flashes just fine, but doesn't work with the demo visualizer. I posted another topic regarding that issue here: https://e2e.ti.com/support/sensors/f/1023/t/763596
Thanks for the help!
Part Number:TMS320F28379D
Tool/software: TI C/C++ Compiler
The documentation spraa46a.pdf and spru513p.pdf suggest that the .data, .pinit, and .switch linker symbols will be used. Although, the Memory Allocation tool never shows them as being utilized. Our application works whether they are defined in the linker command file or not.
Are these linker symbols deprecated or could I be missing something that's causing these sections to remain unused?
Kindly,
Graham
Part Number:OMAP-L138
Tool/software: Linux
I want to migrate from kernel 3.0.3 to latest PROCESSOR-SDK. I've build linux kernel, but it seems there is no longer support of option "Direct char device access to MTD devices" in kernel 4.14.67. There are no /dev/mtdX devices.
Here is my device tree fragment:
&aemif {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
status = "okay";
cs3 {
#address-cells = <2>;
#size-cells = <1>;
clock-ranges;
ranges;
ti,cs-chipselect = <3>;
nand@2000000,0 {
compatible = "ti,davinci-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0x02000000 0x02000000
1 0x00000000 0x00008000>;
ti,davinci-chipselect = <1>;
ti,davinci-mask-ale = <0>;
ti,davinci-mask-cle = <0>;
ti,davinci-mask-chipsel = <0>;
ti,davinci-nand-buswidth = <8>;
ti,davinci-ecc-mode = "hw";
ti,davinci-ecc-bits = <4>;
ti,davinci-nand-use-bbt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0 0x100000>;
};
partition@0x100000 {
label = "u-boot env";
reg = <0x100000 0x020000>;
};
partition@0x120000 {
label = "kernel";
reg = <0x120000 0x400000>;
};
partition@0x520000 {
label = "fdt";
reg = <0x520000 0x010000>;
};
partition@0x530000 {
label = "filesystem";
reg = <0x530000 0>;
};
};
};
};
};
Part Number:CC2642R
As a peripheral in SimplePeripheral_processGapMessage method in the switch case GAP_LINK_TERMINATED_EVENT how do I identify which remote link got terminated and in a follow up GAP_LINK_ESTABLISHED_EVENT how do I make sure the link is established with the same device?
Best Regards
Part Number:DRV8301
I have a DRV8301-HC-EVM Rev D schematic.
but R2,R3,D2 is NP.
Is this not necessary?