PMP10812: Input 19V solution
TPS543C20: RAMP resistor value with 2 phase condition
TMS320F280049: Putting FLASH initiate code in GS RAM in F280049
Part Number:TMS320F280049
Hi expert,
I have seen some instruction in document spra958l.pdf reads:
As datasheet mentioned, GS RAM are not "secure", does that mean we should not run FLASH initiate code in this area like attached?
Thanks!
Sheldon
TMS320DM8168: The latest DRVRDK SDK version for DM8168
Part Number:TMS320DM8168
Hi,
Our customer is using DM8168 for their product. Now the engineer wants the the latest DRVRDK SDK version for the software development. Would you please help to provide this? thanks very much.
Linux/AM5708: Generation of array pad configurations from pin mux file
Part Number:AM5708
Tool/software: Linux
Hello Paval and all Merry christmas and Happy New Year.
with reference to https://e2e.ti.com/support/processors/f/791/p/757089/2796841#2796841. i generated array pad configurations for customized AM5708 board using pin mux utility tool and perl script
pad confiuration content:
-------------------------------------
{GPMC_AD0, (M0 | PIN_INPUT)}, /* gpmc_ad0.gpmc_ad0 */
{GPMC_AD1, (M0 | PIN_INPUT)}, /* gpmc_ad1.gpmc_ad1 */
{GPMC_AD2, (M0 | PIN_INPUT)}, /* gpmc_ad2.gpmc_ad2 */
{GPMC_AD3, (M0 | PIN_INPUT)}, /* gpmc_ad3.gpmc_ad3 */
{GPMC_AD4, (M0 | PIN_INPUT)}, /* gpmc_ad4.gpmc_ad4 */
{GPMC_AD5, (M0 | PIN_INPUT)}, /* gpmc_ad5.gpmc_ad5 */
{GPMC_AD6, (M0 | PIN_INPUT)}, /* gpmc_ad6.gpmc_ad6 */
{GPMC_AD7, (M0 | PIN_INPUT)}, /* gpmc_ad7.gpmc_ad7 */
{GPMC_AD8, (M0 | PIN_INPUT)}, /* gpmc_ad8.gpmc_ad8 */
{GPMC_AD9, (M0 | PIN_INPUT)}, /* gpmc_ad9.gpmc_ad9 */
{GPMC_AD10, (M0 | PIN_INPUT)}, /* gpmc_ad10.gpmc_ad10 */
{GPMC_AD11, (M0 | PIN_INPUT)}, /* gpmc_ad11.gpmc_ad11 */
{GPMC_AD12, (M0 | PIN_INPUT)}, /* gpmc_ad12.gpmc_ad12 */
{GPMC_AD13, (M0 | PIN_INPUT)}, /* gpmc_ad13.gpmc_ad13 */
{GPMC_AD14, (M0 | PIN_INPUT)}, /* gpmc_ad14.gpmc_ad14 */
{GPMC_AD15, (M0 | PIN_INPUT)}, /* gpmc_ad15.gpmc_ad15 */
{GPMC_A0, (M14 | PIN_OUTPUT)}, /* gpmc_a0.gpmc_a16 */
{GPMC_A1, (M0 | PIN_OUTPUT)}, /* gpmc_a1.gpmc_a1 */
{GPMC_A2, (M0 | PIN_OUTPUT)}, /* gpmc_a2.gpmc_a2 */
{GPMC_A3, (M0 | PIN_OUTPUT)}, /* gpmc_a3.gpmc_a3 */
{GPMC_A4, (M0 | PIN_OUTPUT)}, /* gpmc_a4.gpmc_a4 */
{GPMC_A5, (M0 | PIN_OUTPUT)}, /* gpmc_a5.gpmc_a5 */
{GPMC_A6, (M0 | PIN_OUTPUT)}, /* gpmc_a6.gpmc_a6 */
{GPMC_A7, (M0 | PIN_OUTPUT)}, /* gpmc_a7.gpmc_a7 */
{GPMC_A8, (M0 | PIN_OUTPUT)}, /* gpmc_a8.gpmc_a8 */
{GPMC_A9, (M0 | PIN_OUTPUT)}, /* gpmc_a9.gpmc_a9 */
{GPMC_A10, (M0 | PIN_OUTPUT)}, /* gpmc_a10.gpmc_a10 */
{GPMC_A11, (M0 | PIN_OUTPUT)}, /* gpmc_a11.gpmc_a11 */
{GPMC_A12, (M0 | PIN_OUTPUT)}, /* gpmc_a12.gpmc_a12 */
{GPMC_A13, (M0 | PIN_OUTPUT)}, /* gpmc_a13.gpmc_a13 */
{GPMC_A14, (M0 | PIN_OUTPUT)}, /* gpmc_a14.gpmc_a14 */
{GPMC_A15, (M0 | PIN_OUTPUT)}, /* gpmc_a15.gpmc_a15 */
{GPMC_A17, (M0 | PIN_OUTPUT)}, /* gpmc_a17.gpmc_a17 */
{GPMC_A18, (M0 | PIN_OUTPUT)}, /* gpmc_a18.gpmc_a18 */
{GPMC_A19, (M0 | PIN_OUTPUT)}, /* gpmc_a19.gpmc_a19 */
{GPMC_A20, (M0 | PIN_OUTPUT)}, /* gpmc_a20.gpmc_a20 */
{GPMC_A21, (M0 | PIN_OUTPUT)}, /* gpmc_a21.gpmc_a21 */
{GPMC_A22, (M0 | PIN_OUTPUT)}, /* gpmc_a22.gpmc_a22 */
{GPMC_A23, (M0 | PIN_OUTPUT)}, /* gpmc_a23.gpmc_a23 */
{GPMC_A24, (M0 | PIN_OUTPUT)}, /* gpmc_a24.gpmc_a24 */
{GPMC_A25, (M0 | PIN_OUTPUT)}, /* gpmc_a25.gpmc_a25 */
{GPMC_A26, (M0 | PIN_OUTPUT)}, /* gpmc_a26.gpmc_a26 */
{GPMC_A27, (M0 | PIN_OUTPUT)}, /* gpmc_a27.gpmc_a27 */
{GPMC_CS1, (M0 | PIN_OUTPUT)}, /* gpmc_cs1.gpmc_cs1 */
{GPMC_CS0, (M0 | PIN_OUTPUT)}, /* gpmc_cs0.gpmc_cs0 */
{GPMC_CS2, (M0 | PIN_OUTPUT)}, /* gpmc_cs2.gpmc_cs2 */
{GPMC_CS3, (M0 | PIN_OUTPUT)}, /* gpmc_cs3.gpmc_cs3 */
{GPMC_CLK, (M8 | PIN_INPUT)}, /* gpmc_clk.i2c3_scl */
{GPMC_ADVN_ALE, (M8 | PIN_INPUT)}, /* gpmc_advn_ale.i2c3_sda */
{GPMC_OEN_REN, (M0 | PIN_OUTPUT)}, /* gpmc_oen_ren.gpmc_oen_ren */
{GPMC_WEN, (M0 | PIN_OUTPUT)}, /* gpmc_wen.gpmc_wen */
{GPMC_BEN0, (M0 | PIN_OUTPUT)}, /* gpmc_ben0.gpmc_ben0 */
{GPMC_BEN1, (M0 | PIN_OUTPUT)}, /* gpmc_ben1.gpmc_ben1 */
{GPMC_WAIT0, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* gpmc_wait0.gpmc_wait0 */
{VIN2A_VSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_vsync0.gpio4_0 */
{VIN2A_D0, (M11 | PIN_INPUT)}, /* vin2a_d0.pr1_uart0_rxd */
{VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */
{VIN2A_D4, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d4.gpio4_5 */
{VIN2A_D5, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d5.gpio4_6 */
{VIN2A_D6, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d6.gpio4_7 */
{VIN2A_D7, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d7.gpio4_8 */
{VIN2A_D8, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d8.gpio4_9 */
{VIN2A_D9, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d9.gpio4_10 */
{VIN2A_D10, (M3 | PIN_OUTPUT)}, /* vin2a_d10.mdio_mclk */
{VIN2A_D11, (M3 | PIN_INPUT)}, /* vin2a_d11.mdio_d */
{VIN2A_D12, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d12.gpio4_13 */
{VIN2A_D13, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d13.gpio4_14 */
{VIN2A_D14, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d14.gpio4_15 */
{VIN2A_D15, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d15.gpio4_16 */
{VIN2A_D16, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d16.gpio4_24 */
{VIN2A_D17, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d17.gpio4_25 */
{VIN2A_D18, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d18.gpio4_26 */
{VIN2A_D19, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d19.gpio4_27 */
{VIN2A_D20, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d20.gpio4_28 */
{VIN2A_D21, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d21.gpio4_29 */
{VIN2A_D22, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d22.gpio4_30 */
{VIN2A_D23, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d23.gpio4_31 */
{MDIO_MCLK, (M3 | PIN_INPUT | SLEWCONTROL)}, /* mdio_mclk.mii0_col */
{MDIO_D, (M3 | PIN_OUTPUT | SLEWCONTROL)}, /* mdio_d.mii0_txer */
{RMII_MHZ_50_CLK, (M14 | PIN_INPUT_PULLUP)}, /* RMII_MHZ_50_CLK.gpio5_17 */
{UART3_RXD, (M3 | PIN_INPUT | SLEWCONTROL)}, /* uart3_rxd.mii0_rxdv */
{UART3_TXD, (M3 | PIN_INPUT | SLEWCONTROL)}, /* uart3_txd.mii0_rxclk */
{RGMII0_TXC, (M3 | PIN_INPUT)}, /* rgmii0_txc.mii0_rxd3 */
{RGMII0_TXCTL, (M3 | PIN_INPUT)}, /* rgmii0_txctl.mii0_rxd2 */
{RGMII0_TXD3, (M3 | PIN_INPUT)}, /* rgmii0_txd3.mii0_crs */
{RGMII0_TXD2, (M3 | PIN_INPUT)}, /* rgmii0_txd2.mii0_rxer */
{RGMII0_TXD1, (M3 | PIN_INPUT)}, /* rgmii0_txd1.mii0_rxd1 */
{RGMII0_TXD0, (M3 | PIN_INPUT)}, /* rgmii0_txd0.mii0_rxd0 */
{RGMII0_RXC, (M3 | PIN_INPUT)}, /* rgmii0_rxc.mii0_txclk */
{RGMII0_RXCTL, (M3 | PIN_OUTPUT)}, /* rgmii0_rxctl.mii0_txd3 */
{RGMII0_RXD3, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd3.mii0_txd2 */
{RGMII0_RXD2, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd2.mii0_txen */
{RGMII0_RXD1, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd1.mii0_txd1 */
{RGMII0_RXD0, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd0.mii0_txd0 */
{GPIO6_14, (M3 | PIN_INPUT)}, /* gpio6_14.uart10_rxd */
{GPIO6_15, (M3 | PIN_OUTPUT)}, /* gpio6_15.uart10_txd */
{XREF_CLK0, (M11 | PIN_INPUT)}, /* xref_clk0.pr2_mii1_col */
{XREF_CLK1, (M11 | PIN_INPUT)}, /* xref_clk1.pr2_mii1_crs */
{MCASP1_ACLKX, (M11 | PIN_OUTPUT)}, /* mcasp1_aclkx.pr2_mdio_mdclk */
{MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_fsx.pr2_mdio_data */
{MCASP1_ACLKR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.gpio5_0 */
{MCASP1_FSR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.gpio5_1 */
{MCASP1_AXR0, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */
{MCASP1_AXR1, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr1.pr2_mii_mt0_clk */
{MCASP1_AXR2, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr2.gpio5_4 */
{MCASP1_AXR3, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr3.gpio5_5 */
{MCASP1_AXR4, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr4.gpio5_6 */
{MCASP1_AXR5, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr5.gpio5_7 */
{MCASP1_AXR6, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr6.gpio5_8 */
{MCASP1_AXR7, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr7.gpio5_9 */
{MCASP1_AXR8, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr8.pr2_mii0_txen */
{MCASP1_AXR9, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr9.pr2_mii0_txd3 */
{MCASP1_AXR10, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr10.pr2_mii0_txd2 */
{MCASP1_AXR11, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr11.pr2_mii0_txd1 */
{MCASP1_AXR12, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr12.pr2_mii0_txd0 */
{MCASP1_AXR13, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr13.pr2_mii_mr0_clk */
{MCASP1_AXR14, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr14.pr2_mii0_rxdv */
{MCASP1_AXR15, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr15.pr2_mii0_rxd3 */
{MCASP2_ACLKX, (M11 | PIN_INPUT)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */
{MCASP2_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp2_fsx.pr2_mii0_rxd1 */
{MCASP2_AXR2, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp2_axr2.pr2_mii0_rxd0 */
{MCASP2_AXR4, (M14 | PIN_INPUT_PULLUP)}, /* mcasp2_axr4.gpio1_4 */
{MCASP2_AXR7, (M14 | PIN_INPUT_PULLUP)}, /* mcasp2_axr7.gpio1_5 */
{MCASP3_ACLKX, (M11 | PIN_INPUT)}, /* mcasp3_aclkx.pr2_mii0_crs */
{MCASP3_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp3_fsx.pr2_mii0_col */
{MCASP3_AXR0, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */
{MCASP5_AXR0, (M4 | PIN_INPUT)}, /* mcasp5_axr0.uart3_rxd */
{MCASP5_AXR1, (M4 | PIN_OUTPUT)}, /* mcasp5_axr1.uart3_txd */
{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */
{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */
{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */
{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */
{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */
{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */
{MMC1_SDCD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.mmc1_sdcd */
{MMC1_SDWP, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.mmc1_sdwp */
{GPIO6_10, (M11 | PIN_INPUT)}, /* gpio6_10.pr2_mii_mt1_clk */
{GPIO6_11, (M11 | PIN_OUTPUT)}, /* gpio6_11.pr2_mii1_txen */
{MMC3_CLK, (M11 | PIN_OUTPUT)}, /* mmc3_clk.pr2_mii1_txd3 */
{MMC3_CMD, (M11 | PIN_OUTPUT)}, /* mmc3_cmd.pr2_mii1_txd2 */
{MMC3_DAT0, (M11 | PIN_OUTPUT)}, /* mmc3_dat0.pr2_mii1_txd1 */
{MMC3_DAT1, (M11 | PIN_OUTPUT)}, /* mmc3_dat1.pr2_mii1_txd0 */
{MMC3_DAT2, (M11 | PIN_INPUT)}, /* mmc3_dat2.pr2_mii_mr1_clk */
{MMC3_DAT3, (M11 | PIN_INPUT)}, /* mmc3_dat3.pr2_mii1_rxdv */
{MMC3_DAT4, (M11 | PIN_INPUT)}, /* mmc3_dat4.pr2_mii1_rxd3 */
{MMC3_DAT5, (M11 | PIN_INPUT)}, /* mmc3_dat5.pr2_mii1_rxd2 */
{MMC3_DAT6, (M11 | PIN_INPUT)}, /* mmc3_dat6.pr2_mii1_rxd1 */
{MMC3_DAT7, (M11 | PIN_INPUT)}, /* mmc3_dat7.pr2_mii1_rxd0 */
{SPI1_SCLK, (M0 | PIN_OUTPUT)}, /* spi1_sclk.spi1_sclk */
{SPI1_D1, (M0 | PIN_OUTPUT)}, /* spi1_d1.spi1_d1 */
{SPI1_D0, (M0 | PIN_INPUT)}, /* spi1_d0.spi1_d0 */
{SPI1_CS0, (M0 | PIN_OUTPUT)}, /* spi1_cs0.spi1_cs0 */
{SPI1_CS2, (M4 | PIN_OUTPUT | SLEWCONTROL)}, /* spi1_cs2.dcan2_tx */
{SPI1_CS3, (M15 | PIN_INPUT)}, /* spi1_cs3.dcan2_rx */
{DCAN1_TX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_tx.gpio1_14 */
{DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */
{UART1_RXD, (M0 | PIN_INPUT | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
{UART1_TXD, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_txd.uart1_txd */
{UART1_CTSN, (M0 | PIN_INPUT)}, /* uart1_ctsn.uart1_ctsn */
{UART1_RTSN, (M0 | PIN_OUTPUT)}, /* uart1_rtsn.uart1_rtsn */
{UART2_RXD, (M5 | PIN_INPUT)}, /* uart2_rxd.uart1_dcdn */
{UART2_CTSN, (M14 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.gpio1_16 */
{UART2_RTSN, (M14 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.gpio1_17 */
{I2C1_SDA, (M0 | PIN_INPUT)}, /* i2c1_sda.i2c1_sda */
{I2C1_SCL, (M0 | PIN_INPUT)}, /* i2c1_scl.i2c1_scl */
{I2C2_SDA, (M0 | PIN_INPUT)}, /* i2c2_sda.i2c2_sda */
{I2C2_SCL, (M0 | PIN_INPUT)}, /* i2c2_scl.i2c2_scl */
{WAKEUP0, (M14 | PIN_INPUT_PULLUP)}, /* Wakeup0.gpio1_0 */
{WAKEUP3, (M14 | PIN_INPUT_PULLUP)}, /* Wakeup3.gpio1_3 */
------------------------------------------------------------------------------------------------------------
For those configurations do i need to touch device tree files? if so can you please point out me some examples and reference documents.
Thanks,
Gourav
TIDEP-0101: Using other tamagawa encoder
Part Number:TIDEP-0101
Hello,
I would like to run Demo : TIDEP-0101 using TS5668N20 As attached document.(Please visit the site to view this file)
1.Is this encoder possible to communicate with TIDEP-0101?
2.When using TS5668N20, what kind of place of software needs to be modified?
Regards,
U-SK
TUSB9261: SATA differential trace length
66AK2G12: DDR3L configuration in Default Gel file... Are CL=7 and CWL=5 invalid configuration ?
Part Number:66AK2G12
Hi,
The default configurations for CL and CWL are in ddr3A_setup_1066 function in gel file (C:\ti\ccsv8\ccs_base\emulation\boards\evmk2g\gel\evmk2g_arm.gel):
// Program BL=0, CL, WR, and PD=1 in the Mode Register 0 (address offset 0x054). // All other fields must be left at their default values. DDR3A_MR0 = 0x00001830; //0x00001430; //MM - calculated: 0x00001430, orig: 0x00001420 //-CL - 6, CWL - 5 // Program DIC, RTT, and TDQS in the Mode Register 1 (address offset 0x058). // All other fields must be left at their default values. DDR3A_MR1 = 0x00000006; // Program Mode Register 2 (address offset 0x05C). // Maintaining default values of Program Mode Register 2 //DDR3A_MR2 = 0x00000018;
As you see, DDR3A_MR0 is configured as 0x00001830 and DDR3A_MR2 is no update (keeping default value). This means, CL=7 and CWL=5 are configured for 1066Mhz speed bin, but JEDEC suggests this combination should be reserved:
How should we handle this issue ?
Best Regards,
NK
TUSB3410: TUSB3410 driver for MCU
TPS25925: UVLO response for instantaneous power failure
Part Number:TPS25925
Please let me know about UVLO response time for instantaneous power failure.
I want to know the condition of power failure and momentary recovery.
When the time for power failure to recovery is too fast, I guess that UVLO can't detect this failure.
Is there spec for require failure time?
Best regards,
Satoshi
Linux/AM3352: GPMC Signal Timing configurations
Part Number:AM3352
Tool/software: Linux
Hello TI,
I am using custom AM3352 board with Micron NAND MT29F4G08ABBFA. Here i need to optimize the NAND Performance. As per the
Tweak NAND device signal timings using AM335x TRM
is not easy, Because TRM explains about NOR device signal timings (section 7.1.4.1) And There is no NAND device signal timings. Please guide me how to Tweak NAND device signal timings using Micron NAND MT29F4G08ABBFA data sheet.
(slow while reading from and writing to) below default gpmc setting i am using (from AM335x-evm.dts)
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
UC2825: Idea for disable setting
Part Number:UC2825
I need to add disable circuit for UC2825(Push-pull) due to measure abnormal prevention.
I think that UC2825's CT pin left short by external circuit, UC2825 will be disable. (oscillation will stop)
Is this idea no problem?
If there the other good idea, please let me know.
Best regards,
Satoshi
CC2541: СС2541 SmartRF Studio 7 adv ble proprietary
Part Number:CC2541
Hey. I'm trying to get an ADV BLE parcel in proprietary mode.
I see them in the sniffer but I don’t accept them in Rf Studio
set SW0-SW3 to address 8E 89 BE D6
ADDR_LEN = 0
PRF_TASK_CONF.MODE = 00
PRF_ADDR_ENTRYn.RXLENGTH = FF
I expected to see parcels with an error checksum. but I don't get them.
LM3429: PWM Frequency Selection
Part Number:LM3429
LM3429 Test I have a question during the test.
vin : 12, led : 3.4v x 4 = 13.6, max current 1A
On the DataSheet, I thought that it could be used from 80kHz ~ 119kHz when calculating by the formula (26)
Checked by using actual function generator, there is symptom that current control can not be done according to PWM at 1kHz or more.
When setting the PWM Frequency, please reply if you have any more or need more information.
Test results will be attached.
DS90UB913A-Q1: DES error
Part Number:DS90UB913A-Q1
Hi,
My customer is evaluating DS90UB913A-Q1 and DS90UB914A-Q1 on their system, "DES Error" is detected from 913A register.
And the cable length is 1m.
To investigate the cause, what they should do?
I'm requesting to check detect probability and dependency of IC sample and observing waveforms.
Please let me know if there is a register they should read.
Best Regards,
Kuramochi
CCS/TMS320F28069M: How to get the value of TBCLK
Part Number:TMS320F28069M
Tool/software: Code Composer Studio
How to get the value of TBCLK and how to accurately know the value of frequency of PWM, when TBPRD is set to some value.
I refered this image, but stuck with TBCLK value, and is it possible to change TBLCK.
IWR6843: Liquid level detection upto 100 m
Part Number:IWR6843
Hello,
I am looking to develop a liquid level sensing sensor with a range upto 100m. Is it possible with IWR6843. From the level sensing example in the resource explorer it is demonstrated on smaller tank. If possible what is the resolution I would be able to achieve and would the IWR6843BOOST board help? Or is IWR1443 a better option for this application?
Regards,
Prudhvi Sagar
RTOS/AM5728: Data Corruption over SPI read
Part Number:AM5728
Tool/software: TI-RTOS
Hi,
I am using PROCESSOR-SDK-RTOS-AM57X - pdk_am57xx_1_0_7.
Here, I have slave device over SPI3_CS0. Data rate configured as 32 bits, Phase and Polarity are 0 and bit rate is 1Mhz.
Now, when I try to continuously read particular address on slave device, most of the time I am reading it correctly. But sometimes I am reading wrong value. On probing MISO, I am seeing correct data on oscilloscope but over SPI_Rx buffer I am receiving different value.
Also, I am reading 'read only' CHIP_ID, so it will never change.
Can you tell us what can be reason for this data corruption?
MSP430F5438A: I2C transmission get hang TXIFG
Part Number:MSP430F5438A
Hi TI team,
I am trying to send data through I2C in MSP430F5438A. I am using example code given by the TI.
It get hanged, once the first byte is placed in TX buffer.
By using breakpoint it goes upto ISR -> UCB0TXBUF = TXData; // Load TX buffer, after this code get hanged.
Please help me to solve the issue.
Code Used:
#include <msp430.h>
unsigned char TXData;
unsigned char TXByteCtr;
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P3SEL |= 0x06; // Assign I2C pins to USCI_B0
UCB0CTL1 |= UCSWRST; // Enable SW reset
UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC; // I2C Master, synchronous mode
UCB0CTL1 = UCSSEL_2 + UCSWRST; // Use SMCLK, keep SW reset
UCB0BR0 = 12; // fSCL = SMCLK/12 = ~100kHz
UCB0BR1 = 0;
UCB0I2CSA = 0xAA; // Slave Address is 048h
UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB0IE |= UCTXIE; // Enable TX interrupt
TXData = 0x01; // Holds TX data
while (1)
{
TXByteCtr = 1; // Load TX byte counter
while (UCB0CTL1 & UCTXSTP); // Ensure stop condition got sent
UCB0CTL1 |= UCTR + UCTXSTT; // I2C TX, start condition
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0 w/ interrupts
__no_operation(); // Remain in LPM0 until all data
// is TX'd
TXData++; // Increment data byte
}
}
//------------------------------------------------------------------------------
// The USCIAB0_ISR is structured such that it can be used to transmit any
// number of bytes by pre-loading TXByteCtr with the byte count.
//------------------------------------------------------------------------------
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = USCI_B0_VECTOR
__interrupt void USCI_B0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch(__even_in_range(UCB0IV,12))
{
case 0: break; // Vector 0: No interrupts
case 2: break; // Vector 2: ALIFG
case 4: break; // Vector 4: NACKIFG
case 6: break; // Vector 6: STTIFG
case 8: break; // Vector 8: STPIFG
case 10: break; // Vector 10: RXIFG
case 12: // Vector 12: TXIFG
if (TXByteCtr) // Check TX byte counter
{
UCB0TXBUF = TXData; // Load TX buffer
TXByteCtr--; // Decrement TX byte counter
}
else
{
UCB0CTL1 |= UCTXSTP; // I2C stop condition
UCB0IFG &= ~UCTXIFG; // Clear USCI_B0 TX int flag
__bic_SR_register_on_exit(LPM0_bits); // Exit LPM0
}
break;
default: break;
}
}
Thanks
Siva B
AWR1642: Target speed value
Part Number:AWR1642
Does the target's speed value refer to its speed in the vertical direction? Does a negative value mean that the target is close to the radar? Can the speed value of the target in the horizontal direction be obtained?