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Compiler/TMS570LC4357: opt_for_speed=2 creates holes in .text

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Part Number:TMS570LC4357

Tool/software: TI C/C++ Compiler

I am using the TI ARM compiler (tried version 5.1.6 and 16.9.4) to compile code for the TMS570LC43xx device, which is an R5 cache based device. When I invoke opt_for_speed=2 or greater, the compiler forces the .text section of each file to a 16 byte alignment. That creates lots of wasted flash space with holes of 2 to 14 bytes. I assume this is because the compiler is aligning the .text section to a cache page. It seems a pretty high code size hit for the speed optimization. Is there a way to turn off the forced alignment and still get the other speed enhancements that come with opt_for_speed=2?


TPS54202: The PWM waveform at SW feet will wobble

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Part Number:TPS54202

Using the following circuit, Vin=20V and Vout= 3.6V.Load plus 0.5A, but the PWM waveform jitter in SW foot, how to solve?

BQ40Z50-R1: User Memory Block?

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Part Number:BQ40Z50-R1

Is there any way for the user to save a small block of data in flash (<1k)?  If no, is there a similar gauge that has this capability?

ADS5409: Sleep Modes

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Part Number:ADS5409

The ADS5409 data sheet make mention of  the various (4) sleep modes

"Different internal functions stay powered up which results in different power consumption and wake up time between the two sleep modes"

Is there a description available showing which 'internal' functions stay powered up in each sleep mode?

Is there one where the DACCLK and DACCLK outputs are still on?

BQ24725A: Why won't the device reset with no adaptor connected?

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Part Number:BQ24725A

Hi,

in the datasheet it says the device will reset if ACDET<0.6v, since ACDET is from adaptor, if no adaptor is connected, ACDET should be 0 and the device can't work.

Where am I wrong?

DK-TM4C129X: TIVA TM4C129X fimrware upgrade using SD card

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Part Number:DK-TM4C129X

Hello,

Is it possible to do firmware upgrade on TM4C129X using SD card? I programmed the TM4C129 to be an embedded web server. I am able to transfer files using the browser from my PC to the TM4C129X and store these files in an SD card. My idea is to transfer the bin image and store in the sd card. And then from there, upgrade the firmware of the TM4c129. I did some digging and found a user's guide on boot loader but I did not see anything that pertains to SD card. Has anyone done something like this? Any ideas or place where I could start? 

Thanks

AJ 

[FAQ] Compiler/MSP430FR2522: Missing “Workaround specified silicon errata” [CPU21], [CPU22] and [CPU40] compiler flags for MSP430FR2522, MSP430FR2422 and MSP430FR2512 devices in Code Composer Studio and IAR embedded workbench.

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Part Number:MSP430FR2522

Tool/software: TI C/C++ Compiler

Of particular importance, CPU40 causes assembler instructions to be skipped, potentially causing unpredictable behavior.
Refer to the device’s errata document for details on these silicon issues.

http://www.ti.com/lit/er/slaz705c/slaz705c.pdf

Code Composer Studio
In versions prior to 8.2.0., these compiler flags are not enabled by default.
A user must manually enable these by checking the boxes in the Runtime Model Options window as shown here.

Impacted Projects are:

  • Projects created with versions of CCS earlier than 8.2.0
  • CapTIvate firmware projects generated by the CapTIvate Design Center
    • Note: CapTIvate Design Center example firmware projects and device ROM were generated with the compiler flags enabled, so these are not impacted.

This issue has been corrected starting with Code Composer Studio version  8.2.0.
However, upgrading to the newer version will not fix existing firmware projects created with earlier versions of CCS.
The user must manually enable these settings in their project settings.

IAR Embedded Workbench
In versions prior to 7.12.2, these compiler flags are not being enabled by default. 

MSP430GCC
MSP430GCC in Code Composer Studio – same as Code Composer Studio above.
GCC stand-alone will be updated in its next regularly planned update (expected 3Q)

CC1310: Sensor/Collector: Joining procedure details

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Part Number:CC1310

Hi,

Figure 40 in:  http://dev.ti.com/tirex/content/simplelink_cc13x0_sdk_1_30_00_06/docs/ti154stack/ti154stack-sdg/ti154stack-sdg/TI%2015.4-Stack%20Overview.html#phase-2-proprietary-association-procedure-to-inform-coordinator-of-the-network-join-this-is-an-optional-step 

shows that there is a MAC Data Request which is sent from the sensor after the sensor has sent an Association Request and also before the sensor will receive the Association Response sent from the Collector. I cannot find where in the code that this MAC Data Request is initiated. I would also like to know what the purpose of this data message is.

Thanks

dev.ti.com/.../TI 15.4-Stack Overview.html


Linux/IWR1443BOOST: Low Power

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Part Number:IWR1443BOOST

Tool/software: Linux

I am using the IWR1443BOOST with ROS on a Linux machine.

Is there documentation on how to use the lowPower parameter in the config file?

Thanks.

Toggle switch using SSR with MOSFET

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Dear Experts,

I try to use a SSR instead a toggle relay to switch the polarity of a railway DCC signal at a RailSwitch middle contact. This digital signal is AC 18V, the maximal current is 3A
Inspired by the TIDUC87A document I create following circuit. The gray toggle switch is only to show what I want to realize.
It works perfect if only one SSR is implemented ( left OR right side ) but no function if both SSR are connected.

My Questrion:
Is there an integrated ( and cheep ) ready to use circuit available for a AC SSR toggle switch?
Whats wrong with this circuit?

Linux/AM4378: MCASP master audio out

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Part Number:AM4378

Tool/software: Linux

I'm trying to output i2s audio to a tas5782 from an am4378. There isn't a Linux driver for the tas5782 but the pcm512x looks to be register compatible. Also, at this point I'm just trying to get the i2s bus to work with mcasp1 as master. So far I haven't been able to get the clocks running (LRCK or BCK).

Here are the relevant entries from the dts file:

 sound {
  compatible = "simple-audio-card";
  simple-audio-card,name = "TAS5782";
 
  simple-audio-card,format = "i2s";

  simple-audio-card,bitclock-master = <&cpu_dia>;
  simple-audio-card,frame-master = <&cpu_dia>;  

  cpu_dia: simple-audio-card,cpu {
   sound-dai = <&mcasp1>;
   //system-clock-frequency = <24000000>;
   //system-clock-id = <0>;
  };

  codec_dia: simple-audio-card,codec {
   sound-dai = <&tas5782>;
   system-clock-frequency = <12288000>;
  };
 };

mcasp1_tas5782_pins_default: mcasp1_tas5782_pins_default {
 pinctrl-single,pins = <
  0x10c ( PIN_INPUT | MUX_MODE4 ) /* (B14) mii1_crs.mcasp1_aclkx */
  0x110 ( PIN_INPUT | MUX_MODE4 ) /* (B13) mii1_rx_er.mcasp1_fsx */  
  0x108 ( PIN_OUTPUT | MUX_MODE4 ) /* (D16) mii1_col.mcasp1_axr2 */
 >;
};

i2c2_tas5782_pins_default: i2c2_tas5782_pins_default {
 pinctrl-single,pins = <
  0x17c ( PIN_INPUT | MUX_MODE3 ) /* (L22) uart1_rtsn.I2C2_SCL */
  0x178 ( PIN_INPUT | MUX_MODE3 ) /* (K22) uart1_ctsn.I2C2_SDA */
 >;
};

&i2c2 {
 pinctrl-names = "default";
 pinctrl-0 = <&i2c2_tas5782_pins_default>;

 status = "okay";
 clock-frequency = <100000>;
 
 tas5782: tas5782@48 {
  compatible = "ti,pcm5122";
  #sound-dai-cells = <0>;
  reg = <0x48>;
  status = "okay";
  
  AVDD-supply = <&dcdc4>;
  DVDD-supply = <&dcdc4>;
   CPVDD-supply = <&dcdc4>;
  
 };
};

&mcasp1 {
        #sound-dai-cells = <0>;
        pinctrl-names = "default";
        pinctrl-0 = <&mcasp1_tas5782_pins_default>;
  
        status = "okay";

        op-mode = <0>;                                /* TARG - I2S */
        tdm-slots = <2>;                              /* TARG - I2S setting */  
        serial-dir = <                                /* TARG ??? 0: INACTIVE, 1: TX, 2: RX */
           0 0 1 0
        >;
       
        tx-num-evt = <1>;
        rx-num-evt = <1>;
};

Here is the contents of the pinmux registers for mcasp1:

Here is the contents of some of the mcasp resgisters after mcasp_start_tx and mcasp_stop_tx after a call to aplay.

When I set the mcasp1 clock pins to output the driver winds up setting bit 15 of AHCLKXCTL = 0. This doesn't make sense to me if I understand things correctly. For master mode it seems to me that the mcasp clock pins should be outputs and AHCLKXCTL bit 15 should be 1 for internal clocks. I have tried forcing this but the system hangs when I call aplay. I must have something misconfigured.

Any help would be appreciated.

IWR1642BOOST: iwr1642boost

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Part Number:IWR1642BOOST

HI,

for existing high accuracy lab we need to load the config file externally throug visualizer.

But for my appilaction, I cannot load config file evrytime for power cycle. I will load it once, during first time then it should be there permanently. How can we achieve this?

Requesting to provide a way for this

CCS/PGA970: Why is the range of DAC output voltage so small?

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Part Number:PGA970

Tool/software: Code Composer Studio

Hi,

     The voltage at SxP and SxN is from 0.5V to 1.5V(voltage offset is 1V). After the calculation with the compensation algorithm in the existing reference sample application, I get the DAC_Value 0d in the DAC_REG0 register when the core of LVDT is at one end and DAC_Value 179d at the other end.

     However, 179d is so small for the 14-bit DAC that something must be wrong. I changed the gain of S1 and S2, but the DAC_Value is still 179d at the end.

     I have no idea which configuration I could make to solve the problem. could you give me some advices?

    Thank you very much!

Regards,

LAUNCHXL-CC2640R2: Client role- Bluetooth Development Studio (BDS)

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Part Number:LAUNCHXL-CC2640R2

Hi,

I have configures cc2640 with custom services using the Bluetooth Development Studio (BDS) for a server role. I want to configure the controller (cc2640) for the client role with custom services, is there any plugins for the BDS to generate the code for the client role? or is there any equivalent tool to generate the client code role? or any documents to develop the client role code?

Thank you very much

 

ADC34J45: JESD sync

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Part Number:ADC34J45

Hi,

I read the doc " ADC34J4x Quad-Channel, 14-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with a JESD204B Interface". I want to confirm:

1, After Power on, the ADC34J45 send the K28.5 if the SYNC is high. If the SYNC is always high, Does ADC34J45 send K28.5 continuously?

2, After ADC34J45 reset,  Does ADC34J45 send K28.5 only if SYNC becomes high?

Best,


OPT3101: Trouble reading a reasonable phase value using a custom board and code

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Part Number:OPT3101

Hello TI support,

I have a custom PCB designed to measure two distances in the range between ~1m and ~6m.
For this, I use two SFH 4550 each pointing at a 12deg angle from the center, one to the left and one to the right. I then use one SFH203FA photodiode at the center to capture the reflected signal of each of the LEDs.

I have a custom firmware that does not use the provided SDK, but I followed all the setup steps similar to the EVM and the SDK. For testing purposes, I have a very basic configuration of the OPT3101:
no-HDR, fixed LED power, only one LED channel is selected, frequency calibration-same as in the EVM, tested with multiple numbers of sub frames and average frames from 1 to 128.

I do the internal cross-talk calibration each time and the returned values seem to be consistent from time to time: IPHASE: ~20000 and QPHASE: ~ 4000
I can't get the illumination cross-talk to be consistent though, every time I run it I seem to get different values (very different). I am waiting for the required time for filtering, I block the light to the diode, but even if let's say it's not fully blocked, it doesn't make sense to get different values when i'm not moving anything at all and just re-running the calibration.

My biggest problem is this:
When the device is running, i'm waiting for the DataRdy signal and then reading the phase value from register 8. It doesn't act as expected, for TX0 the value is around ~7000 (but it changes depending on the LED current I choose) when pointing to a distant point, but as I move a piece of paper closer and closer to the sensor, the value gets larger and larger, and just before I get to saturation, phase gets as high as ~12000.

For TX1, the direction of the phase change is correct and it gets smaller as the object gets closer, but the values don't make much sense, distance-to-phase doesn't seem linear and when getting very close just before saturation, the phase value is ~12000.

The amplitude at register 9 does change reasonably for both TX0 and TX1, but I never see a value below ~1000 even for a very far object (many meters of no obstructions). All mentioned measurements are at a fixed LED current setting of 72.8mA.

Any ideas on what's going on? especially the negative phase-to-distance ratio with TX0?

Thanks,

Ben

CCS: integrating sensor controller studio examples into ProjectZero SWRU537

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Tool/software: Code Composer Studio

Hi

I am following the example in application report SWRU537 "integrating sensor controller studio examples into ProjectZero" on page 18 it reference to "ProjectZero" . Where can I find this "ProjectZero" for import to CCS ?

Thanks, Jack

Compiler/TCA9544A: I2C connection issues, microcontroller will not recognize I2C chip

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Part Number:TCA9544A

Tool/software: TI C/C++ Compiler

Good afternoon, 

I'm using the following setup:

-ESP12-S microcontroller

-TCA9544A I2C multiplexer

The multiplexer is meant to operate 4 distance sensors, but I cannot get the ESP12S chip to properly communicate with the TCA chip when performing an I2C bus scan.

The weird thing is that a first version of our PCB with more or less same schematic could easily talk to the TCA, however, the next iteration and a complete redesign (our latest iteration) still could not solve this issue and it is quite frustrating that we could not solve this. These were the following observations:

- The TCA and all downstream I2C devices operate at 2.8V

- In our test setup these devices are not present yet in the circuit, but the SC0-SC3 and SD0-SD3 are all connected to 4k7 pullups

- instead of 47k (depicted in the schematic), I used pullups of 4k7 for both SDA and SCL, they are connected to the ESP-12S which is run at 3,3V

-Thus the TCA is used as a logic shifter, we also tried to run the ESP and TCA all on 3,3V but this did not make a difference

- Our ESP12-S has not problems communicating with our previous design, thus more or less ruling out any code issues 

- The oscilloscope shows that either;

- The SDA and SCL voltages are high

- Or we see a signal, but instead of varying between 3,3V and 0V as one might expect, the signals are disturbed or only shift between 2,8V and 2,2V

Below are schematic and pcb design, any help on this issue would be greatly appreciated, because we completely run out of ideas what could be the cause. 

Many thanks for all your answers,

Just

The chip was integrated in our circuit in the following way, I do not see how the SDA and SCL lines of the TCA chip could cause interference in this way:

CCS/TMS320F28379D: Break at address "0x3fe493" with no debug information available, or outside of program code.

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Part Number:TMS320F28379D

Tool/software: Code Composer Studio

when I debug my code in code composer studio it shows the error which is showing in the screenshot attached below. Please give me the suggestion what should I do.

Linux/AM5728: DSP customizing issue

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Part Number:AM5728

Tool/software: Linux

Hi, Ti and all,

I use PSDK05.00 and TI AM5728 IDK kit.

I want to use 2 DSP cores at same time, so I have modified the big-data-ipc-linux-demo(host_linux) of PDSK as bellow for DSP1 & DSP2:

big-data-ipc-demo-linux-01.01.00.00/host_linux/simple_buffer_example/shared/DRA7XX/config1.bld for DSP1:

...

    EXT_CODE: {
        name: "EXT_CODE",
        base: 0x95000000,
        len:  0x00100000,
        space: "code",
        access: "RWX"
    },
    EXT_DATA: {
        name: "EXT_DATA",
        base: 0x95100000,
        len:  0x00200000,
        space: "data",
        access: "RW"
    },
    EXT_HEAP: {
        name: "EXT_HEAP",
        base: 0x95300000,
        len:  0x00300000,
        space: "data",
        access: "RW"
    },

... 

big-data-ipc-demo-linux-01.01.00.00/host_linux/simple_buffer_example/shared/DRA7XX/rsc_table_dsp1.h for DSP1:

...

#define DSP_MEM_TEXT            0x95000000
/* Co-locate alongside TILER region for easier flushing */
#define DSP_MEM_IOBUFS          0x80000000
#define DSP_MEM_DATA            0x95100000
#define DSP_MEM_HEAP            0x95300000

#define DSP_MEM_IPC_DATA        0x9F000000
#define DSP_MEM_IPC_VRING       0x99000000
#define DSP_MEM_RPMSG_VRING0    0x99000000
#define DSP_MEM_RPMSG_VRING1    0x99004000
#define DSP_MEM_VRING_BUFS0     0x99040000
#define DSP_MEM_VRING_BUFS1     0x99080000

#define DSP_MEM_IPC_VRING_SIZE  SZ_1M
#define DSP_MEM_IPC_DATA_SIZE   SZ_1M
#define DSP_MEM_TEXT_SIZE       (SZ_1M * 1)
#define DSP_MEM_DATA_SIZE       (SZ_1M * 2)
#define DSP_MEM_HEAP_SIZE       (SZ_1M * 3)
#define DSP_MEM_IOBUFS_SIZE     (SZ_1M * 90)

big-data-ipc-demo-linux-01.01.00.00/host_linux/simple_buffer_example/shared/DRA7XX/config2.bld for DSP2:

...

    EXT_CODE: {
        name: "EXT_CODE",
        base: 0x95600000,
        len:  0x00100000,
        space: "code",
        access: "RWX"
    },
    EXT_DATA: {
        name: "EXT_DATA",
        base: 0x95700000,
        len:  0x00200000,
        space: "data",
        access: "RW"
    },
    EXT_HEAP: {
        name: "EXT_HEAP",
        base: 0x95900000,
        len:  0x00300000,
        space: "data",
        access: "RW"
    },

...

big-data-ipc-demo-linux-01.01.00.00/host_linux/simple_buffer_example/shared/DRA7XX/rsc_table_dsp2.h for DSP2:

...

#define DSP_MEM_TEXT            0x95600000
/* Co-locate alongside TILER region for easier flushing */
#define DSP_MEM_IOBUFS          0x80000000
#define DSP_MEM_DATA            0x95700000
#define DSP_MEM_HEAP            0x95900000

#define DSP_MEM_IPC_DATA        0x9F000000
#define DSP_MEM_IPC_VRING       0x99000000
#define DSP_MEM_RPMSG_VRING0    0x99000000
#define DSP_MEM_RPMSG_VRING1    0x99004000
#define DSP_MEM_VRING_BUFS0     0x99040000
#define DSP_MEM_VRING_BUFS1     0x99080000

#define DSP_MEM_IPC_VRING_SIZE  SZ_1M
#define DSP_MEM_IPC_DATA_SIZE   SZ_1M
#define DSP_MEM_TEXT_SIZE       (SZ_1M * 1)
#define DSP_MEM_DATA_SIZE       (SZ_1M * 2)
#define DSP_MEM_HEAP_SIZE       (SZ_1M * 3)
#define DSP_MEM_IOBUFS_SIZE     (SZ_1M * 90)
...

the others (include DTS) was not changed.

Then DSP1 booting successes, but DSP2 failed as bellow:

root@am57xx-evm:/home/test_arm_dsp# ./big-data-ipc2.sh
[ 2512.811718] omap_hwmod: mmu0_dsp1: _wait_target_disable failed
[ 2512.817678] remoteproc remoteproc2: stopped remote processor 40800000.dsp
[ 2512.824945] remoteproc remoteproc2: releasing 40800000.dsp
[ 2512.831147] remoteproc remoteproc3: releasing 41000000.dsp
[ 2512.842309] omap-rproc 40800000.dsp: assigned reserved memory node dsp1-memory@99000000
[ 2512.851539] remoteproc remoteproc2: 40800000.dsp is available
[ 2512.859494] omap-rproc 41000000.dsp: assigned reserved memory node dsp2-memory@9f000000
[ 2512.862563] remoteproc remoteproc2: powering up 40800000.dsp
[ 2512.862575] remoteproc remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 4426452
[ 2512.869257] omap_hwmod: mmu0_dsp1: _wait_target_disable failed
[ 2512.869294] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0
[ 2512.869328] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0
[ 2512.898584] virtio_rpmsg_bus virtio2: rpmsg host is online
[ 2512.898622] remoteproc remoteproc2: registered virtio2 (type 7)
[ 2512.898626] remoteproc remoteproc2: remote processor 40800000.dsp is now up
[ 2512.899365] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x3d
[ 2512.938381] remoteproc remoteproc3: 41000000.dsp is available
[ 2512.951035] remoteproc remoteproc3: powering up 41000000.dsp
[ 2512.956943] remoteproc remoteproc3: Booting fw image dra7-dsp2-fw.xe66, size 4426452
[ 2512.971454] omap_hwmod: mmu0_dsp2: _wait_target_disable failed
[ 2512.977356] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0
[ 2512.983283] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0
[ 2512.989461] alloc_contig_range: [9f004, 9f007) PFNs busy
[ 2512.995335] cma: cma_alloc: alloc failed, req-size: 2048 pages, ret: -12
[ 2513.002074] omap-rproc 41000000.dsp: failed to allocate dma memory: len 0x800000
[ 2513.009542] remoteproc remoteproc3: Failed to process resources: -12
[ 2513.022765] omap_hwmod: mmu0_dsp2: _wait_target_disable failed
>> main() start:
Main_main() start:
App_create() start:
msgqName=DSP1:MsgQ:01
msgqName=DSP2:MsgQ:01
^CIpc: Caught SIGINT, calling Ipc_stop...

########## dsp1 log ##########
[      0.000] 18 Resource entries at 0x95000000
[      0.000] [t=0x000252a1] xdc.runtime.Main: --> main:
[      0.000] registering rpmsg-proto:rpmsg-proto service on 61 with HOST
[      0.000] [t=0x00295f77] xdc.runtime.Main: NameMap_sendMessage: HOST 53, port=61
[      0.000] [t=0x002a5b7a] xdc.runtime.Main: --> smain:
[      0.000] [t=0x002afd94] Server: msgqName=DSP1:MsgQ:01
[      0.000]
[      0.000] [t=0x002bdfcd] Server: Server_create(): server is ready
[      0.000] [t=0x002c2d7a] Server: Server_create() leave: 0
[      0.000] [t=0x002c6868] Server: Server_exec(): start

How can I solve this issue?

Please lead me to success.

Thanks,

Best Regards.

Aither.

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