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LSF0204: Use dual LSF0204 to achieve 0.8V to 1.2V?
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TMDSSOLARPEXPKIT: Digital library for non-ideal Proportional-Resonant Controller.
Part Number:TMDSSOLARPEXPKIT
In one of previous e2e thread on Proportional-Resonant Controller , it was shown, how ideal PR controller transfer function is mapped to generic 2p2z structure which is available in solar library.
Ideal PR resonant controller has infinite gain at resonant frequency so sometimes system can become unstable. To overcome this issue I would like to implement non-ideal PR controller with damping term added to ideal transfer function as shown in attached image.
My questions are: Can non-ideal PR resonant controller also be mapped to 2p2Z structure? if not, does TI has any library to support implementation of non-ideal PR controller?
Milan
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TLV320ADC3101: Dual TLV320ADC3101 use same I2S and support four D-MIC
Part Number:TLV320ADC3101
Hi Team,
There are two questions, please kindly help.
1. Can we use the same I2S to two TLV320ADC3101, and support D-MIC*4?
2. Can we use one TLV320ADC3101 to support D-MIC*2 + A-MIC*2?
Thanks
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TIDA-00366: Bootstrap circuit
Part Number:TIDA-00366
Hello!
According to the schematic of TIDA-00366, at the starting point it's clear that bootstrap capacitors aren't charged.
So AMC1301 IC's used for three-phase current sensing are not supplied because their VDD1 are supplied from bootstrap circuit (VCC_U,VCC_V,VCC_W).
It is noted in AMC1301 datasheet that when VDD1 supply is missed, there is a fail safe output strategy that Vout-p goes to zero and Vout-n about 2.7v. The Amc output is Amplified with a gain of 0.797 through OPA320 and is summed with 1.65V which is (2.7*0.797+1.65=3.8v). so OPA output is saturated in 3V3.
therefore overcurrent protection comparator(TLC372) does it's duty and overload signal (output of TLC372) is produced making the nand-gate output to go high which is Disable signal.
Finally, Disable signal turns off the ucc21520. so the bootstrap circuit cannot be charged at all.
Am I right? this is what I am experiencing in my circuit. Is there any solution?
Thanks.
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LP5907: Regarding Performance difference between the packages
Part Number:LP5907
Hi,
In one of our designs we are planning to use LP5907 LDO, I just want check is there any performance (interns of loading, thermal characteristics) difference between part numbers" LP5907SNX-1.8/NOPB" and LP5907UVX-1.8/NOPB. I know these are two different packages one is X2SON and other is DSBGA . if there is a difference in performance, which one is good, can you please provide your feedback on this.
Regards,
Venkat
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IWR1642BOOST: mmWave demo record stream stops after 5 minutes
Part Number:IWR1642BOOST
Dear all, I wanted to record a bigger datastream using the mmWave demo. Parameters were set to maximum of 1GB and 1h. Nevertheless, the streams stops after 5 minutes and data is lost. As additional information, I worked with Chrome as well as with the standalone app on a Win7 system. You have any idea why this breaks down? Best regards!↧
TMS320F28075: What causes abnormal regular XRS low reset (and JTAG cannot be connected)?
Part Number:TMS320F28075
Champs,
I am asking this for our customer.
They use F28075PTP and tested for 10+ boards/units with same software codes.
Now, two of the testing boards have this abnormal XRS low issue.
Initially, these two running their codes well on their board.
But after long time, XRS pin become low about every 5 ms (see green channel 4 below) even though they power cycle.
Other observations:
1. It's weird that JTAG cannot be connected to CCS, but the impedances and oscilloscope waveforms of all JTAG pins (TCK, TDO, TDI, nTRST, TMS) are correct. No matter boot mode is GET mode (flash boot) or WAIT mode, JTAG cannot be connected.
During WAIT mode, XRS is kept high because the code doesn't seem running, but the JTAG still cannot be connected. No CSM password is used here.
Because JTAG cannot be connected, we cannot read the register RESC for the source of reset.
2. Checked every VDDIO (3.3V) and VDD (1.2V) and they are all correct.
3. The customer confirmed the code has been at least run into initialization because the GPIO in the initialization code is toggled in the above oscilloscope snapshot.
4. In their codes, they do use watchdog. But they reset watchdog in their codes regularly.
5. I noticed there are some pins connection need to be checked:
FLT1 (pin 73): they connect it to ground with a pull-down resistor though the datasheet says this should be left unconnected.
FLT2 (pin 74): they connect it to ground with a pull-down resistor though the datasheet says this should be left unconnected.
ERRORSTS (pin 72): they connect it to ground with a pull-down resistor. The datasheet says this is an output with internal pull-down.
Q: Even though FLT1/FLT2 are wrongly connected to ground, will them cause this abnormal XRS?
Note that they have tested for 10+ boards with same F28075 codes, but only two of them have this abnormal issue so far.
Do you have any suggestion what causes this abnormal regular XRS low resets?
Wayne
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TIDA-00366: Bootstrap circuit
Part Number:TIDA-00366
Hello!
According to the schematic of TIDA-00366, at the starting point it's clear that bootstrap capacitors aren't charged.
So AMC1301 IC's used for three-phase current sensing are not supplied because their VDD1 are supplied from bootstrap circuit (VCC_U,VCC_V,VCC_W).
It is noted in AMC1301 datasheet that when VDD1 supply is missed, there is a fail safe output strategy that Vout-p goes to zero and Vout-n about 2.7v. The Amc output is Amplified with a gain of 0.797 through OPA320 and is summed with 1.65V which is (2.7*0.797+1.65=3.8v). so OPA output is saturated in 3V3.
therefore overcurrent protection comparator(TLC372) does it's duty and overload signal (output of TLC372) is produced making the nand-gate output to go high which is Disable signal.
Finally, Disable signal turns off the ucc21520. so the bootstrap circuit cannot be charged at all.
Am I right? this is what I am experiencing in my circuit. Is there any solution?
Thanks.
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CC1352R: TI-15.4 STACK support
Part Number:CC1352R
Hi all,
1) does this hardware supported by TI-15.4 stack ??
2) Network size specified is upto 150 devices, is it theoretical limit or practical tasted limit ??
3) what are the data rates supported by TI-15.4 stack ??
4) Network topology supported is purely star or it also supports Extended star??
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TVP5150: Specifications for TVP5150EVM
Part Number:TVP5150
Hi,
I am currently working on a module that includes analog video decoder to decode the NTSC video signal on the input side and outputs the decoded data in CPI format. TVP5150 seems to be a better fit to do this, but while searching for its evaluation board TVP5150EVM online, I could see that it is obsolete. So I just thought of doing the development board for TVP5150 from my end, but I wanted to check what are the required components that needs to go on a self developed board inorder to test the TVP5150 functionality effectively. Also I could see that the video registers on the obsolete board is initialized using I2C serial interface and the board also includes the WinVCC4 application program for the system operation.
Is there any way that I can get the WinVCC4 application program online so that I can use it to test the TVP5150 decoder after interfacing it with the self developed board. Kindly clarify me on the evaluation board specifications that are required to effectively test the functionality of TVP5150. Also please let me know whether I can get the WinVCC4 application program even though the evaluation board TVP5150EVM is obsolete and is not available in any online electronic store.
Kindly help me in clarifying the above mentioned doubts regarding the evaluation board TVP5150EVM as there is a high priority project based on TVP5150 video decoder that cannot be progressed without testing this decoder module on a development board.
Thanks in advance!
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TCA5013: Alternative to TCA5013
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CC2652R: usage of CC2590?
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DLP3010: DLP3010 DMD remove
Part Number:DLP3010
I have bought DLP 3010 EVM module. I need to disassemble DMD from the light engine in order to use it separably from the light engine optics. The DMD heat sink and the flex cable are glued, but does any body know if the DMD and TIR prism are glued or have a physical connection.
Thank you in advance for your answers.
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AM5716: EtherCAT software
Part Number:AM5716
Hi Team,
I couldn’t see any supporting software to download for the EtherCAT outlined in your document TIDUBZ1B. Can you help?
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RTOS/AM3357: EtherCAT Slave issue
Part Number:AM3357
Tool/software: TI-RTOS
When I compile my running programm on AM3357 EtherCAT Slave with ARM CC5, everthing is fine. I can use it as CiA402 Axis with TwinCAT 3.
Now I migrate the programm to ARM CC6.10.1. Now there is (at least) this issue:
TwinCAT requests Slave state from PREOP to SAFEOP. Therefore some objects write accesses are neccessary: e.g. 0x1c12, 0x1c13,...
After some accesses HW_EscReadMbxMem() returns an empty buffer, completely filled with zero. But Wireshark show the correct datagram, also the returned datagram with incremented working counter. The empty mailbox buffer can not processed and the request times out at the master.
This situation has a likelyhood of approximately 15-20%. Therefore it is not possible to change completely to SAFEOP or OP because of failed object access.
What's coming wrong? Why gives HW_EscReadMbxMem() sometimes an empty buffer with CC6?
Regards,
Matthias
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DS90C383: 24 RGB to LVDS converter
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CC2640: CC2640 call GATT_WriteCharValue delay issue
Part Number:CC2640
Dear
It will delay about 1s reponse when i call GATT_WriteCharValue API function Why？
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DLPDLCR2000EVM: How do I create a NEW default flash image for the DLP EVM?
Part Number:DLPDLCR2000EVM
I've been working with the 2000EVM for several months now, and have successfully integrated it with an FPGA using RGB parallel video and my custom framebuffer video subsystem. I have very simple initialization requirements for the DLP on system startup:
- VGA landscape
- Parallel RGB I/F
- 24 Bit RGB 888
I've been using the DLPC2607 GUI and DevaSys I2C board for early integration work. Given the simple startup and operation setup above, I do not want to integrate an I2C controller in my system to perform such a simple initialization routine (delay on startup is also a factor). I realize the EVM ships with a default flash image, but it requires me to issue commands to change the modes above, not to mention the default splash screen being unneeded.
What is the solution to create a custom flash image for the DLP2000 in order to avoid implementing an entire I2C module+code to initialize the DLP system? Thanks for any direction!
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DAC8881: DAC does not output expected values
Part Number:DAC8881
For a project I'm working one I have to use two DAC's. I have chosen for the DAC8881 DAC.
No I encountered a problem that I do not quite understand why it happens, so I hope one of you can help me a step further.
(Let me note that I'm not a hardcore programmer)
The DAC8881 seems to me to be quite a simple DAC and so I didn't expect any problems. I know that the problem I have is something I do/did wrong but for some reason I can't figure out what it is.
The problem I have is this:
- When I send a value to the DAC it doesn't output what I expect it to do. The output doesn't seem to have any logical pattern.
The control seems to stop at 0x7FFF and does not follow a linear pattern from 0x0000 to 0x7FFF.
Vref = 2.048V (LM4132AMF-2.0)
AVDD = 3.3V
DVDD = 3.3V
Default hardware setting:
Default boot:
Vout = 0V (Register = 0000h) RSTSEL -> GND
PDN = GND -> device is never powered down
SDOSEL = IOVDD -> Device in standalone mode
GAIN = GND -> Gain = 1x
!LDAC = GND -> DAC value immediately updated
!RST = +3v3 -> Device never hardware reset, excl. power cycle
RSTSEL = GND -> sets the boot output voltage register to 0x0000 / 0V
USB/BTC = IOVDD -> Straight Binary Code output
The circuit made is equivalent to: the Analog Output Closed-Loop Configuration shown in the datasheet on page 26. (on my board the RFB and Vout pins are connected at the point where the signal leaves the PCB)
Some Examples: (Just for your information: the real output voltage measured with a Fluke 115)
Send Code: (confirmed with Logic analyzer) 0x0C80 should be 0.1V at the output real output is: 0.064V
Send Code: (confirmed with Logic analyzer) 0x1900 should be 0.2V at the output real output is: 0.128V
Send Code: (confirmed with Logic analyzer) 0x2580 should be 0.3V at the output real output is: 0.008V
Send Code: (confirmed with Logic analyzer) 0x3200 should be 0.4V at the output real output is: 0.256V
Send Code: (confirmed with Logic analyzer) 0x3E80 should be 0.5V at the output real output is: 0.480V
Send Code: (confirmed with Logic analyzer) 0x4B00 should be 0.6V at the output real output is: 0.016V
Send Code: (confirmed with Logic analyzer) 0x5780 should be 0.7V at the output real output is: 0.056V
Send Code: (confirmed with Logic analyzer) 0x6400 should be 0.8V at the output real output is: 0.512V
Send Code: (confirmed with Logic analyzer) 0x7080 should be 0.9V at the output real output is: 0.768V
Send Code: (confirmed with Logic analyzer) 0x7D00 should be 1.0V at the output real output is: 0.960V
Send Code: (confirmed with Logic analyzer) 0x7FFF should be 1.024V at the output real output is: 1.024V
Send Code: (confirmed with Logic analyzer) 0x8980 should be 1.1V at the output real output is: 0.008V
Send Code: (confirmed with Logic analyzer) 0x9600 should be 1.2V at the output real output is: 0.032V
Send Code: (confirmed with Logic analyzer) 0xA280 should be 1.3V at the output real output is: 0.004V
Send Code: (confirmed with Logic analyzer) 0xAF00 should be 1.4V at the output real output is: 0.112V
Send Code: (confirmed with Logic analyzer) 0xBB80 should be 1.5V at the output real output is: 0.408V
Send Code: (confirmed with Logic analyzer) 0xC800 should be 1.6V at the output real output is: 1.024V
Send Code: (confirmed with Logic analyzer) 0xD480 should be 1.7V at the output real output is: 1.024V
Send Code: (confirmed with Logic analyzer) 0xE100 should be 1.8V at the output real output is: 1.536V
Send Code: (confirmed with Logic analyzer) 0xED80 should be 1.9V at the output real output is: 1.608V
Send Code: (confirmed with Logic analyzer) 0xFA00 should be 2.0V at the output real output is: 1.919V
Send Code: (confirmed with Logic analyzer) 0xFFFF should be 2.048V at the output real output is: 2.047V
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A Small snippet of the code:
void SendVoltageToDACValue(int setpoint, GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
uint16_t DACValueToSend = 0;
DACValueToSend = setpoint;
SPI_DataToSend[0] = (uint8_t)((DACValueToSend & 0xFF00)>>8);
SPI_DataToSend[1] = (uint8_t)((DACValueToSend & 0x00FF));
digitalWrite(GPIOx, GPIO_Pin, LOW);
HAL_Delay(1);
HAL_SPI_Transmit(SPI_HANDLER, SPI_DataToSend, 2, SPI_TIMEOUT);
digitalWrite(GPIOx, GPIO_Pin, HIGH);
}
Do any of you have an Idea what the issue is here? I think it should be very simple but I just can't see it.
Thank you in advance for your time and effort
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BQ27520-G4: How to double up on gauges to accommodate a larger battery
Part Number:BQ27520-G4
Hi Guys
I have a need for a 48Ah Li-Ion battery by putting 16x18650 cells in parallel.
This is because our application should last (provide battery operation) for up to 24 hours from ~3.7V nominal supply.
But the bq27520 can only measure up to 32Ah and the BQ78350-R1 only does series cells (up to 320Ah though).
Can I split my battery pack (8 cells each) and use two gauges in parallel?
Kind regards
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