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ADC32RF80: ADC32RF80 Register Setting?

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Part Number:ADC32RF80

Dears.

There is no signal from the ADC's digital block.
When test pattern occurs, the signal is normal to LINK, Transport, 12bit-RAMP.
but Test pattern of digital block and there is no signal at ADC input.
and The value of main digital page is 00 even if it is controlled and read.
I would like to ask if there is anything I should check on this problem.

Thank you.


RF430FRL152HEVM: JTAG Voltage Translation

LM25122-Q1: gate output

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Part Number:LM25122-Q1

Hi~

Customer is under development with LM25122-Q1 but there is some distortion in gate output.

When I check on EVM, EVM also has same gate output distortion(HO).

Would you explained why and can we improve? is there no side effect?

Thanks.

TAS2505-Q1: TAS2505 SPI Scripts

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Part Number:TAS2505-Q1

I am currently trying to learn to program the TAS2505-Q1 using scripts, but I can only find IC2 examples. I am new to SPI and would like to program the TAS2505 using SPI. Are there any references to how I can write scripts in SPI commands?

ADS124S08EVM: Drifting Output Voltage over time

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Part Number:ADS124S08EVM

Hi,

I am testing the ADS124S08 using the eval board to confirm that the ADC can be used for precise voltage measurements (on the order of microvolts). I have been using strain gauges in a full Wheatstone bridge configuration connected to the EVM. This circuit should not change its output with temperature, which I was testing to confirm. Using a Thermotron, I was testing the ADC for drift with temperature, but noticed that the output voltage seems to be drifting over time, regardless of temperature, about 20-30 microvolts over an hour and a half.

Is there a reason I am seeing this drift from the ADC? Based on the datasheet for the ADC, I was not expecting this drift over time.

Between each sample, the ADC is not powered. Before taking a sample, I plug in the EVM, run the "Bridge Measurement using J8 and REFP0", set the gain to 4, use the Sinc3 filter, and set the data rate to 50 sps. I then take data for 75 seconds. I have attached some graphs of data where you can see the voltage drift below. Usually, it drifts up, but in one case it drifted down. I also tried switching to using global chop instead of the ADC calibration, but still saw a downward drift over time. 

Thank you for the help!

TPS65642: How to disable protection function for VGH

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Part Number:TPS65642

Hello,

I took mistake in making PCB with this part. I made VGH pin floated and thereby the device disbled by the internal protection.

I would like to run without VGH if possible.

Is there any way to disable VGH sensing and protection function for VGH? 

Regards,

Soontek Oh

Dimming of LP55231

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I have questions about LP55231.

Question 1.

Please tell us the function of the following terms.

What are these used for?

  - Engine

  -program memory

Question 2.

Does this IC have dimming method any other way than I2C?

We want to flash the LED.

Best regards,

Takahiro Nishizawa

Compiler/TMS320F28377D: warning #225-D: function "__sqrtf32" declared implicitly

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Part Number:TMS320F28377D

Tool/software: TI C/C++ Compiler

Hi,

I am trying to use __sqrtf32 from TMU. All other functions from the same instruction set (Table 3-5 in SPRUHS1A:  __div2pif32, __divf32, __sinpuf32, __cospuf32, __atanpuf32) are called without any problem. However, __sqrtf32 creates warning #225-D: function "__sqrtf32" declared implicitly. What am I missing here?

Enver


OMAP-L138: OMAPL138 LCD Kit Board Files Won't Open

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Part Number:OMAP-L138

Hello,

I recently purchased the OMAP-L138 Development Kit (LCDK) and downloaded the accompanying board design files from the ti website.  All the board design files were downloaded from the following url under the "Design files" section of the page:

All the board files came in a zip file named "sprcaf3.zip."

The issue I'm running into is when trying to open up the board's .brd file under \sprcaf3\OMAP L138_release_A7a\Layout\OMAP-L138_C6748_LCDK_PCB-004_r4a.brd\  I've tried loading this file both in CircuitMaker and Eagle, but both programs give me an error when trying to open it up.  Is there a particular PCB editor I need to open this file?  Is the .brd file that's included corrupted?

If you have any ideas, I'd greatly appreciate it!

Thank you!

UCC2897A: T(on) and T(off) Variations

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Part Number:UCC2897A

Hello,

Over temperature, do Ton and Toff vary proportionally, or do they vary asymmetrically over temperature.  I can understand (and expect) the switching period varies over temperature.  What I’d like to better understand is how Ton and Toff relative to each other can vary, which can affect the actual maximum duty cycle.

Thank you,

Ryan B.

WL1837MOD: question about schematic

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Part Number:WL1837MOD

Hi,

We've got TI's schematic review as below link. (all threads are locked so I can't make any more reply to that forum.)

https://e2e.ti.com/support/wireless_connectivity/wilink_wifi_bluetooth/f/307/p/655077/2410703#2410703

Thanks to TI, we succeeded in designing WL1837 to customers' application.

They're going to use 5V for the SW3 in the PMIC.
I think the circuit is wrong and the review is not working well.
So I ask for confirmation. Is SW3 step-up?

Please also inform the following diode specifications.

thanks,

TS

TLC6C598-Q1: TLC6C598QDRQ1 ine

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Part Number:TLC6C598-Q1

Dears

Customer's product is dashboard, some return equipment  appear 8channels  LED can't been turn on,  After test and X-ray  display customer found pin7(CLR pin)  inner lead has been breaked ,pin7 is powered by VCC(5V) driectly, Does customer's application is reasonable and  look forward your advice .

CC2640R2F: Multirole simulataneous connection to 4.2 and 5.0 devices possible?

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Part Number:CC2640R2F

Hi

Is it possible to have a BLE 5.0 device running on the CC2640R2F in a multi role configuration to connect to a BLE5.0 slave and a BLE4.2 master at the same time?

The application we want to do is to have the CC2640R2F connect to a 5.0 audio headset (CC2640R2F is master and headset is slave). At the same time w'd like to be backwards compatible to allow parameters being set/changed on the CC2640R2F via a mobile app, whereas the mobile is the master and the CC2640R2F is the slave.

If this scenario is not possible, is it possible if the mobile is a BLE5.0 Master (which obviously would limit the application to only work with the latest phones)?

Also if simultaneous connection is not possible, it may be an option to have the CC2640R2F, connect to the mobile for configuration and then disconnect the mobile (4.2) before connecting to the headset (5.0).

Thanks

Reto

UC2843: the Error Amplifier Transconductance

Compiler: I don't know what's different CC1310DK_7XD and CC1310_LAUNCHXL....

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Tool/software: TI C/C++ Compiler

I don't know what's different CC1310DK_7XD and CC1310_LAUNCHXL....

Packaging ?


TPS61099: about ultra low power mode of TPS 61099.

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Part Number:TPS61099

Hello

Please tell me about ultra low power mode of TPS 61099.
This information is needed because the problem of Vout (about 200 mV) at the transition from no-load (Iout = 0 uA) to operation (Iout = 10 mA) by the customer's experiment is a problem.

I found the following thread, TPS 61099 has an ultra low power mode and there is a response delay.
e2e.ti.com/.../670024

What is the boundary current value of this IC's operation mode (PWM mode, PFM (Burst mode) mode, ultra low power mode)?

In my customer's system, since Iout falls to 100 uA or less in standby mode, I hope that there will be no transition delay from ultra low power mode to PWM mode (Iout = 10 mA).

Or please give me advice if there is a way (inductor change etc) to improve response delay.

Best regards.

k-hashi.

CC1310: Can you help me to review the Schematic

F28M35H52C: Behaviour of EPI as GPMODE reading data by C28

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Part Number:F28M35H52C

Hi, I tried to read data from FPGA through EPI by C28 as fast as it could. As discussed in other threads, the fastest cylce read by EPI could be two EPI clocks in GPIO MODE. So the EPI is configured as following:

EPI clock = 75MHz; MODE = GPMODE; READ2CYCLE = 1; ASIZE =12; DSIZE =16;

C28 clock =150MHz;

The RTW registers remains as default.

When the M3 was initialized, it halted. I checked the behaviour of EPI in C28 using the assembly codes:

....

movl xar1, #_getBuff ; read buffer

movl xar0, #_EPI_ADDR ; 0x30 0000

L1: .loop 16

mov al,*XAR0

mov *XAR1, al

.endloop

rpt #255

|| nop

bf L1, unc

......

Howerver, one reading cylce are almost 10 C28 cycles, equal to 5 EPI Clocks, more than the expected. And I checked the RD (EPI0S29) and CLOCK (EPI0S31) pin using the oscilloscope. There were almost 4 EPI clocks between the RD signals. The question is: Is this behaviour normal? Or, is there any incorrect configuration described above?

RTOS/66AK2H14: Can use SYS BIOS to process data from 10 Gb ethernet

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Part Number:66AK2H14

Tool/software:TI-RTOS

Hi,

I have a evm 66AK2H16 board, I want to connect it with another board to receive data by 10 Gbits ethernet. Can I use SYS BIOS to receive data and process it? Can you give me some introductions to do this?

thanks you very much

LM48511: pin difference on pin define and typically application

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Part Number:LM48511

Hi Sir,

O the spec of LM48511, there is a typically application on 8.2(page16) that shows the pin20 is FB_GND0 and Pin21 is FB_GND1, while it is different from the pin definition on page4.

Could you help to clarify which one is correct and let us know?

Thanks,

Patrick

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