Hi,
We are using SN75HVD11DR for a production of 10 lakh devices. We would like to clarify whether this product has support for more than 5 years.
Please respond asap.
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Life status of SN75HVD11DR
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TMS320F28379D: Connection to external drive
Part Number:TMS320F28379D
Hi,
I want to connect the chip TMS320F28379D with external memories like SRAM and Flash. Can you give me some guidence like schematic diagram ? It is best if it's about F28379D's connnection with IS61LV25616 or SST39VF800.
And I saw the <LAUNCHXL-F28379D Overview User's Guide > and get some questions.
The schematic diagram shown blow is from the guide. I want to ask if the connector is used to connect with external drive like SRAM and Flash? But why A0&A1 connect with EMIF bank address(GPIO 93&92) instead of EMIF address line?
In addtion, can the pin GPIO 72 be the EMIF data transmission channel for which is pull up in the schematic diagram, as the following picture shows. And if yes, does the data transmission function have to be implement by manually turned off the SW?
Best regards,
Ditny.
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TPS54260-Q1: Circuit review and inquire capacitor capacity in compensation circuit.
Part Number:TPS54260-Q1
Hi team.
My customer designed the power with the TPS54260-Q1
He designed 24V input and 12V output circuit.
He want to verify the circuit .
And he want to recommend capacitor capacity in compensation circuit.
I hope to share customer's schematic, but that is confidential.
So, I will send it by email when the person in charge is determined.
Thank you.
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Linux/BEAGLEBN: MLO,u-boot and FS from uIMage.img
Part Number:BEAGLEBN
Tool/software: Linux
Hi,
I have bone-debian-9.1-lxqt-armhf-2017-08-31-4gb.img image file for my BBB.When we are booting from SD/flashing into emmc all are loaded into single partition mmcblk1
Is there any way to extract MLO/u-boot and FS from this image and load them in separate partitions ?
Regards
Zee
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AFE5818: SPI link to registers : difference between ADC and VCA part
Part Number:AFE5818
Hi everyone,
I work currently on a project which integrate an AFE5818 in our board. I use an FPGA to do SPI communication with the AFE5818. To test registers, I write a value on it, and I read this register
-> When I test register on ADC part (addr 0x01 to 0x42), I never have issue
-> When I test register on VCA part (addr 0xC3 to 0xD9), the result is different : sometimes it works, sometimes the result was 0xFFFF, independently of the data I write before, and sometimes the result has no meaning.
I try to debug it, but i don't understand how the same SPI module with the same protocols can have different result. Is it possible to know if there is any physical difference on this two part (VCA, and ADC), like voltage source for example ? The datasheet seems do a distinction between register for these parts, but without more details.
I can't check the signals between FPGA and ADC because there are in the board, but I do a copy on others pins of FPGA to check, and I check it, without issue. And the fact that the communication with register from ADC part always work let me think that the SPI protocol is OK on the FPGA.
Thanks for your help
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TPS54561: HDMI Interface issues
Part Number:TPS54561
We have used TPS54561DPRR in our new design & observed that if we turn on the board by connecting the HDMI port(to PC monitor,AC supply), device gets hang.If we connect the HDMI port, after device power ON then no issues.
HDMI & Power supply schematics:
Note: U25 is removed (HDMI is not working with U25) and 5th & 6th pads of U25 shorted
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ADS5560: how to use the parallel CMOS output mode and single-end clock input
Part Number:ADS5560
hi, TI expert
i would like to use high seed A/DC (ADS5560 40MSPS), but it is my firt time for desing circuit.
i would use the FPGA device to receive the A/DC output by parallel COMS mode through the SN74AVC16827DGV , and the A/DC Clock mode is single-end input by FPGA outputting a 40MHz signal.
hope that TI expert help to check my schematic attached file, and feedback suggestion to me.
thank a lot ,
BR,TH
(Please visit the site to view this file)
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BQ27750: BQ27750 MTBF/FIT rate
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CC3220S-LAUNCHXL: CC3220S load firmware question
Part Number:CC3220S-LAUNCHXL
Hi TI enginner
I want to know if we have no CC3220S launchpad, we can use other tools like ch340g or cp210x to burn firmware on CC3220S ?
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RTOS/TMS320F28379D: Regarding Example and Starting for Beginners
Part Number:TMS320F28379D
Tool/software:TI-RTOS
Dear Sir,
I am working on the above processor. I didn't use RTOS application but now I have to make application with TI RTOS with the given processor.
I have my custom board and also the control card docking station. And I have gone through the resource explore to find some quick start examples for this processor, But I don't find any example.
I have some idea about RTOS but I didn't work on any project with RTOS.
Please suggest how can I start work with TI RTOS and the processor.
If there are some online classes please let me know.
Ashutosh
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WEBENCH® Tools/TPS7A6401-Q1: Can you adjust the reset time of tps7a6401-q1 LDO to more than 1ms?
Part Number:TPS7A6401-Q1
Tool/software: WEBENCH® Design Tools
Hi:
1. Can you adjust the reset time of tps7a6401-q1 LDO to more than 1ms?Specifications of the book introduces the reset time is adjusted to 40 around us, as the largest reset time too fast, because once the interference signal, uncertainty is caused by the jamming signal reset, or other causes of reset.
2: if TPS7A6401 Q1 - "the reset time cannot adjust to more than 1 ms, could help to recommend a new" (with watchdog reset function) model can reset time adjust to more than 1 ms, the requirement is, car, lithium batteries Vin = 12 v, Vout = 5 v (fixed output, output does not require partial pressure resistance better), Iout = 300 ma.
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LM36010EVM: Get error Acknowledge from EVM , can't read data
Part Number:LM36010EVM
Hi There:
I'd like to check the application of LM36010EVM, using the USB interface adapter to connect the SDA/SCL & GND; VCC from EVM.
Set-up address: 0x64
Length: 8
CMD: 0x01
may I have your suggestion to check the set-up of EVM?
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LMX2582EVM: component at pin 30
Part Number:LMX2582EVM
Hi,
The latest LMX2582EVM Operating Instructions (snau194) document states on page 8 (EVM schematic), that there is a 680R to gnd at pin 30. However, the LMX2582 data sheet lists pin 30 as being a NC connection. Same for LMX2592 data sheet and EVM manual. Could you clarify which is real?
Thanks a lot & kind regards
Werner
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CCS/TDA3MA: Some IPU registers addresses are defined incorrectly
Part Number:TDA3MA
Tool/software: Code Composer Studio
Hi all
It seems like there is some mistake at the "..\ccs_base\common\targetdb\devices\TDA3x.xml" file regarding 5 IPU modules base addresses.
There are 5 modules (IPU_UNICACHE_CFG, IPU_UNICACHE_SCTM, IPU_UNICACHE_MMU (AMMU), IPU_WUGEN, IPU_MMU) which are addressed differently when accessed from the CPU0 or CPU1 of the IPU. Please refer to the Table 5-9 of the TDA3 TRM.
Please notice that when you access one of these module's registers you will see:
Only after fixing the addresses these registers can be accessible.
(Please visit the site to view this file)
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RTOS/CC2640R2F: i want use a GPIO pin to provide 3.3V to a periperal child board how can i realize it
Part Number:CC2640R2F
Tool/software:TI-RTOS
i want to use a free GPIO pin in the CC2640R2F launchpad xl board to provide a 3V-3.3V to a peripheral connected to which,
does the GPIO can be configured to fulfill this function ,if so ,how can i set the GPIO,
i meat to use the GPIO to power on the childboard and use delay_ms() funciton keep some time than power off.
i have learn about the borad has a free 3.3V pin. but i can not customize it to power on or off with out manually plug in or plug out.
can some experts give some tips , thanks a lot!
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LP55231: LED Dimming Confusion
Part Number:LP55231
Hello,
I am trying to set the pwm values directly(i2c) in the following sequence:
-write 16h - 0xFF (D1 is linked to red LED)
- delay x secs
- write 16h - 0x00
- write 17h - 0xFF(D2 is linked to green LED)
But the red (D1) fades out slowly, I want it to switch off immediately and then green to turn on.
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TMS320F28377D: ADC Input external RC filter -Problem
Part Number:TMS320F28377D
We are using the internal ADC in TMS320F28377D in sequential mode to sample 50Hz current and voltage signals for Power Electronics application.
ADC Mode - Sequential, Single Ended,Triggered by EPWM2 at 15250hz
Switching frequency - 15250hz
Sampling window time - 400ns- ADC clock at 50Mhz
External RC - R = 1000 ohm, C = 100nf at each ADC pin
MCP6L04 -Opamp buffer used before each ADC signal input.
However, the SPRAAS1C TI application note recommends a value of 100ohm, 33pf for external RC. This value is too low to filter out the high frequency components in our signal.
Please suggest a suitable RC value to be used in our system for measuring the accurate reading of 50Hz signal uptill 13th harmonics.
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TPS53667: the TPS53647 (4 phase) and TPS53667 (6 phase) are P2P solution. May we know what different between these 2 device?
Part Number:TPS53667
Hi Sir
the TPS53647 (4 phase) and TPS53667 (6 phase) are P2P solution. May we know what different between these 2 device?
The customer request around 120A output, which one much suggest?
If TPS40425RHAR/TPS53667/TPS53647 all can use CSD95372BQ5M and CSD95490Q5MC power stage?
I think it is ok, just impact efficiency. or something i have need notice? pls advise.
Bogey
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RTOS/TMS320C6678: PCIe BAR Data read from FPGA endpoint
Part Number:TMS320C6678
Tool/software:TI-RTOS
Hello,
I am trying to read data using a C6678 customized board using PCIe. The C6678 is the RC and the FPGA is the EP on the PCIe bus.
I am able to perform link training and reading remote device ID and vendor ID, but they are swapped in order, that may be because of endianess mismatch.
I am following the example in the PCIE_exampleProject and also some modifications that I found on the TI E2E forum.
On FPGA side i have configured BAR0 and BAR1 of size 8MB.
On C6678 DSP side i configured outbound translation for region 1 and region 2.
Region 1: LO: 0x00100001, HI: 0x0
Region 2: LO: 0x00200001, HI: 0x0
After that i configured remote BARs of FPGA.
BAR0
pcieBarCfg_t barCfg; barCfg.location = pcie_LOCATION_REMOTE; barCfg.mode = pcie_EP_MODE; barCfg.base = 0x00100000; barCfg.prefetch = pcie_BAR_NON_PREF; barCfg.type = pcie_BAR_TYPE32; barCfg.memSpace = pcie_BAR_MEM_MEM; barCfg.idx = 0; BAR1
pcieBarCfg_t barCfg; barCfg.location = pcie_LOCATION_REMOTE; barCfg.mode = pcie_EP_MODE; barCfg.base = 0x00200000; barCfg.prefetch = pcie_BAR_NON_PREF; barCfg.type = pcie_BAR_TYPE32; barCfg.memSpace = pcie_BAR_MEM_MEM; barCfg.idx = 1; outbound translation and BAR configuration has been completed successfully.
But when i am trying to read data from region 1 (0x60800000) and region 2 (0x61000000), i am getting data alternates between 0x60800000 and an sequence starting with 0x01 that increases in steps of 2.
Please let me know which steps i am missing out in configuration and data reading.
Thanks
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UCC256302: About operation when load is added to output
Part Number:UCC256302
hello.
I made a prototype board using UCC 256302.
I turned on the power supply.
We output voltage as specified.
Setting the load at about 0.8 A will lower the output voltage.
I thought that the overcurrent protection circuit operation is taking place, I lowered the resistance of the ISNS pin, I tried lowering the capacitance of the shunt capacitor
But the situation did not change.
Please let me know what you think is the cause.
Thank you.
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