Part Number:CC1200

Hello,

I'am having same problem described in this tread:  

I don't understand what is solution so I'll repeat problem.

So when register AGC_GAIN_ADJUST is 0x00 I receive message. When I want to fill it so I get correct value in RSS1:RSS0 registers I don't receive message. I am not sure what is problem but I suspect that CS_THR is never triggered so SNIFF never senses the carrier. As mentioned in tread above it seems that register AGC_GAIN_ADJUST affects CS_THR. I want CS_THR to be -90 dBm so using Smart RF Studio I see that it should be written 0xFE. This is ok when GAIN_ADJUST is 0x00 but when 0xAF (whic is -81 dBm. I saw it in user guied that its -81dBm for RX BW > 10 kHz) I don't receive message. I tried to fill in CS_THR directly -90 dBm as mentioned in tread above but it didn't work.

I want to read RSSI1 And RSS0 after I receive message so I can calculate RSSI. I'am open to compensate this offset with software but how can I now if value in this registers are positive or negative. 

For example in my case I have offset -81dBm (if I'am wright) so what happens if i get signal with RSSI -90dBm and when I get -75 for example. In one case resulting value in RSSI1:RSSI0 will be -18 dBm in other it will be + 6. The problem is my uC can't know RSSI1:RSSI0 is positive or negative number, or am I missing something? 

It would be easier to use that GAIN_ADJUST feature but again when it's not 0x00 i don't receive message.

Regards.

Ugljesa. 

Part Number:EMB1428Q

I'm designing a BMS with active cell balancing, referring to design guide TIDA-00817. I did go through other design guides as well. Does the switch matrix allow us to select multiple cells at a time? If not, please explain why?

Part Number:MSP432E411Y

I understand that we currently have wolfSSL. Will there be software support for TLS v1.2 in the roadmap?

Part Number:CC3220MODA

Hello,
Please let me ask about the titled XLSX cell in a checklist.
The cell name is D13.

Q1. Can I ask why a 100kohm pull-up is required for the pin46 (GPIO1/UART_TX)?

Q2. Do you agree to omit the 100kohm pull-up if the lowest current in hibernate mode is not required? Or, is it still required to prevent a false detection of a break signal?

* This is related to the following thread:  https://e2e.ti.com/support/wireless_connectivity/simplelink_wifi_cc31xx_cc32xx/f/968/t/671953

Part Number:EM1402EVM

I'm working on design of BMS with active cell balancing, referring to design guide TIDA-00817.

1.In the design, the charge is being exchanged between cell and external 12V battery. Can we alter the design of DC-DC converter to exchange charge between cell and stack? 

2.I went through the design of EM1401 as well. But two bidirectional controllers are being utilised. Why is that required? Why can we not work with one dc-dc converter?

3.Is it possible to balance multiple cells simultaneously with one converter ? If No, why not?

Hello, I am looking at the Contiki 6lbr Coder, could you help me how to compile, change this code, I would like to understand the process variants for network domain.

hi I have a board and have downloaded the software I am trying to run this code from the examples

#include"msp430x20x3.h"

ORG 0F800h ; Program start

RESET mov.w #280h,SP ; Stack

mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog

bis.b #01h,&P1DIR

Mainloop xor.b #01h,&P1OUT

Delay dec.w R15

jnz Delay

jmp Mainloop

ORG 0FFFEh ; RESET vector

DW RESET

END

it compiles with 10 errors. this is the code that comes in the examples pack please help

Part Number:DP83848K

Hi guys,

          I am doing  ethernet design for fpga board,i am using Ethernet phy dp83848k,i am facing a problem like the pc is not detecting the the ethernet  cable.I had connected in between fpga and pc. what may be the problem ,is there any reference designs available,

          Thanking you in advance.

Part Number:MSP430F5438A

Tool/software: Code Composer Studio

Dear all,

Assume that I have a function called F1 which is called in several places of my code. In a particular case I want to call that this function from another function F2 which runs in RAM.

I used the linker key words LOAD and RUN to get this F2 function with the proper addressing scheme to run it from RAM. That is working and it is not a problem.

The problem is that when I call F1 from F2, F1 is still running on Flash. How can I force the linker to generate a second version of F1 which is inlined in F2 so it runs from RAM ?

I tried to create an FUNC_ALWAYS_INLINE function F3 which calls F1 but only the call to F1 gets inlined. F1 is still on a Flash address.

Is there a way of creating a copy of a function (and all the functions called inside) so I can run it from RAM without having to repeat code?

I Hope I was clear enough.

Thank you,

Mário

Part Number:CC3220SF-LAUNCHXL

Hello,

I am following the mqtt_client example and can establish a working MQTT connection to iot.eclipse.org. For enabling a secured connection, the readme says:

Secured socket
In order to activate the secured example, SECURE_CLIENT must be defined ( certificates should be programmed ).

I already know that I need to place it in {"ca-cert.pem"} using Uniflash, but where do I get / download the correct certificate?

Thanks, 
Thomas

Part Number:TM4C123GH6PM

Tool/software: Code Composer Studio

Hi,

I'm running a project on TM4C123GH6PM. when I run the program, it works fine.

when I debug the program 'step-by-step', there 's a specific line, with a call to a function I wrote. the function sends data to an external device using the SSI.

when I try to cross this code line, even when I try to step into the function call, the compiler jumps to an arbitrary location on memory:

keep pushing 'step over' makes the program skip arbitrary between code sections, and at some point, makes the program run freely, like I let it resume.

any ideas?

Part Number:TIOL111

Team,

I have a customer that wants to communicate with an IO Link Slave Device. In this case it is not a standard Factory Automation application, so they don't want to use a IO Link Field Module such as

Do we have any suggestions for how to build a simple IO Link Master device that can communicate with a slave? Can the TIOL111 still be used as an IO Link PHY on the Master side if the customer can manage to implement a IO Link master stack on a MCU?

Thanks and Regards,

Mihir

Part Number:CC2538

Hello,

Does "source node authentication" mechanism is implemented in Z-stack?  or if it is not implemented by default then does TI solution support additional implementation of   "source node authentication" mechanism ?

Part Number:SM320F2808-EP

Please could you provide the following information for the SM320F2808PZMEP internal oscillator circuitry:-

• Value of the (assumed internal) feedback resistor Rf across pins X1 and X2

• Input and output capacitance of the (internal oscillator) inverter gate between pins X1 and X2

• gm (transconductance) of the inverter gate, and, if possible, the output resistance of the inverter gate

• propagation delay of the inverter gate.

Part Number:TMS320C6424

Tool/software: Code Composer Studio

Hello everyone,

I'm working on a project using TMS320C6424 custom board, with customized EVMC6424 GEL file, using CCS 6.0.1. on my computer the project is running very fine without any issues and outputs what's expected, but then I needed to test another custom board remotely (using teamviewer application), the second board that I need to test remotely is same as what I have tested successfully here except the processor core voltage(the board I have by my side contains TMS320C6424 1.05v, the other one we need to test remotely contains TMS320C6424 1.2v). the issue is that when I try to load and run the same project ( that passed successfully in my computer) on another computer remotely using teamveiwer the load fails everytime giving the following error :

C64XP_0: GEL: Error while executing OnTargetConnect(): Driver did not attempt to read 0x01C40D10     at (*(pll_pllm)&0x3f) [board.gel:772]     at setup_pll_2(0, 23, 1) [board.gel:789]     at Setup_PLL2_DDR_162_MHz_OscIn() [board.gel:43]     at OnTargetConnect() . Knowing that all the setup and configuration is same in the two cases and the two boards are also same in all components except the processor core voltage as I mentioned above.

Note 1 : teamviewer is an application that can give you the control over another PC remotely through the internet, so I can remotely test the boards by accessing theCCS from the PC that the board is connected to and perform the test and debugging.

Note 2 : the Jtag I used with my computer (TI XDS100v3 USB emulator) is different than what's used for the remote test (TI XDS100v2 USB emulator), but I took care of this in target configuration file.

can someone halp me to solve this issue ?

Thanks in advance

Part Number:OMAPL138B-EP

Tool/software: TI C/C++ Compiler

On the basis of OMAPL138 platform, we want to realize 24 way sampling (four independent sampling loops, 4 independent AD, each AD acquisition UA, UB, UC, IA, IB, IC path).         

   1) chip select EMA_CS[2~5] EMIFA; one for FLASH; and the 4 AD chip, CS to four, missing one; what is the solution?          

  2) the sampling frequency of 4 AD chips is controlled by PWM; at present, only 2 PWM are known on OMAPL138, and two are missing, and there is a solution           

3) there is only one input signal EMA_WAIT for the arbitration, but how does the data ready for the data of the 4 AD chips are close at the same time, and how does the EMIFA handle it? Are there any solutions?                  

Part Number:DDC11XEVM-PDK

Hello I want to use this EVAL-Board to develop the frontend for a new kind of THz-sensor.
I did a lot of work with Xilinx SpartanII and the old toolchain is still available. In order to speed-up the development in our research I want to ask for the fpga source code as a frame to modifiy and "functionalize" the nice DDCBM-board.

In order to visualize our data I want to write a python-GUI and I need also your support/ code of the small VB-App to re-engineer the data exchange via the USB port...

The EVAL-Board seems to be very flexible and thanks to the reconfigurable fpga hardware a lot more is thinkable. I was wondering that no CD was included!

Every help will be appreciated!

Thank You in advance !

Ritchie

Part Number:DS90UB926Q-Q1

Hi Champs,

My customer is investigating repeater system shown as below.

Q.1) Is it possible for MCU #B to access register of DS90U925Q of Board #A, and for MCU #A to access DS90U926 of Board #B by using pass-through feature?

Q.2) Is it possible for MCU in Repeater board to access registers of DS90U925 of Board #A?

Q.3) Is it possible to build a system satisfying both Q.1 and Q.2 simultaneously?

Best regards,

Nobuo Fujihara

Part Number:WL1837MOD

Part Number: WL1837

Tool/software: Android 7.1.1

EVM: wandboard

Hello Ti Support Team,

My WL1837 working fine except the connection problem to hidden SSIDs.My wpa_supplicant version is :"v2.6-devel-7.1.1".So I think the bug is not in wpa_supplicant.And my firmware veriso :"8.9.0.0.76",my drive version:R8.6_SP1.

The error log like this:

<3>nl80211_trigger_scan -1
<3>nl80211_trigger_scan -6 n_ssids: 0 wiphy->max_scan_ssids: 1
<3>nl80211_trigger_scan -6 NL80211_ATTR_SCAN_SSIDS: 45 tmp: 0
<3>nl80211_trigger_scan -7 n_ssids: 2 wiphy->max_scan_ssids: 1
<3>nl80211_trigger_scan -7 n_ssids: 2 err:-22

And i check the source code:

if (info->attrs[NL80211_ATTR_SCAN_SSIDS])
nla_for_each_nested(attr, info->attrs[NL80211_ATTR_SCAN_SSIDS], tmp)
n_ssids++;

if (n_ssids > wiphy->max_scan_ssids) {
err = -EINVAL;
goto unlock;
}

So,if someone can tell me why my  "wiphy->max_scan_ssids" is  allways benn "1".Is there somethings wrong?

Best Regards,

yuyun.hu

Part Number:CC2564

Hi,

We are facing what it seems to be a firmware bug on the CC2564.

While the chip is performing a LE scan, the TI logger shows errors:

72033 1 03/26/18 10:50:06.420 +0:25:40.889 <No Port> ERROR: Data Abort !!!, Link Register: 0x9257925a
72034 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72035 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72036 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72037 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72038 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72039 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72040 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72041 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72042 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72043 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72044 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72045 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72046 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72047 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72048 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72049 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72050 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72051 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72052 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72053 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72054 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72055 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72056 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72057 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72058 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72059 1 03/26/18 10:50:06.421 +0:25:40.890 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72060 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72061 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72062 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72063 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72064 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72065 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72066 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72067 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72068 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72069 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72070 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72071 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72072 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72073 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72074 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72075 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72076 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72077 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72078 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72079 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72080 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72081 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0x47e10
72082 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72083 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72084 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72085 1 03/26/18 10:50:06.422 +0:25:40.891 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004
72086 1 03/26/18 10:50:06.426 +0:25:40.895 <No Port> ERROR: Data Abort !!!, Link Register: 0xe10f0004

Beyound this point, the chip does not answer to HCI commands. This is reproductible on many of our boards embedding the CC2564 and may occur after few days of continous normal operation.

Our boards use:

Linux 4.8.6

Bluez 5.45 - default configuration

BTS file: 480-0035-R1.0_3000000_baud.bts

Please find the attached log file.(Please visit the site to view this file)

Any help on this matter would be highly appreciated,

Best regards,