I need help finding a PMIC datasheet, TPS650810 or TPS650811.

I do not know whether to provide download, or send to email.

email:8424134@qq.com

Part Number:MMWAVE-DEVPACK

I am attempting to use the MMWAVE-DEVPACK with an AWR1243BOOST board. While following the MMWAVE DFP User Guide, carefully attached an AWR1243BOOST board onto the MMWAVE-DEVPACK as descrbed, then connected power/usb cables as instructed. Both the BOOST board and the DEV board register devices in the Device Manager as expected.

 I attempted to Update the FTDI Driver for the DEV board as indicated in the guide, but I got an error:

I have tried multiple times, pointing the driver update search at the MMWAVE-SDK directory as well as the MMWAVE-DFP directory, and even the base c:\ti directory. In all cases it found a driver and tried to install it, but failed with the error above. I searched this forum and found a similar failure, but the error message was different, indicating an invalid HASH value or something like that. My error is not at all descriptive.

I am using Windows 10 64-bit. My user has administrative privileges. I downloaded the lastest installers available 2 days ago (1/16/2018) for MMWAVE-SDK version 1.1.0.2 (mmwave_sdk_01_01_00_02-Windows-x86-Install.exe) and for MMWAVE-DFP version 0.09.01.06 (mmwave_dfp_00_09_01_06_win32.exe)

What am I doing wrong?

Part Number:SN74LVC257A

Hi team,

Just want to double check and confirm for a customer if there would be any issue (voltage limit violations) if there is voltage at the I/O pins when the device is not powered (VCC = 0V)?

Same question as my other E2E post here, but want to verify with the SN54LVC257A as I don't see the particular test condition in the datasheet.

Thanks for the help and confirmation,

Jerry

Part Number:TM4C129ENCZAD

Tool/software: TI C/C++ Compiler

Hi,

I am trying to allocate memory at 0x60000000 with length of 0x02000000. My problem is I can't read the memory in the debugger and it also doesn't show up in the Memory Map even though I have my GEL/Linker Cmd files set up like so (SDRAM and ERAM).

/* tm4c129enczad.gel
 *
 * Revisions:
 *  June-10-2014 3rd revision
 *
 * This is derived from revision 15071 of the TivaWare Library.
 *
 */

menuitem "StartUp"

hotmenu StartUp()
{
    /* Load the CortexM3_util.gel file */
    GEL_LoadGel("$(GEL_file_dir)/CortexM3_util.gel");

    GEL_MapOff();
    GEL_MapReset();
    GEL_MapOn();
    memorymap_init();
}

OnTargetConnect()
{
}

memorymap_init()
{
    /*
     * Syntax for GEL_MapAddStr.
     * GEL_MapAddStr(address, page, length, "attribute", waitstate);

    Basic Attribute Types           Derived Attribute Types
    String      Description         String      Description
    R           Read                NONE        No memory/protected
    W           Write               RAM         Read and write
    P           Port                ROM         Read only
    EX          External            WOM         Write only
    EM          Emulator            INPORT      Port read only
    PR          Programmable        OUTPORT     Port write only
    ER          Erasable            IOPORT      Port read and write
    DA          Dual access         SARAM       Single access RAM
    ASn         Access size         DARAM       Dual access RAM
    SHnC        Shared              FLASH       Flash ROM
    CACHE       Cache               EXRAM       External RAM
    TX          Text                EXROM       External ROM
    MN          Monitor             EPROM       Erasable write-able EPROM
    SA          Single access       MONITOR     Monitor ROM
    FL          Flash               PRAM        Program RAM
    MR          Memory mapped       PROM        Program ROM
    NULL        NULL                NULL        NULL

    */

    GEL_MapAddStr(0x00000000, 0, 0x00100000, "R", 0);  /* Flash */
    GEL_MapAddStr(0x01000000, 0, 0x00008c00, "R", 0);  /* ROM */
    GEL_MapAddStr(0x20000000, 0, 0x00040000, "R|W", 0);  /* SRAM */
    GEL_MapAddStr(0x40000000, 0, 0x00001000, "R|W", 0);  /* WATCHDOG0 */
    GEL_MapAddStr(0x40001000, 0, 0x00001000, "R|W", 0);  /* WATCHDOG1 */
    GEL_MapAddStr(0x40008000, 0, 0x00001000, "R|W", 0);  /* SSI0 */
    GEL_MapAddStr(0x40009000, 0, 0x00001000, "R|W", 0);  /* SSI1 */
    GEL_MapAddStr(0x4000A000, 0, 0x00001000, "R|W", 0);  /* SSI2 */
    GEL_MapAddStr(0x4000B000, 0, 0x00001000, "R|W", 0);  /* SSI3 */
    GEL_MapAddStr(0x4000C000, 0, 0x00001000, "R|W", 0);  /* UART0 */
    GEL_MapAddStr(0x4000D000, 0, 0x00001000, "R|W", 0);  /* UART1 */
    GEL_MapAddStr(0x4000E000, 0, 0x00001000, "R|W", 0);  /* UART2 */
    GEL_MapAddStr(0x4000F000, 0, 0x00001000, "R|W", 0);  /* UART3 */
    GEL_MapAddStr(0x40010000, 0, 0x00001000, "R|W", 0);  /* UART4 */
    GEL_MapAddStr(0x40011000, 0, 0x00001000, "R|W", 0);  /* UART5 */
    GEL_MapAddStr(0x40012000, 0, 0x00001000, "R|W", 0);  /* UART6 */
    GEL_MapAddStr(0x40013000, 0, 0x00001000, "R|W", 0);  /* UART7 */
    GEL_MapAddStr(0x40020000, 0, 0x00001000, "R|W", 0);  /* I2C0 */
    GEL_MapAddStr(0x40021000, 0, 0x00001000, "R|W", 0);  /* I2C1 */
    GEL_MapAddStr(0x40022000, 0, 0x00001000, "R|W", 0);  /* I2C2 */
    GEL_MapAddStr(0x40023000, 0, 0x00001000, "R|W", 0);  /* I2C3 */
    GEL_MapAddStr(0x40028000, 0, 0x00001000, "R|W", 0);  /* PWM0 */
    GEL_MapAddStr(0x4002C000, 0, 0x00001000, "R|W", 0);  /* QEI0 */
    GEL_MapAddStr(0x40030000, 0, 0x00001000, "R|W", 0);  /* TIMER0 */
    GEL_MapAddStr(0x40031000, 0, 0x00001000, "R|W", 0);  /* TIMER1 */
    GEL_MapAddStr(0x40032000, 0, 0x00001000, "R|W", 0);  /* TIMER2 */
    GEL_MapAddStr(0x40033000, 0, 0x00001000, "R|W", 0);  /* TIMER3 */
    GEL_MapAddStr(0x40034000, 0, 0x00001000, "R|W", 0);  /* TIMER4 */
    GEL_MapAddStr(0x40035000, 0, 0x00001000, "R|W", 0);  /* TIMER5 */
    GEL_MapAddStr(0x40038000, 0, 0x00001000, "R|W", 0);  /* ADC0 */
    GEL_MapAddStr(0x40039000, 0, 0x00001000, "R|W", 0);  /* ADC1 */
    GEL_MapAddStr(0x4003C000, 0, 0x00001000, "R|W", 0);  /* COMP */
    GEL_MapAddStr(0x40040000, 0, 0x00001000, "R|W", 0);  /* CAN0 */
    GEL_MapAddStr(0x40041000, 0, 0x00001000, "R|W", 0);  /* CAN1 */
    GEL_MapAddStr(0x40050000, 0, 0x00001000, "R|W", 0);  /* USB0 */
    GEL_MapAddStr(0x40058000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTA AHB */
    GEL_MapAddStr(0x40059000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTB AHB */
    GEL_MapAddStr(0x4005A000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTC AHB */
    GEL_MapAddStr(0x4005B000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTD AHB */
    GEL_MapAddStr(0x4005C000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTE AHB */
    GEL_MapAddStr(0x4005D000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTF AHB */
    GEL_MapAddStr(0x4005E000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTG AHB */
    GEL_MapAddStr(0x4005F000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTH AHB */
    GEL_MapAddStr(0x40060000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTJ AHB */
    GEL_MapAddStr(0x40061000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTK */
    GEL_MapAddStr(0x40062000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTL */
    GEL_MapAddStr(0x40063000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTM */
    GEL_MapAddStr(0x40064000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTN */
    GEL_MapAddStr(0x40065000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTP */
    GEL_MapAddStr(0x40066000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTQ */
    GEL_MapAddStr(0x40067000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTR */
    GEL_MapAddStr(0x40068000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTS */
    GEL_MapAddStr(0x40069000, 0, 0x00001000, "R|W", 0);  /* GPIO PORTT */
    GEL_MapAddStr(0x400AF000, 0, 0x00001000, "R|W", 0);  /* EEPROM */
    GEL_MapAddStr(0x400B8000, 0, 0x00001000, "R|W", 0);  /* I2C8 */
    GEL_MapAddStr(0x400B9000, 0, 0x00001000, "R|W", 0);  /* I2C9 */
    GEL_MapAddStr(0x400C0000, 0, 0x00001000, "R|W", 0);  /* I2C4 */
    GEL_MapAddStr(0x400C1000, 0, 0x00001000, "R|W", 0);  /* I2C5 */
    GEL_MapAddStr(0x400C2000, 0, 0x00001000, "R|W", 0);  /* I2C6 */
    GEL_MapAddStr(0x400C3000, 0, 0x00001000, "R|W", 0);  /* I2C7 */
    GEL_MapAddStr(0x400D0000, 0, 0x00001000, "R|W", 0);  /* EPI0 */
    GEL_MapAddStr(0x400E0000, 0, 0x00001000, "R|W", 0);  /* TIMER6 */
    GEL_MapAddStr(0x400E1000, 0, 0x00001000, "R|W", 0);  /* TIMER7 */
    GEL_MapAddStr(0x400EC000, 0, 0x00001000, "R|W", 0);  /* EMAC0 */
    GEL_MapAddStr(0x400F9000, 0, 0x00001000, "R|W", 0);  /* SYSEXC */
    GEL_MapAddStr(0x400FC000, 0, 0x00001000, "R|W", 0);  /* HIB */
    GEL_MapAddStr(0x400FD000, 0, 0x00001000, "R|W", 0);  /* FLASH CTRL */
    GEL_MapAddStr(0x400FE000, 0, 0x00001000, "R|W", 0);  /* SYSCTL */
    GEL_MapAddStr(0x400FF000, 0, 0x00001000, "R|W", 0);  /* UDMA */
    GEL_MapAddStr(0x44030000, 0, 0x00001000, "R|W", 0);  /* CCM0 */
    GEL_MapAddStr(0x44034000, 0, 0x00002000, "R|W", 0);  /* SHAMD5 */
    GEL_MapAddStr(0x44036000, 0, 0x00002000, "R|W", 0);  /* AES */
    GEL_MapAddStr(0x44038000, 0, 0x00002000, "R|W", 0);  /* DES */
    GEL_MapAddStr(0xE000E000, 0, 0x00001000, "R|W", 0);  /* NVIC */
    GEL_MapAddStr(0x60000000, 0, 0x01FFFFFF, "R|W", 0);	 /* SDRAM */
    GEL_TextOut("\nMemory Map Initialization Complete\n");

}

/******************************************************************************
 *
 * Default Linker Command file for the Texas Instruments TM4C129ENCZAD
 *
 * This is derived from revision 15071 of the TivaWare Library.
 *
 *****************************************************************************/

--retain=g_pfnVectors

MEMORY
{
    FLASH (RX) : origin = 0x00000000, length = 0x00100000
    SRAM (RWX) : origin = 0x20000000, length = 0x00040000
    ERAM (RWX) : origin = 0x60000000, length = 0x02000000
}

/* The following command line options are set as part of the CCS project.    */
/* If you are building using the command line, or for some reason want to    */
/* define them here, you can uncomment and modify these lines as needed.     */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone.              */
/*                                                                           */
/* --heap_size=0                                                             */
/* --stack_size=256                                                          */
/* --library=rtsv7M4_T_le_eabi.lib                                           */

/* Section allocation in memory */

SECTIONS
{
    .intvecs:   > 0x00000000
    .text   :   > FLASH
    .const  :   > FLASH
    .cinit  :   > FLASH
    .pinit  :   > FLASH
    .init_array : > FLASH

    .vtable :   > 0x20000000
    .data   :   > SRAM
    .bss    :   > SRAM
    .sysmem :   > SRAM
    .stack  :   > SRAM

    extram_alloc  :   > ERAM type=NOINIT
}

__STACK_TOP = __stack + 512;

I am creating an array in extram_alloc like so:

#pragma DATA_SECTION(g_imgData, "extram_alloc") static uint16_t g_imgData[NUMBER_OF_SCAN_LINES * UNTRIMMED_WIDTH];

And here is what the debugger is showing me:

Memory Map (0x60000000 is missing):

Expressions tab:

I've read many threads with similar issues. I've read the Linker Command File Primer in the wiki, but please let me know if I missed something in there because I can't think of anything else I'm not doing based on my research. Thanks a lot!

Part Number:DRV10975EVM

Greetings. I am evaluating the DRV10975 as a replacement for the DRV11873 due to the false rotor lock issue associated with the DRV11873. I've worked through the tuning guide, and I appear to have good motor operation at this point . . . but I consistently get a BEMF abnormal reported (#2 fault code). I've confirmed Kt to be ~16 (4V peak to peak, 8ms period) using the finger spin method. I've also confirmed phase to phase resistance and divided by two (2.11 ohms). Odd thing is, if I start the program with the defaults. The motor spins (poorly, can't get out of open loop) with no BEMF abnormal error reported - resistance = 1.17, Kt = 120.

And unfortunately I will need the BEMF error since the motor does not seem to draw enough current in a locked state to trip the rotor lock requirements (more current is drawn during acceleration, etc).

Rapid help appreciated, we are in a bit of a bind with this last minute DRV11873 discovery and so far I'm not feeling too confident in the DRV10975.

-Chris

Part Number:TMS320F28069F

Hi all,

I have a custom inverter using TMS320F28069F, code almost identical to lab 11a, and 3 LEM current sensors, which have zero current at 1.65V on ADC. Our system is high current, so motor is designed for 200Arms and has current sensors with a linear range of +-375A. However their full scale ADC range corresponds to 1075A, (+-537A), but the far extents of this range are not guaranteed to be linear.

I have therefore set the ADC full scale current to 1075A. According to application notes, I set IQ full scale current to 538A. These values now saturate the default IQ range, so I set GLOBAL_Q to IQ21 to represent up to 2048.

There is strange behavior with current readings in gAdcData.I . Setting all offsets to 0.0 to start, two of the current sensors always appear as expected with value of 1 pu (corresponding to zero current after offset is considered), and the third one has strange behavior reporting -2 pu when no current flows through sensor. Because we verified all 3 ADC counts being correct, I think the error is likely in IQ setup or ADC to current calculation.

Separately, we found that to use the LEM current sensors from other forum threads, we needed to configure them to be consistent with negative feedback amplifier current shunt measurement and have done so.

Any help would be appreciated. Thanks!

Will

Part Number:AM5K2E04

Hello,

I am interested in the AM5K2E04 for a new high performance computer design without any need for a DSP that would need long term support (7+ years) where we would likely be buying and building systems in large buys of CPUs for batches. Does the AM5K2E04 fit this scenario or would you recommend another CPU?

Thank you,

Mark

Part Number:AWR1642

Hi Team,

I wanted to see if we had any data on RF power loss through glass (car windows) and other media? 

Thanks,

Siby

Part Number:TMS320C6745

Tool/software: Code Composer Studio

Hello,

We are writing application as bare-metal (non-OS) on C6745 DSP. We don't need an OS, the DSP should compute samples of a simple function (like sinusoid) on an external interrupt, put these samples into an external memory and go into sleep mode. In previous design we used C6720 DSP processor, which performed well, but now we have to compute the samples faster.

The C6745 is booted by an external host SPI (an STM32F4 series uC). When DSP ends booting (Jump&Close operation), the the DSP runs the main program. Viewing the map file of our project and address of jump (Jump&Close operation), we see that DSP jumps to boot.obj, and next probably to main(), so it seems correct. Because we don't use OS, we use CSLR library to configure all registers as we need.

Unfortunately we are unable to put the C6745 into supervisor mode.

In case of the C6720 we called function CSL_sysInit() when processor had started main(). Probably this function executed a procedure which put this DSP into to privileged (supervisor) state. The C6745 library CSLR, in file csl.h, contains a declaration of CSL_sysInit(), but when we call it, then the compiler can not find this function.

We cannot find the correct procedure to enter the privileged state in the library. And without transition to privileged state we are unable to set any register, for example GPIO, to confirm that the processor runs.

Please advice how to put the C6745 DSP to supervisor mode. A simple example of a code would probably solve our problem.

Thank you and best regards.

Part Number:AM5728

Tool/software: Linux

I would like to be able to set a default GPIO state in the device tree, and I would also like to easily change the output after the system boots. I'm able to use the gpio-hog property to set the initial output, but I am unable to modify its value after boot up by using sysfs. Is there another method of initializing a GPIO's output in the device tree? Or after the gpio-hog property is used in a gpio node, is there a way to modify the output after boot?

Part Number:cc3200

Hello,

Is it possible to stream video between 2 CC3200s over P2P mode? I would like to connect one CC3200 to a camera and send it to the other CC3200 which will show video on a touchscreen.

If CC3200s are not capable of this, which microcontrollers are? Do you have a recommendation for the camera and resistive touchscreen?

Kind regards,

Dorde

Part Number:CC2640

Looking at the updated TIDA-00757"Smart Lock Reference Design Enabling More Than Five Years of Life on Four AA Batteries", had some  HW/RF and SW questions.

1. Looking at p. 3 of the Smartlock Schematic (tidrmq3.pdf), I believe the RF Frontend is 4XS. Is that true?

2. If so  is  the RF Frontend to get the best BLE performance  the 5XD? 

3. Is the best way to evaluate  BLE RF performance with SmartRF06 + cc2650em-5xd-rd ?  Or can we modify TIDA-00757?

4. If we want to use an SMA Antenna on cc2650em-5xd-rd or TIDA-00757, can we just modify the 0 Ohm resistors to reroute (and populate SMA connector)?

5. Does TI recommend any particular SMA Antenna?

6. Is there any plan to port the TIDA00757-Firmware (from http://www.ti.com/lit/zip/tidcce9 ) from CC2640 to CC2640R2?

Thanks in advance!

-Joe

Part Number:MSP430F5514

Tool/software: Code Composer Studio

In the MSP430F5XX_6XX_DriverLib, the Comp_B_setInterruptEdgeDirection function sets the CBIES bit in the CBCTL1 Register incorrectly. For a rising edge for CBIFG, the bit should be set to 0 but the COMP_B_RISINGEDGE parameter sets the bit to 1.

Also, there is a documentation error in the User Guide, page 88. Comp_B_LOW should be COMP_B_LOW, same for the high value.

And the configureReferenceVoltageParam Structure is confusing for the settings of Vref0 and Vref1. The lowerLimit sets the Vref0 divider and the upperLimit sets the Vref1 divider. Depending how the comparator is configured, these may or may not be upper or lower limits. It would be clearer just to set the Vref divider directly ie:

Vref0VoltageFractionOf32

Vref1VoltageFractionOf32

One more thing, Page 80 11.2.1 Detailed Description needs to be updated with the current functions

Part Number:TMDSEVM572X

Tool/software: Linux

Hi,

In u-boot's pad configuration for the 572x, the pad configuration registers appear to be written in two separate steps/stages, first the primary pad configurations, followed by the "delta array" pad configurations.  These two arrays appear in mux_data.h, and the pad IO configurations appears to be done in two separate stages in recalibrate_iodelay() in board.c:

1) First initialization step in recalibrate_iodelay() writes the pad configuration registers using the primary pad configuration array (e.g. core_padconf_array_essential_X15)

2) Second initialization step in recalibrate_iodelay() writes the pad configuration registers from the "delta" array  (e.g. core_padconf_array_delta_X15) which appears to be mainly VIN/VOUT, mux mode 0..

*The PERL script in the pinmux app note, sprac44 (I'm using an older version), generates one big table in padconf.h containing ALL pad configurations, including VOUT, VIN, and then it looks  like  you need to split the VOUT/VIN entries from the PERL script output into the "delta array" and put everything else in the main, array (pad configuration essential).

Questions:

1)  Why are the pad configuration register writes split up into two stages like this, primary and then delta?  What were to happen if you wrote everything in one big loop as opposed to breaking this up?  Is this due to needing to bound the execution time of each configuration step or is there something about needing to bring up video after everything else?

2) Does this order dependency of first configuring all non-video pads, followed by analog video pads (e.g. the delta array) only pertain to pads configured for analog video?

3) if we re-configure a PAD who's M0 mode is analog video to a different mux mode (see example below), do we still need to place that particular pad configuration into the delta array element or can that pad configuration be placed in the primary array?

{VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d12.vout1_d12 */

{VOUT1_D12, (M10 | PIN_OUTPUT)}, /* vout1_d12.pr2_uart0_rts_n */

I don't THINK this addressed in sprac 44.  If I missed the explanation in the TRM, please forgive me!

Thanks!!!

Jeff

Part Number:LM5060

Hello, I've seen in a number of posts that the LM5060 is not recommended as a method to provide over-current protection but it is unclear to me why that is the case.  From section 8.1.5 in the datasheet, the overcurrent fault detection seems like it should provide protection in the case of a hard short circuit by monitoring the voltage drop across the FET.  I understand that the factors here are the time it takes to turn off the FET (dependent on the capacitor at the TIMER pin), the variation in Rdson of the FET, and the ability of the FET to handle the maximum possible short-circuit current for the given response time.  But if all of those are sized correctly, is there any reason this device cannot be used as a short-circuit protection switch?

I understand the LM5069 is recommended for over-current protection as it provides current limiting in the case of over-current as well as short circuit protection, but the quiescent current for the LM5069 is much too high for my battery application.  I am hoping the LM5060 will be sufficient as a short-circuit-only protection device.

Thanks,

Jess

Part Number:AM3354

When i configure the spi1,i put modifications base on spi0,however,it doesn't work,what i have changed as follows:

Part Number:AFE4300

Hi,

I am encountering an odd issue with my AFE4300. I can write values to the registers, but cannot read them back properly sometimes. I am indeed writing either a desired value or the previous value back to the register immediately after read. I am in SPI_MODE_1 (CPHA = 1).

My current program, running on a TI Beaglebone Black, after RESET of the AFE4300:

1) reads 0x8000 from MISC_REG1 and writes 0x0000 back to it
2) reads 0x7FFF from MISC_REG2 and writes 0xFFFF back to it
3) reads 0x0000 from MISC_REG3 and writes 0x0000 back to it
4) reads 0x0000 from DEVICE_CONTROL1 and writes 0x6006 to it
5) if I check the VREF pin, it is indeed activated to 1.7V
6) reads 0xFFFF (instead of the expected 0x6006) from DEVICE_CONTROL1 and writes 0x6005 to it
7) if I check the VLDO pin, it is indeed activated to 1.7V, and the VREF pin is no longer activated.
8) Any read after this results in 0xFFFF (on the SDOUT line, nothing is changing, but all other signals are correct).

I am baffled as to why the AFE4300 seems to be sending the right data sometimes (at the very beginning), and then stops sending data pretty much at all.

Here is my read function:

	uint16_t __transferRead(const uint8_t& address, const uint16_t& value, bool use_value = false) {
		const uint16_t upperbyte = 0xFF00;
		const uint16_t lowerbyte = 0x00FF;
		const uint8_t readaddr = 0x20;
		//uint8_t send[3] = { (address | readaddr), (value & upperbyte) >> 8, (value & lowerbyte) };
		uint8_t send[3] = { (readaddr | address), 0x00, 0x00};
		uint8_t recv[3];
		usleep(2);
		__spidev.transfer_block(send, recv, 3);
		uint16_t returnval = (recv[1] << 8) | recv[2];
		if (use_value == true) {
			__transferWrite(address, value);
		}
		else {
			__transferWrite(address, returnval);
		}
		return returnval;
	}

Part Number:LM5001

Hi

Part Number:LM5122

Need advice on below boost design.

Boost design with Po = 5500W .  Vin =24V-46V and Vo=48V

Exploring if 6x of 48V@20A can be done with one LM5122 ?

What complexities we will run into in terms of driving more mosfets etc.

 Thank you.

Part Number:MSP430F5438A

Tool/software: TI C/C++ Compiler

Hi,

Is there a way to generate a binary output file with a CRC using the linker?

Thanks,

Jeffrey