Part Number:CC3220SF-LAUNCHXL

Hello,

I'm stuck with SPI receive issue. I've connected CC3220SF-LAUNCHXL as master and STPM34 power measurement chip board as slave.

I've tried every approach and setting I could imagine, however, nothing works and instead of MISO data I see on oscilloscope (0x2703270F) I get wrong data with MAP_SPIDataGet (0xFF8007FF). I get wrong data if I choose 8bit or 16bit SPI word size as well.

I tried exactly the same board/wires/configuration with another (non-TI) ucontroller and it works perfectly.

I checked if SPI on the CC3220SF-LAUNCHXL works by connecting it to ADC AD7490 (SPI 16bit word). It works perfectly. That means that there is no major hardware issue.

Please see code, photo from oscilloscope and UART screenshot below.

Can somebody help me please?

Thank you!

#include "common.h"

#define SPI_CLK_HZ  1000000

uint32_t ultxBuf;
uint32_t ulrxBuf;

int main()
{

    MAP_IntMasterEnable();
    MAP_IntEnable(FAULT_SYSTICK);
    PRCMCC3200MCUInit();

    MAP_PRCMPeripheralClkEnable(PRCM_GSPI, PRCM_RUN_MODE_CLK);
    MAP_PRCMPeripheralClkEnable(PRCM_UARTA0, PRCM_RUN_MODE_CLK);
    MAP_PRCMPeripheralReset(PRCM_GSPI);
    MAP_PRCMPeripheralReset(PRCM_UARTA0);

    MAP_PinTypeUART(PIN_55, PIN_MODE_3);
    MAP_PinTypeUART(PIN_57, PIN_MODE_3);
    MAP_PinTypeSPI(PIN_05, PIN_MODE_7);
    MAP_PinTypeSPI(PIN_06, PIN_MODE_7);
    MAP_PinTypeSPI(PIN_07, PIN_MODE_7);
    MAP_PinTypeSPI(PIN_08, PIN_MODE_7);

    MAP_SPIReset(GSPI_BASE);

    MAP_SPIConfigSetExpClk(GSPI_BASE, MAP_PRCMPeripheralClockGet(PRCM_GSPI),
                     SPI_CLK_HZ, SPI_MODE_MASTER, SPI_SUB_MODE_3,
                     (SPI_SW_CTRL_CS |
                     SPI_4PIN_MODE |
                     SPI_TURBO_OFF |
                     SPI_CS_ACTIVELOW |
                     SPI_WL_32));

    MAP_SPIEnable(GSPI_BASE);

    init_term();

    Report("Press any key to transmit data...\n\r");
    MAP_UARTCharGet(UARTA0_BASE);

    ultxBuf = 0x18FF00FF; //Answer in RX for that expected 0x2703270F

    while(1)
    {
        MAP_SPICSEnable(GSPI_BASE);

        MAP_SPIDataPut(GSPI_BASE, ultxBuf);
        MAP_SPIDataGet(GSPI_BASE, (unsigned long *) &ulrxBuf);

        MAP_SPICSDisable(GSPI_BASE);

        Report("TX: %.8X   ", ultxBuf);
        Report("RX: %.8X\n\r", ulrxBuf);
    }
}

Part Number:CC2564B

I'm assisting with a group that is building an open source firmware for an existing product that uses the CC2564B. The question came up about licensing issues with TI's Bluetooth stack vs open source solutions. However, no matter what, the Init Script binary has to be loaded to the chip on power up and must be embedded into the source or distributed somehow.

How is the init script () licensed, and is it compatible with common open source licenses (such as MIT, BSD, or GNU)? Is there a difference between distributing sources with the scripts and distributing compiled firmware with the scripts embedded?

Thank you!

Part Number:AWR1642

Hi champion,
    What is the RTICLK (input clock to Real Timer module) frequency in AWR1642?

Thanks,
Adam

Part Number:TPS2662

Dear Specialists,

My customer is interested in TPS2662, he'd like to design soon.

But it is not RTM yet and there isn't datasheet.

Could you please provide some document that can be design.

If possible, datasheet is preferable.

At least, pin assign and formula of resistance and capacitance.

I appreciate your great help in advance.

Best regards,

Shinichi 

Part Number:DAC38J84

hello, Jim

        I have some problem about hardware design of our digital receiver.

        As we know, this DAC has 8 lanes to receive high speed data from FPGA, can I connected any 8 pins of FPGA GTX banks? for example, there are four banks of MGT transeiver for xilinx XC7Z100, can I connected to any 8 TX pins of this FPGA? or I must connect the two adjacent banks ?

        wait for your reply, thanks!

Part Number:CC2530

Hello everyone.

I am working smart system by using CC2530 and zstack3.0.1.

I have two coordinators and two end devices.

I only had to connect a specific end device to every coordinator.
But what if you want to disconnect a end device connected to one of the cooperators and connect them to another coordinator?
To do this, I first deleted the iEEE address from the white list of connected coordinator and registered it with the white list of  next coordinator.

My code are as following.

ZStatus_t ZDO_JoinIndicationCB(uint16 ShortAddress, uint8 *ExtendedAddress,
uint8 CapabilityFlags, uint8 type)
{

(void)ExtendedAddress;
//check if the device is leaving before responding to rejoin request
if( osal_get_timeoutEx( ZDAppTaskID , ZDO_DEVICE_RESET) )
{
return ZFailure; // device leaving , hence do not allow rejoin
}

#if 1
uint8 iEndDev;
uint8 passAddr123[Z_EXTADDR_LEN];
uint8 passAddr[Z_EXTADDR_LEN];
uint8 fSuccess = 0;

osal_memcpy(passAddr123,ExtendedAddress,Z_EXTADDR_LEN);
printf("End device ADDR : %x %x %x %x %x %x %x %x\n",passAddr123[0],passAddr123[1],passAddr123[2],passAddr123[3],passAddr123[4],passAddr123[5],passAddr123[6],passAddr123[7]);
for(iEndDev = 0; iEndDev < MAX_END_DEV_NUM; iEndDev ++)
{
osal_nv_item_init(NV_APP_EASEN_LOOKUP + iEndDev, Z_EXTADDR_LEN, NULL);
osal_nv_read(NV_APP_EASEN_LOOKUP + iEndDev, 0, Z_EXTADDR_LEN,
passAddr);
if ( AddrMgrExtAddrEqual( passAddr, ExtendedAddress) == TRUE )
{
fSuccess = 1;
break;
}
}
if (fSuccess == 0)
{
zAddrType_t destAddr;
destAddr.addrMode = Addr64Bit;
osal_memcpy(destAddr.addr.extAddr,ExtendedAddress,Z_EXTADDR_LEN);

ZDP_MgmtLeaveReq(&destAddr,ExtendedAddress,1,1,0);
return ZFailure;
}
#endif
//////////////////////////

#if ZDO_NV_SAVE_RFDs
(void)CapabilityFlags;

#else // if !ZDO_NV_SAVE_RFDs
if (CapabilityFlags & CAPINFO_DEVICETYPE_FFD)
#endif
{
ZDApp_NVUpdate(); // Notify to save info into NV.
}

if (ZG_SECURE_ENABLED) // Send notification to TC of new device.
{
if ( type == NWK_ASSOC_JOIN ||
type == NWK_ASSOC_REJOIN_UNSECURE ||
type == NWK_ASSOC_REJOIN_SECURE )
{
uint16 timeToFire;
ZDAppNewDevice_t *pNewDevice, *pDeviceList;

pNewDevice = (ZDAppNewDevice_t *) osal_mem_alloc( sizeof(ZDAppNewDevice_t) );

if ( pNewDevice == NULL )
{
// Memory alloc failed
return ZMemError;
}

// Add the new device to the New Device List
if ( ZDApp_NewDeviceList == NULL )
{
// The list is empty, add the first element
ZDApp_NewDeviceList = pNewDevice;
}
else
{
pDeviceList = ZDApp_NewDeviceList;

// Walk the list to last element
while ( pDeviceList->next )
{
pDeviceList = (ZDAppNewDevice_t *) pDeviceList->next;
}

// Add new device at the end
pDeviceList->next = pNewDevice;
}

// get the remaining time of the timer
timeToFire = osal_get_timeoutEx( ZDAppTaskID, ZDO_NEW_DEVICE );

pNewDevice->next = NULL;
pNewDevice->shortAddr = ShortAddress;
pNewDevice->timeDelta = ZDAPP_NEW_DEVICE_TIME - timeToFire;

// Start the timer only if there is no pending timer
if ( pNewDevice->timeDelta == ZDAPP_NEW_DEVICE_TIME )
{
osal_start_timerEx( ZDAppTaskID, ZDO_NEW_DEVICE, ZDAPP_NEW_DEVICE_TIME );
}
}
}

return ZSuccess;

}

Please help me.

Thanks in advance.

Piao

Part Number:TPS65263-Q1

Tool/software: WEBENCH® Design Tools

Our customer consider to use TPS65263-Q1.

But Webench don't support this device.

For simulation only,they are using TPS65261 webench tool.

They want to simulate at 2MHz operation,but advanced options on webench support up to 1.7MHz.  

Please let us know how to simulate at 2MHz.

Part Number:SN65DSI85-Q1

Hi All,

We have a project that has 4 display panel, but SOC just have 3 video pipeline, so customer is considering to expand a panel with SN65DSI85-Q1.

And want to know is it possible to use SN65DSI85 to drive two different display panel with different resolution. Block diagram is as below. 

Thanks.

Charles Zhang

Part Number:TPS62140

Hi,

Please let me ask about fastest startup time. I understand that we can see fastest startup time when driving SS/TR pin with ideal fast pulse, then how can we estimate or calculate the fastest startup time?

Best Regards,

Satoshi / Japan Disty

Part Number:CC2538

Tool/software: TI C/C++ Compiler

I development on Z-Stack 3.0,I have been occur a CC2538 IEEE read issue(can't read IEEE in zmain_ext_addr  function used "zstack\ZNP\CC2538\ZNP.eww" project).

Why zmain_ext_addr function was implementation differently in "ZMain\TI2538ZNP\ZMain.c" and "ZMain\TI2538DB\ZMain.c"  ?

1. In "ZMain\TI2538ZNP\ZMain.c" source file,this function not implements IEEE OUI upper bytes swap?

static void zmain_ext_addr( void )
{
  uint8 nullAddr[Z_EXTADDR_LEN] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
  uint8 writeNV = TRUE;

  /* First check whether a non-erased extended address exists in the OSAL NV. */
  if ((SUCCESS != osal_nv_item_init(ZCD_NV_EXTADDR, Z_EXTADDR_LEN, NULL))  ||
      (SUCCESS != osal_nv_read(ZCD_NV_EXTADDR, 0, Z_EXTADDR_LEN, aExtendedAddress)) ||
      (osal_memcmp(aExtendedAddress, nullAddr, Z_EXTADDR_LEN)))
  {
    /* Attempt to read the extended address from the location in the last flash
     * page where the commissioning tools know to reserve it.
	 */
    if (!osal_memcmp((uint8 *)HAL_FLASH_IEEE_ADDR, nullAddr, Z_EXTADDR_LEN))
    {
      (void)osal_memcpy(aExtendedAddress, (uint8 *)HAL_FLASH_IEEE_ADDR, Z_EXTADDR_LEN);
    }
    else
    {
      /* Disable prefetch when reading from Information Page. */
      uint32 fctl = HWREG(FLASH_CTRL_FCTL);
      HWREG(FLASH_CTRL_FCTL) = fctl & ~(FLASH_CTRL_FCTL_PREFETCH_ENABLE);
      
      /* Attempt to read the extended address from the Information Page. */
      if (!osal_memcmp((uint8 *)HAL_INFO_IEEE_ADDR, nullAddr, Z_EXTADDR_LEN))
      {
        (void)osal_memcpy(aExtendedAddress, (uint8 *)HAL_INFO_IEEE_ADDR, Z_EXTADDR_LEN);
      }
      else  /* No valid extended address was found. */
      {
        uint8 idx;

#if !defined ( NV_RESTORE )
        writeNV = FALSE;  /* Make a temporary IEEE address, not saved in NV */
#endif

       /* Create a sufficiently random extended address for expediency.
        * Note: this is only valid/legal in a test environment and
        *       must never be used for a commercial product.
        */
        for (idx = 0; idx < (Z_EXTADDR_LEN - 2);)
        {
          uint16 randy = osal_rand();
          aExtendedAddress[idx++] = LO_UINT16(randy);
          aExtendedAddress[idx++] = HI_UINT16(randy);
        }
        /* Next-to-MSB identifies ZigBee device type. */
#if ZG_BUILD_COORDINATOR_TYPE && !ZG_BUILD_JOINING_TYPE
        aExtendedAddress[idx++] = 0x10;
#elif ZG_BUILD_RTRONLY_TYPE
        aExtendedAddress[idx++] = 0x20;
#else
      aExtendedAddress[idx++] = 0x30;
#endif
      /* MSB has historical signficance. */
        aExtendedAddress[idx] = 0xF8;
      }

      /* Restore flash control to previous state */
      HWREG(FLASH_CTRL_FCTL) = fctl;
    }

    if (writeNV)
    {
      (void)osal_nv_write(ZCD_NV_EXTADDR, 0, Z_EXTADDR_LEN, aExtendedAddress);
    }
  }

  /* Set the MAC PIB extended address according to results from above. */
  (void)ZMacSetReq(MAC_EXTENDED_ADDRESS, aExtendedAddress);
}

2.In "ZMain\TI2538DB\ZMain.c" source file,this function implements IEEE OUI upper bytes swap.

static void zmain_ext_addr( void )
{
  uint8 nullAddr[Z_EXTADDR_LEN] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
  uint8 writeNV = TRUE;

  // First check whether a non-erased extended address exists in the OSAL NV.
  if ((SUCCESS != osal_nv_item_init(ZCD_NV_EXTADDR, Z_EXTADDR_LEN, NULL))  ||
      (SUCCESS != osal_nv_read(ZCD_NV_EXTADDR, 0, Z_EXTADDR_LEN, aExtendedAddress)) ||
      (osal_memcmp(aExtendedAddress, nullAddr, Z_EXTADDR_LEN)))
  {
    // Attempt to read the extended address from the location in the last flash
    // page where the commissioning tools know to reserve it.
    if (!osal_memcmp((uint8 *)HAL_FLASH_IEEE_ADDR, nullAddr, Z_EXTADDR_LEN))
    {
      (void)osal_memcpy(aExtendedAddress, (uint8 *)HAL_FLASH_IEEE_ADDR, Z_EXTADDR_LEN);
    }
    else
    {
      // Disable prefetch when reading from Information Page.
      uint32 fctl = HWREG(FLASH_CTRL_FCTL);
      HWREG(FLASH_CTRL_FCTL) = fctl & ~(FLASH_CTRL_FCTL_PREFETCH_ENABLE);

      // Copy 64-bit extended address from the Information Page
      (void)osal_memcpy(aExtendedAddress, (uint8*)HAL_INFO_IEEE_ADDR, Z_EXTADDR_LEN);
      if (!osal_memcmp(aExtendedAddress, nullAddr, Z_EXTADDR_LEN))
      {
        uint32 oui = IEEE_OUI;
        // IEEE OUI is located in the upper 3 bytes of an 8-byte extended address
        // Early Test CC2538EMs had the TI OUI located in the 2nd word,
        // Production CC2538 devices have the TI OUI located in the 1st word
        if (osal_memcmp(&aExtendedAddress[1], &oui, 3))
        {
          // OUI found in 1st word, swap words to place OUI in upper bytes
          (void)osal_memcpy(aExtendedAddress, &aExtendedAddress[4], Z_EXTADDR_LEN/2);
          (void)osal_memcpy(&aExtendedAddress[4], (uint8*)HAL_INFO_IEEE_ADDR, Z_EXTADDR_LEN/2);
        }
      }
      else  // No valid extended address was found.
      {
        uint8 idx;

#if !defined ( NV_RESTORE )
        writeNV = FALSE;  // Make a temporary IEEE address, not saved in NV
#endif

       /* Create a sufficiently random extended address for expediency.
        * Note: this is only valid/legal in a test environment and
        *       must never be used for a commercial product.
        */
        for (idx = 0; idx < (Z_EXTADDR_LEN - 2);)
        {
          uint16 randy = osal_rand();
          aExtendedAddress[idx++] = LO_UINT16(randy);
          aExtendedAddress[idx++] = HI_UINT16(randy);
        }
        // Next-to-MSB identifies ZigBee device type.
#if ZG_BUILD_COORDINATOR_TYPE && !ZG_BUILD_JOINING_TYPE
        aExtendedAddress[idx++] = 0x10;
#elif ZG_BUILD_RTRONLY_TYPE
        aExtendedAddress[idx++] = 0x20;
#else
      aExtendedAddress[idx++] = 0x30;
#endif
      // MSB has historical signficance.
        aExtendedAddress[idx] = 0xF8;
      }

      // Restore flash control to previous state
      HWREG(FLASH_CTRL_FCTL) = fctl;
    }

    if (writeNV)
    {
      (void)osal_nv_write(ZCD_NV_EXTADDR, 0, Z_EXTADDR_LEN, aExtendedAddress);
    }
  }

  // Set the MAC PIB extended address according to results from above.
  (void)ZMacSetReq(MAC_EXTENDED_ADDRESS, aExtendedAddress);
}

Part Number:WL1807MOD

We were looking through the WL1807MOD documentation, such as processors.wiki.ti.com/.../WL18xx, still not sure: can we use it with some third party MCUs, such as STM32F?  Is there an API over SDIO, SDMMC etc to access its features? Any C code examples how to do it?

It would be very helpful for us, system designers,  if such information would be easily available at first pages of module data sheets, as the cost of software development these days makes an essential part of the overall system cost.

Thanks!

Part Number:TUSB4041I

Hi,

One of our big customer HITACHI requested schematic review.

Please help us with there's any problem on their schematic.

Due to HITACHI's internal security procedure problem, it is difficult to export the schematic, so we got the sch image file as below.

thanks,

TS

Part Number:AM5728

Tool/software: Linux

Hi Champs,

I used a h.264 sample file in a processor linux sdk and executed a GStreamer pipleline as following on am572x evm. The pipeline only decode the sample file, and then encode.
The size of the generated file is 41.7MB. It's so bigger than the original one, 1.8MB.
Is there anything wrong in the pipeline?

gst-launch-1.0 --gst-debug=1 -v filesrc location=/usr/share/ti/video/TearOfSteel-Short-720x420.264 num-buffers=600
! queue \
! h264parse \
! ducatih264dec \
! vpe \
! 'video/x-raw,format=(string)NV12,width=720,height=420, framerate=(fraction)30/1' \
! queue \
! ducatih264enc intra-interval=30 inter-interval=1 bitrate=1024 qpi=10 qp-max-i=40 qp-min-i=10 level=level-51 \
  rate-preset=user-defined rate-control-params-preset=rate-control-params-preset-user-defined rate-control-algo=0 \
! h264parse \
! filesink location=TearOfSteel-Short-720x420_qpmaxi40.264

Regards,
j-breeze

Part Number:TLV62585

Hi,

Do you have load transient data for TLV62585? (Vin =3.3V or 5V; Vout =1.5V , Iout =3A )
My customer specs is 2.5A/us. Would like to know if this device able to meet or not?

Hope to hear from you soon
Thanks

Hi,

Customer wants to detect audio jack insertion with the following configuration.

■4pin earphone jack "TIP pin"⇒Comparator IN / Comparator OUT⇒TS3A227E DET TRIGER pin

Customer's available earphonejack is a 4 pin product.
For this reason, there is no switch for detecting jack insertion in the jack itself.

I got the following question from the customer.
・Is there a problem by connecting the earphone jack tip pin directly to the input of the comparator?
・Could you tell me the recommended comparator.
　Device image is below.
　datasheets.maximintegrated.com/.../MAX9060-MAX9064.pdf

I look forward to hearing from you.

Best Regards,
Yusuke/Japan Disty

Hi,

Customer wants to detect audio jack insertion with the following configuration.

■4pin earphone jack "TIP pin"⇒Comparator IN / Comparator OUT⇒TS3A227E DET TRIGER pin

Customer's available earphonejack is a 4 pin product.
For this reason, there is no switch for detecting jack insertion in the jack itself.

I got the following question from the customer.
・Is there a problem by connecting the earphone jack tip pin directly to the input of the comparator?
・Could you tell me the recommended comparator.
　Device image is below.
　datasheets.maximintegrated.com/.../MAX9060-MAX9064.pdf

I look forward to hearing from you.

Best Regards,
Yusuke/Japan Disty

Part Number:DRA756

Tool/software: Linux

Hi all,

My code base is SDK 3.02.00.03 and use DRA756 custom board.

We want to reduce DDR size, so only mount one 16bit DDR with 512MB size on EMIF1.

Then try to modify following portions as below.

1. u-boot/board/ti/dra7xx/evm.c

const struct emif_regs j6_emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = {

        .sdram_config_init                 = 0x61855B32,

        .sdram_config                                 = 0x61855B32,

        .sdram_config2                               = 0x08000000,

        .ref_ctrl                                           = 0x000040F1,

        .ref_ctrl_final                                  = 0x00001035,

        .sdram_tim1                                   = 0xCCCF36B3,

        .sdram_tim2                                   = 0x308F7FDA,

        .sdram_tim3                                   = 0x027F88A8,

        .read_idle_ctrl                                = 0x00050000,

        .zq_config                                        = 0x0007190B,

        .temp_alert_config                         = 0x00000000,

        .emif_ddr_phy_ctlr_1_init              = 0x0E24400A,

        .emif_ddr_phy_ctlr_1                     = 0x0E24400A,

        .emif_ddr_ext_phy_ctrl_1              = 0x10040100,

        .emif_ddr_ext_phy_ctrl_2              = 0x00910091,

        .emif_ddr_ext_phy_ctrl_3              = 0x00950095,

        .emif_ddr_ext_phy_ctrl_4              = 0x009B009B,

        .emif_ddr_ext_phy_ctrl_5              = 0x009E009E,

        .emif_rd_wr_lvl_rmp_win              = 0x00000000,

        .emif_rd_wr_lvl_rmp_ctl               = 0x00000000,

        .emif_rd_wr_lvl_ctl                        = 0x00000000,

        .emif_rd_wr_exec_thresh              = 0x00000305

};

const struct dmm_lisa_map_regs j6_lisa_map_4G_x_2_x_2 = {

        .dmm_lisa_map_0 = 0x0,

        .dmm_lisa_map_1 = 0x0,

        .dmm_lisa_map_2 = 0x0,

        .dmm_lisa_map_3 = 0x80500100,

        .is_ma_present       = 0x1

};

2. kernel/arch/arm/boot/dts/dra7-evm-030003.dts

memory {

                device_type = "memory";

                reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB */

        };

After modification, I would stock at "Starting kernel ..." Please help me to clarify following queries.

1. Anything missed to modify in uboot or kernel?

2. Does DRA756 support to mount only one bank with 16bit data bus?

Console log:

==================================================

U-Boot SPL 2016.05 (Dec 23 2017 - 22:35:46)
DRA752-GP ES2.0
MMC Device 1 not found
*** Warning - No MMC card found, using default environment

Trying to boot from MMC1
MMC Device 1 not found
*** Warning - No MMC card found, using default environment

reading u-boot.img
reading u-boot.img

U-Boot 2016.05 (Dec 23 2017 - 22:35:46 +0800)

CPU : DRA752-GP ES2.0
Board: DRA74x EVM REV
I2C: ready
DRAM: 512 MiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Warning: fastboot.board_rev: unknown board revision
GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645
part_get_info_efi: *** ERROR: Invalid GPT ***
GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645
part_get_info_efi: *** ERROR: Invalid Backup GPT ***
ERROR: cannot find partition: 'userdata'

at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size()
Warning: fastboot.userdata_size: unable to calc
Net: Could not get PHY for cpsw: addr 2
cpsw
Hit any key to stop autoboot: 0
=>
=>
=> boot_sd
J6 ...
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
4303896 bytes read in 1429 ms (2.9 MiB/s)
113619 bytes read in 64 ms (1.7 MiB/s)
Booting from mmc0 ...
Kernel image @ 0x82000000 [ 0x000000 - 0x41ac18 ]
## Flattened Device Tree blob at 88000000
Booting using the fdt blob at 0x88000000
Loading Device Tree to 8ffe1000, end 8ffffbd2 ... OK
Using machid 0xfe6 (0x82000000) from environment

Starting kernel ...

==================================================

Thanks in advance.

B.R.

OC

Part Number:CC2650

Tool/software:TI-RTOS

i have a cc2650 launchpad board, i download example from github (https://github.com/ti-simplelink/ble_examples/tree/ble_examples-2.2) , i test multi_role and throughput_example_peripheral example without modified, i use phone's bluetooth software to connect cc2650 device, however i get different result, some android phone will disconnect after some minutes when i use multi_role example, but when i use throught_example_peripheral example, android phone will not disconnect. what's wrong in multi_role example and what's different configure between this two example.

ps: multi_role example support eight devices connect at same time, however  throughput_example_peripheral example only support one deivce connect at same time

Part Number:IWR1443BOOST

Hello, TI Experts

Could you tell us how to get mmwave_training_1_6_2 from Resource Explorer?

I cannot find mmwave_training_1_6_2 in the Resource Exploler, if I select mmwave_training : 1.6.2 in Pakage Picker.

(mmwave training v1.0.2 is still shown in left column. )

Best regards,

Part Number:CC3200

Hi,

I am looking to play songs directly from the internet using Audio Booster Pack and CC3200 Launchpad. Is there any resource which can help me? 

I think I need to get some API from music site to fetch and play audio from the internet.

My current country is India.