LDC1614-Q1: Design spiral coil sensor

December 16, 2019, 12:12 am

≫ Next: TIDA-01513: Boards TIDA-01513 and TIDA-00440 availability

≪ Previous: TCA9517: TCA9517

Part Number: LDC1614-Q1

Hi team,

I have a question about how to design a spiral inductor sensor for LDC1614.

The sensor is located >150mm away from LDC1614 input through PCB trace in my design.

Q1 : Is there a guideline of how to route the PCB trace? For example, don't bent 90degree, round shape the corner...

Q2 : I use Spiral_Inductor_Designer excel spread sheet.

I would plan to use the material called AZ91D for the target metal.

https://www.dynacast.jp/az91d

Is there a parameter I should change in the excel spread sheet for Rp calculation with target?

Q3 : When given the Rp is too small for LDC1614 to drive due to limited physical condition, is there any way to increase Rp?

regards,

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TIDA-01513: Boards TIDA-01513 and TIDA-00440 availability

December 16, 2019, 12:12 am

≫ Next: RM57L843: Inquiry about M18 pin

≪ Previous: LDC1614-Q1: Design spiral coil sensor

Part Number: TIDA-01513

Greetings,

We are working on an 800V battery system for VTOL. We are interested in testing your TIDA-00440 and TIDA-01513 reference designs. Is there any chance you could lend us a sample of each of those boards or do we have to make them using the available documentary ressources?

Best regards,

Tristan CAMIO

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RM57L843: Inquiry about M18 pin

December 16, 2019, 12:13 am

≫ Next: TM4C1294NCPDT: CtiTivaWare_C_Series-2.1.4.178 wrong ASSERT in SSIAdvDataPutFrameEndNonBlocking()

≪ Previous: TIDA-01513: Boards TIDA-01513 and TIDA-00440 availability

Part Number: RM57L843

Hello

Can I use the M18 pin of RM57L843 as a GIO?

If available, ask how to use it.

best regards.

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TM4C1294NCPDT: CtiTivaWare_C_Series-2.1.4.178 wrong ASSERT in SSIAdvDataPutFrameEndNonBlocking()

December 16, 2019, 12:13 am

≫ Next: BQ25120A: Question about ship mode

≪ Previous: RM57L843: Inquiry about M18 pin

Part Number: TM4C1294NCPDT

In the comment for this function :

//*****************************************************************************
//
//! Puts a data element into the SSI transmit FIFO as the end of a frame.
//!
//! \param ui32Base specifies the SSI module base address.
//! \param ui32Data is the data to be transmitted over the SSI interface.
//!
//! This function places the supplied data into the transmit FIFO of the
//! specified SSI module, marking it as the end of a frame. After this byte is
//! transmitted by the SSI module, the FSS signal de-asserts for at least one
//! SSI clock. If there is no space in the FIFO, then this function returns a
//! zero.
//!
//! \note The upper 24 bits of \e ui32Data are discarded by the hardware.
//!
//! \note The availability of the advanced mode of SSI operation varies with
//! the Tiva part and SSI in use. Please consult the data sheet for the
//! part in use to determine whether this support is available.
//!
//! \return Returns the number of elements written to the SSI transmit FIFO.
//
//*****************************************************************************

int32_t
SSIAdvDataPutFrameEndNonBlocking(uint32_t ui32Base, uint32_t ui32Data)
{
    //
    // Check the arguments.
    //
    ASSERT(_SSIBaseValid(ui32Base));
   ASSERT((ui32Data & 0xff) == 0);
...

I think this assert if erroneous.

It should be ASSERT((ui32Data & 0xffffff00) == 0);

Best regards.

FWX.

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BQ25120A: Question about ship mode

December 16, 2019, 12:15 am

≫ Next: LAUNCHXL-CC2640R2: RTLS monitor get no data while Non-visual demo works fine

≪ Previous: TM4C1294NCPDT: CtiTivaWare_C_Series-2.1.4.178 wrong ASSERT in SSIAdvDataPutFrameEndNonBlocking()

Part Number: BQ25120A

Hi Team,

Please help to feedback below questions from customer:

First power on:

What is the defaut state of BQ25150 as battery insertion without Vin? Ship mode?
If so, how many ways to leave ship mode? Pull low MR until over Twake2, and any else?
If plugged in Vin before battery insertion, BQ25150 will enter normal mode even after Vin removed?

Enter ship mode:

We can set MR_LPRESS_ACTION to trigger HW_RESET or SHIP-MODE.

If set to MR_LPRESS_ACTION to SHIP-MODE, do we still need to set EN_SHIP_MODE=1?

There are two ways to enter ship mode by set EN_SHIP_MODE=1, right?

#1: Plug in adapter to Vin and set EN_SHIP_MODE=1, BQ25150 will enter ship mode after Vin removed.

#2: No Vin and set EN_SHIP_MODE=1, after MR pin pull low to over T_wake2, BQ25150 will enter ship mode after MR pin released.

Leave ship mode,

After pull low MR pin to over T_wake2 while BQ25150 is in ship mode, BQ25150 will leave ship mode to normal mode. Does BQ25150 still keep EN_SHIP_MODE=1 or change to default=0?

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LAUNCHXL-CC2640R2: RTLS monitor get no data while Non-visual demo works fine

December 16, 2019, 12:16 am

≫ Next: CC1352R: ZigBee software third party

≪ Previous: BQ25120A: Question about ship mode

Part Number: LAUNCHXL-CC2640R2

Hi,

I’m testing TOF with LauchXL-CC2640R2F, simplelink_cc2640r2_sdk_3_30_00_20.

But it always hang at step ‘Opening L2CAP Coc’. But it works ok with Non-Visual Demo.

I have tried the 2 methods mentioned in below link(mass erase and disable bonding in master) , the problem is still same.

https://e2e.ti.com/support/wireless-connectivity/bluetooth/f/538/p/843621/3120565

Would some one give some advice? Thanks a lot.

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CC1352R: ZigBee software third party

December 16, 2019, 12:17 am

≫ Next: AM3354: VDD_CORE abnormal ramp-up

≪ Previous: LAUNCHXL-CC2640R2: RTLS monitor get no data while Non-visual demo works fine

Part Number: CC1352R

Hi,

My customer based in France likes to work with a third party to integrate ZigBee stack and application onto CC1352.

Could you advice third parties/contacts that can be used for such purpose - preferably in France, Europe - ?

Thank you

Best regards,

Guillaume

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AM3354: VDD_CORE abnormal ramp-up

December 16, 2019, 12:20 am

≫ Next: AFE5809: low dynamic range after the demodulator

≪ Previous: CC1352R: ZigBee software third party

Part Number: AM3354

Hi Expert,

During test, we find VDD_CORE power up waveform have a drop ditch during ramp stage, after test, we found the ditch have similar time point with VDDS_RTC (1.8v).

We used RTC disable mode, RTC_KALDO_ENn is connected to VDDS_RTC(1.8V), CAP_VDD_RTC is connected to VDD_CORE(1.1v). We have some basic analysis as below:

As before VDDS_RTC is ramp up to 1.8V, the RTC_KALDO_ENn is low which means that RTC internal LDO is enabled, is it possible that RTC internal LDO source (VDDS_RTC? need your double confirmation as below question #3) have leakage current to CAP_VDD_RTC pin, then CAP_VDD_RTC/VDD_CORE have a small ramp up , and after VDDS_RTC is ramp up to 1.8V, the RTC_KALDO_ENn is high which means that RTC internal LDO is disabled, and VDDS_RTC leakage current is cut off and CAP_VDD_RTC/VDD_CORE power rail abnormal level is dropped, and then real VDD_CORE power rail ramp up, so from wave form, looks like there is ditch.

1) Is above understanding right? If not, could you help analysis the possible reason on the drop ditch. The related waveform is attached.

2) In AM335x datasheet figure 6-6 #A, it says that "If the internal RTC LDO is disabled, CAP_VDD_RTC should be sourced from an external 1.1-V power supply", here, does " an external 1.1-V power supply"mean that it MUST use other external 1.1V power supply which can not be same power rail with VDD_CORE?

3) If RTC internal LDO is enabled, the RTC power source is VDDS_RTC, right? No direct info in datasheet.

in current board, Power up sequence use this way:

Test waveform:

Abnormal VDD_Core ramp up issue

VDD_RTC 1.8v and VDD_CORE 1.1v

VDD_RTC 1.8v and VDD_CORE 1.1v ramp up waveform after AM335x removed

Two more questions regarding to other 2 RTC mode(Not to related to current issue, but it is helpful for issue analysis)

4) In RTC functionality but no RTC only mode, the internal RTC_LDO must be disabled as in hardware check list table 2, in this mode, the power up sequence only follow up figure 6-5 in datasheet which says internal RTC_LDO disabled mode. Is it right?

5) In RTC only mode, if #3 is right, then RTC internal LDO is enabled should be only used in RTC_only mode, right?

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AFE5809: low dynamic range after the demodulator

December 16, 2019, 12:25 am

≫ Next: PGA900: OWI interrupt does not occur

≪ Previous: AM3354: VDD_CORE abnormal ramp-up

Part Number: AFE5809

We want to use AFE5809 in a ultra sound application, and need the demodulator for envelope detection. I have been playing around with the AFE5809EVM / TSW1400EVM in order to get familiar with the device.

I use a 10MHz as carrier frequency and modulate it with 20KHz on channel 1. Using the demodulator example in the slou338a (User's guide), with the decimation factor M=4 and the predefined filter coefficients i can see the envelope of the signal however, the dynamic range seems to be very low, and also DC offset - as seen on the screenshot below:

I don't understand this behavior. I have set the gain to produce maximum signal after the ADC, so why is signal level so low after the demodulator? Similar behavior is also seen in the example on page 19 in the users guide.

Additionally I want to highlight an issue with the eval. kit / SW. Seems like every time I change some parameters in the demodulator via the GUI, the other settings i.e. the input termination are reset, and need to be set again by the user.

↧

PGA900: OWI interrupt does not occur

December 16, 2019, 12:28 am

≫ Next: low noise split rail supply for op amps

≪ Previous: AFE5809: low dynamic range after the demodulator

Part Number: PGA900

Hello.

This thread is a copy of previously posted but unresolved topic.

Original post is located here

Customer initiates OWI in PGA 900 according to datasheet, but no OWI-interrupt is executed.

The source code and scope of pulse generated on power supply are presented below.

OWI initialization code:

...
//***********************OWI*****************************
   SET_B(DIG_IF_CTRL, OWI_ENABLE|OWI_DEGLITCH_FILTER_10MS);        //include OWI
   DLPWR = OWI_CLK_EN;
   WriteReg(OWI_INTERRUPT_ENABLE, OWI_INT_ENABLE);
   WriteReg(OWI_INTERRUPT, OWI_INTERRUPT_ACTIVE);
WriteReg(COM_RX_INT_ENABLE,COMBUF_RXRDY_INT_ENABLE);
//***********************OWI*****************************
...
    WriteReg(IPR0, 0xC0C0C0C0);                   //enable interrupts (global)
    WriteReg(IPR1, 0xC0C0C0C0);
    WriteReg(ISER, 0xffffffff);
...

OWI interrupt handler:

void OwiInterSv(void)
{
WriteReg(OWI_INTERRUPT, OWI_INTERRUPT_ACTIVE);
SET_B(DIG_IF_CTRL, OWI_ENABLE|OWI_TRANSCEIVER_ENABLE); //the OWI transceiver on

}

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low noise split rail supply for op amps

December 16, 2019, 12:32 am

≫ Next: TPS7A30: Output voltage accuracy at Tj=-30℃~70℃

≪ Previous: PGA900: OWI interrupt does not occur

Discussion - what's the best way to deliver split rail for powering op amps +/-12V (up to +/-18V) @ 150mA from 8-17Vin?

Would need to be simple and possibly low-noise.

Thank you.

↧

TPS7A30: Output voltage accuracy at Tj=-30℃~70℃

December 16, 2019, 12:38 am

≫ Next: WEBENCH® Tools/TPS60403: TPS60403 ESD HBM/CD/MM data

≪ Previous: low noise split rail supply for op amps

Part Number: TPS7A30

Hello Support team,

Do you have any characteristic data of output voltage accuracy of TPS7A30 at Tj=-30℃~70℃ like Figure 1 and 2 in TPS7A25 datasheet? If you have, please share with us.
If not, could you let me know the accuracy at Tj=40℃ and 70℃?

Best Regards,
Hirokazu Takahashi

↧