Part Number: LMX2582
Hi,
My customer is using LMX2582 and find the pin 20 output voltage level is 1.4V when configured as lock, and the power supply is 3.3V.
Could you please help me solve this issue? Thanks.
Register Configuration：
//F_clock
u32 F_clock = 4915200;//kHz
u16 Fpd=200;//MHz
// u32 Fvco=F_clock*2;//kHz
u32 Fvco=F_clock;//kHz
u32 PLL_N;
u32 PLL_NUM;
u16 PLL_NUM_h,PLL_NUM_l;
PLL_N = Fvco/Fpd/1000/2;
PLL_NUM = (Fvco-PLL_N*2*Fpd*1000)*10/Fpd/2;
PLL_NUM_l = PLL_NUM;
PLL_NUM_h = (PLL_NUM>>16);
SPI_Write_2582_CLK_RX(0x00,0x231E);//3. Soft reset the device (write R0[1] = 1)
SPI_Write_2582_CLK_RX(0x00,0x231C);//3. Program RESET = 0 to remove reset.
//4. Program registers as shown in the register map in REVERSE order from highest to lowest.
SPI_Write_2582_CLK_RX(0x40,0x0077);
SPI_Write_2582_CLK_RX(0x3E,0x0000);
// SPI_Write_2582_CLK_RX(0x3D,0x0000);//LD_TYPE=0: Calibration status detect
SPI_Write_2582_CLK_RX(0x3D,0x0001);//LD_TYPE=1: vtune detect
SPI_Write_2582_CLK_RX(0x3B,0x0000);
SPI_Write_2582_CLK_RX(0x30,0x03FC);
SPI_Write_2582_CLK_RX(0x2F,0x08CF);//R47[12:11]=OUTA_MUX=1: Selects output from VCO
// SPI_Write_2582_CLK_RX(0x2E,0x3221);//R46[13:8]=OUTA_POW=50, OUTB_PD=0, R46[2:0]=MASH_ORDER=1: first order
SPI_Write_2582_CLK_RX(0x2E,0x0F21);//R46[13:8]=OUTA_POW=15, OUTB_PD=0, R46[2:0]=MASH_ORDER=1: first order
SPI_Write_2582_CLK_RX(0x2D,PLL_NUM_l);//PLL_NUM[15:0]
SPI_Write_2582_CLK_RX(0x2C,PLL_NUM_h);//PLL_NUM[31:16]
SPI_Write_2582_CLK_RX(0x2B,0x0000);
SPI_Write_2582_CLK_RX(0x2A,0x0000);
SPI_Write_2582_CLK_RX(0x29,0x2710);//PLL_DEN[15:0]=10000
SPI_Write_2582_CLK_RX(0x28,0x0000);//PLL_DEN[31:16]
SPI_Write_2582_CLK_RX(0x27,0x8104);//R39[13:8]=PFD_DLY=1=4 clock cycle delay
// SPI_Write_2582_CLK_RX(0x26,0x0036);//R38[12:1]=PLL_N
SPI_Write_2582_CLK_RX(0x26,PLL_N*2);//R38[12:1]=PLL_N
SPI_Write_2582_CLK_RX(0x25,0x4000);//R37[12]=PLL_N_PRE,1: divide-by-4; 0: divide-by-2
SPI_Write_2582_CLK_RX(0x24,0x0821);//R36=CHDIV
SPI_Write_2582_CLK_RX(0x23,0x109B);//R35=CHDIV=16,CHDIV_SEG1=2,CHDIV_SEG2=8
SPI_Write_2582_CLK_RX(0x22,0xC3EA);
SPI_Write_2582_CLK_RX(0x21,0x2A0A);
SPI_Write_2582_CLK_RX(0x20,0x210A);
SPI_Write_2582_CLK_RX(0x1F,0x0401);
SPI_Write_2582_CLK_RX(0x1E,0x0034);
SPI_Write_2582_CLK_RX(0x1D,0x0084);
SPI_Write_2582_CLK_RX(0x1C,0x2924);
SPI_Write_2582_CLK_RX(0x19,0x0000);
SPI_Write_2582_CLK_RX(0x18,0x0509);
SPI_Write_2582_CLK_RX(0x17,0x8842);
SPI_Write_2582_CLK_RX(0x16,0x2300);
SPI_Write_2582_CLK_RX(0x14,0x012C);
SPI_Write_2582_CLK_RX(0x13,0x0965);
SPI_Write_2582_CLK_RX(0x0E,0x018C);
SPI_Write_2582_CLK_RX(0x0D,0x4000);
SPI_Write_2582_CLK_RX(0x0C,0x7001);//R12[11:0]=PLL_R_PRE=1
SPI_Write_2582_CLK_RX(0x0B,0x0018);//R11[11:4]=PLL_R=1
SPI_Write_2582_CLK_RX(0x0A,0x10D8);//R10[11:7]=MULT=1
// SPI_Write_2582_CLK_RX(0x09,0x0302);//R9[11]=OSC_2X=0,disable
SPI_Write_2582_CLK_RX(0x09,0x0B02);//R9[11]=OSC_2X=1,enable
SPI_Write_2582_CLK_RX(0x08,0x1084);
SPI_Write_2582_CLK_RX(0x07,0x28B2);
SPI_Write_2582_CLK_RX(0x04,0x1943);
SPI_Write_2582_CLK_RX(0x02,0x0500);
SPI_Write_2582_CLK_RX(0x01,0x0808);
usleep(10000);//5. Wait 10 ms.
SPI_Write_2582_CLK_RX(0x00,0x231C);//5. Frequency calibrate (write R0[3] = 1),R0[8:7]=FCAL_HPFD_ADJ=2=PFD > 150 MHz
Output frequency is 4915.2MHz, correct.
![]()
