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Compiler/RM48L952: TI & Customer OTP Region Reading

December 10, 2019, 10:45 am
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Part Number: RM48L952

Tool/software: TI C/C++ Compiler

Hello Ti,

I have two questions for the OTP on the RM48 MCU platform.

1)

The correspnding TRM points out that there are sections available where you can read the TI specific information like MCU name, revision, flash bank,its sectors, size and so on. Somehow I am not able to read the data out of this section as it is marked grey in the Memory Browser View during debugging 

Is it an errate in the TRM or is it intended to not read out the data or how can I read this simple information for further evaluation?

2)

When I take a look into the TRM, there are sections which are customer and TI specific for the OTP. When I debug the executable on the MCU (without having written anything on the OTP) and I try to access the OTP regions I see some error activities on the ESM module group 1 (FMC - correctable error: bus1 and bus2 interfaces) and ESM group 3 (FMC - uncorrectable error: bus1 and bus2 interfaces) once I try to read "customer"-specific regions. I assume it is because the OTP memory is not programmed at the moment. Thus, the corresponding ECC is not programmed and the reading from the application results into the errornous behavior as there is a mismatch with the ECC.

Is that assumption correct or why do I get these errors indicated by the ESM module when I perform simple reading on the OTP regions.

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Inquire TI solution to replace WELTREND WT7661GP

December 10, 2019, 10:46 am
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Hi Sir,

May I have your help to check if we have compatible solution can replace WELTREND WT7661GP ?

If you need datasheet, please kindly contact me via mail.

edward-chen@ti.com

Thank you.

Edward Chen

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SN74LVC1G3157: Adjust Select Threshold

December 10, 2019, 10:50 am
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Part Number: SN74LVC1G3157

Hello,

I have a question regarding the SN74LVC1G3157 analog switch. The device function is ideal for me, but I’d like to adjust the select threshold from roughly .7vcc to a fixed 4.1V. Is there a creative minimal circuit option to do this or a different similar small footprint IC?

Best,

Adam

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BQ28Z610: Master Only?

December 10, 2019, 10:56 am
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Part Number: BQ28Z610

Hello,

One of my customers is trying to talk to the BQ28z610 in their battery pack. It appears that the device is only i2x master, is that correct? Is there any way to put it into device mode?

Is there a similar device you could recommend that is a slave device?

Best,

Adam

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CC2640R2F: Service changed indication in ble stack

December 10, 2019, 10:57 am
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Part Number: CC2640R2F

Hi Im using the cc2640r2f and having some difficultly implement a feature iOS app that can perform an OAD without restarting the iOS device to clear the BLE cache. Is there a mechanism to indicate Service changed? I saw a similar thread for the BLE5 stack here: -> "e2e.ti.com/.../824508

I tried implementing this change but its not apples for apples. Im using cc2640r2f_sdk_3.20.00.21. 

Does this sdl also have the bug? is there a work around? 

Thanks in advance, 

Jon

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CCS/MSP430FR2032: CCS/MSP430FR2032:

December 10, 2019, 10:59 am
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Part Number: MSP430FR2032

Tool/software: Code Composer Studio

what is primary reference and secondary reference in DAC

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CCS/TIDEP-01017: Boot TDA2 via CCS and Step through Code

December 10, 2019, 11:03 am
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Part Number: TIDEP-01017

Tool/software: Code Composer Studio

Hi,

I am trying to boot up TIDEP-01017 TDA2 via CCS and am following the steps provided in the Application Report SPRAC17B. I set the boot mode on SW4 to 6'b000000 as per the Technical Reference Manual SPRUI29F

The tda2xx_cascade_bios_radar build that is provided in the processor sdk package does not use A15 has the host processor, so I bypassed it in the ccxml launch file. When I try to connect Cortex_M4_IPU1_C0, I get an error as below:

Error connecting to the target:
(Error -1170 @ 0x0)
Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK).

However, when I add back A15 as the host processor and connect to it first, then enable all cores from Scripts > TDA2xx_MULTICORE_Initialization > TDA2xx_MULTICORE_EnableAllCores and then connect to Cortex_M4_IPU1_C0, it is able to connect.

I subsequently connect to all the remaining processors and load corresponding binaries. However, since A15 binary was not compiled, I do not load it. Is this ok?

Also, once this is done I hit Resume on each of the processors and I see the below prints on the console:

[Cortex_M4_IPU1_C1]
MAC Port 0 Address:
    b4-52-a9-63-38-7a

MAC Port 1 Address:
    b4-52-a9-63-38-7b
Network Added: If-1:192.168.1.200
Service Status: Telnet   : Enabled  :          : 000
[Cortex_M4_IPU1_C0]  IPU1-0 Remote Log Shared Memory @ 0xbfb200a0
 IPU1-1 Remote Log Shared Memory @ 0xbfb2e8a0
 HOST Remote Log Shared Memory @ 0xbfb310a0
 DSP1 Remote Log Shared Memory @ 0xbfb360a0
 DSP2 Remote Log Shared Memory @ 0xbfb388a0
 EVE1 Remote Log Shared Memory @ 0xbfb3b0a0
 EVE2 Remote Log Shared Memory @ 0xbfb3d8a0
 EVE3 Remote Log Shared Memory @ 0xbfb400a0
 EVE4 Remote Log Shared Memory @ 0xbfb428a0
 IPU2 Remote Log Shared Memory @ 0xbfb450a0

However, I still do not see the TDA2 boot up via UART terminal. Is there any step I am missing? How do I step through the code once boot up is done?

Thanks,

Siddharth

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THS3061: Dual version alternative to THS3061DGNRG4 ?

December 10, 2019, 11:08 am
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Part Number: THS3061

Hello Team,

Is there a dual alternative to ther THS3061DGNRG4  amp? I see there is the  THS3062 but its marked for NRND so im hoping there is another amplifier family that i can consider.

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BQ25713: REGN capacitor

December 10, 2019, 11:15 am
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Part Number: BQ25713

All,

On the BQ27513 REGN pin the recommended capacitor is between 2.3 - 3.3 uF; if I use a 4.7uF will there be any stability issues?  Any other issues?

Thanks,

Regards,

Joe

 

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AM3352: Need the analog to digital converter DC input resistance specification

December 10, 2019, 11:17 am
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Part Number: AM3352

The AM3352 8-channel A/D has an input impedance specification that is defined as a function of frequency.  Snip from the data sheet attached (page 97).  Using that formula for example, at 100 Hz input frequency, the input Z comes out to over 150 Meg ohms.  Implied by the formula is that at 0 Hz (DC) the input Z is infinite.  Is this correct?  Is there a DC leakage current specification?

Thanks -

M. Pettus

CTO, Vubiq Networks

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BQ25713: /PROCHOT pull up

December 10, 2019, 11:22 am
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Part Number: BQ25713

All,

In the BQ27513 datasheet application drawing figure 46, the below is shown; were does the 1.05V specification come from.

 

Thanks,

Regards,

Joe

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MSP430G2553: ADC input pin is not tristate

December 10, 2019, 11:23 am
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Part Number: MSP430G2553

I am using MSP430G2553 to sample the analog input and process it further. When I checked voltage at ADC input pin A0 it was arround 1.4 V  even when input was not connected. Then I tried to pull down it externally then it fall to 1.1 V  instead of 0 V. I need tristate input of ADC as I am giving input from precision rectifer ,due to this I was not able to detect input level less than 1.4 V.  Here is its code.

#include <msp430g2553.h>
int PWM(int a);
int main(void) {
float err = 0,ref = 122, Vadc = 0, Kp  = 1, Ki = 0.4, P = 0, I = 0, PImax = 1000, PI = 0;

    WDTCTL = WDTPW + WDTHOLD;

            ADC10CTL0 = SREF_1 + REFON + REF2_5V + ADC10ON+ MSC;
            ADC10CTL1 = CONSEQ_2; //repeated single conversion
            ADC10AE0 = INCH_0;
            ADC10CTL0 |= ENC + ADC10SC;
            Vadc = ADC10MEM;


                while(1)
                {
                    Vadc = ADC10MEM;
                    err = ref - Vadc;
                    P = Kp * err;


                    if (PI + Ki * err < PImax)
                        I = I + Ki * err;

                    PI = P + I;

                    if(PI > PImax)
                        PI = PImax;
                   PWM(PI);
                }

            }

     int  PWM(int a)   {
            P1DIR |= BIT2;
            P1SEL |= BIT2;
            TA0CCR0 = 1000; //Set the period in the Timer A0 Capture/Compare 0 register to 1000 us.
            TA0CCTL1 = OUTMOD_7;
            TA0CCR1 = a; //The period in microseconds that the power is ON. It's half the time, which translates to a 50% duty cycle.
            TA0CTL = TASSEL_2 + MC_1; //TASSEL_2 selects SMCLK as the clock source, and MC_1 tells it to count up to the value in TA0CCR0.
     return 0;
}

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CCS/F28M35H52C: JTAG load program error

December 10, 2019, 11:26 am
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Part Number: F28M35H52C

Tool/software: Code Composer Studio

Hello,

   I have a customized working processor board based TI F28M35H52C DSP with TI XDS200 USB emulator.  My test connection is succeeded.  However, when I tried to flash program the chip, it gives error message for both cores as:

   Load program error, Target must be connected before call the the function.

   Cortex_M3_0: Trouble Halting Target CPU: (Error -1266 @ 0x0) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 8.2.0.00004) 

   Cortex_M3_0: GEL: Target must be connected before calling the function

   I checked my JTAG schematic with the JTAG circuit of TI docking station.  It notices that my JTAG pin 2 TRSIn having 2.5 KOhm resistor to GND and pin 13/14 EM0/EM1 having 2.5 KOhm resistor to pull up to 3.3V but your circuit has no pull up and pull down resistors.  I am not sure the pin 2 is connected correctly or not.  In addition, my board suppose working previously.

   Thank you for your help!

   Yong

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CCS/UNIFLASH: Reset locked cc13xx/cc26xx via Uniflash

December 10, 2019, 11:26 am
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Part Number: UNIFLASH

Tool/software: Code Composer Studio

Is it possible to reset a cc13xx/cc26xx device through Uniflash if the chip debug interface is locked?

In my use-case we have Uniflash as part of an automated testing-rig which

1. Mass erase

2. Flash with new image (which locks chip)

3. Reset and start logging UART

If the chip is locked, the typical reset-commands fails with the "expected" error "(...)make sure your device is unlocked". Any way around this? Other alternatives for the use-case?

Tested using uniflash 5.0.0, linux, xds100v3.

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DRV8305-Q1: Motor drivers forum

December 10, 2019, 11:28 am
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Part Number: DRV8305-Q1

Hello All,

I want to use DRV8305 for our BLDC/PMSM motor driver. How can I calculate if DRV8305 need heat sink or not? Our motor is about 70 watts (24 V and 30 A). I can calculate it with:

But I am not sure how to decide the power dissipation Watts. How can I estimate the heat dissipation for our motor to decide if we need heat sink of not for DRV8305 or other MOSFET power modules?

Thanks,

Hao

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CCS/TM4C129ENCPDT: CCS 9.2 dies at launch on Win7/64

December 10, 2019, 11:29 am
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Part Number: TM4C129ENCPDT

Tool/software: Code Composer Studio

Hola,

Brand new install here on a Windows 7/64 machine, not an update/upgrade. I installed the support for the TM4C devices only, and I added support for the Segger J-LInk.

Every time it starts up I get a message box: "Open File - Security Warning -- The publisher could not be verified, are you sure you want to run this software?"

The first time I chose "run" I got asked where to put my Workspace. And that failed, too, insufficient privileges for my own home directory's My Documents or other folders. I was eventually able to put the workspace on a network share.

Now every time I run CCS, the splash screen shows up for a few seconds, then vanishes and there's nothing left. No evidence that it's running in the Task Manager.

Any ideas, short of uninstalling/reinstalling?

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DS80PCI102: de-emphasis for Gen 3

December 10, 2019, 11:33 am
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Part Number: DS80PCI102

In section 8.4.1 of the datasheet on Pin Control Modes, can you provide additional details on the reason for removing the de-emphasis when enforced to GEN3 (tie 20k to GND) as opposed to FLOAT (AUTO rate) where de-emphasis in Gen3 is supported?

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ADC12DJ3200: keeping the ADC in power down at Power Up

December 10, 2019, 11:35 am
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Part Number: ADC12DJ3200

Hi,

I want to keep ADC12DJ3200 in power down mode by default at power up by pulling up the PD pin high.

PD pin will be connected to FPGA and then FPGA will make the PD pin low when it wants the data from ADC.

But in datasheet it is written that power down using PD should not be used for long time.

So can we use PD pin for power down ADC at power up or is there any other method to keep ADC in power down or in reset mode?

Actually we will be using a custom GUI for our project and we want data from ADC to FPGA only when user selects the option in GUI.

So is there any method other than using PD, to stop ADC from sending digital data to FPGA?

An early response will be highly appreciated.

Thanks,

Lalit  

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BQ25713: compensation passives

December 10, 2019, 11:39 am
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Part Number: BQ25713

All,

For the BQ27513 customer would like more information on the compensation passives?  Not much in the datasheet and only the values in the EVM guide.

 Thanks,

Regards,

Joe

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TPS62840: Release date and samples for TPS62842DGR?

December 10, 2019, 11:43 am
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Part Number: TPS62840

Hi there,

can someone confirm the availability of the TPS62842DGR? 

I need to generate a 3.5V rail and the part looks perfect... 

Mickael 

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