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BQ27426: Chemical ID writing at start up

November 5, 2019, 12:13 am
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Part Number: BQ27426

Dear Sir,

When charging the overdischarge battery and starting up the GG IC(BQ27426), the Chemical ID may or may not be written.

(1) Possible to write: When chrging "the battery discharged with large current (800mA)" until overdischarge voltage (2.8V).
(2) Not possible to write: When chrging "the battery discharged with small current (80mA)" until overdischarge voltage (2.8V).

The battery voltage for both ① and ② is 3.6V when writing.
If you cannot write in ②, it will be as follows.

・Subcommand CHEM_ID (0x0008) fails
・If you put a wait for 1 second after failure, you will succeed for the second time.

What can be considered as the cause of not possible to write as above ②?

Best regards,
Chiaki Endo

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SN65176B: The value of A,Bpin's voltage when 0V was input to RE, DE, and D pins(Vcc=5V)

November 5, 2019, 12:13 am
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Part Number: SN65176B

Dear all,

I would like to ask the following questions.

As shown below, when 0V was input to RE, DE, and D pins(Vcc=5V), the output of A and B was 1.4V. I want to answer the following questions

1. I think that the current of 58μA flows out from the A and B pins, and it flows to GND through the pull-down resistor, so that 1.4V is output.

The data sheet includes the following.

In this description, only the voltage input to the A and B pins is 12V and -7V, but how much current flows when the input voltage is 1.4V?

2. I heard from the customer that the voltage on pins A and B was measured under the same conditions as above, and that there was a difference of several commas.

I think that this phenomenon is because there is a difference in the current flowing out of A and B, is it correct?

Also, if there is a difference, how much current difference is there?

Best Regards,

Y.Ottey

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LP8860-Q1: How to direct control with PWM signal

November 5, 2019, 12:17 am
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Part Number: LP8860-Q1

When external controller use PWM signal to adjust dimming, can the PWM duty cycle set to 0 if we want the panel to be dark?

Or we only can use I2C/SPI to adjust dimming to be dark?

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BQ76PL455A-Q1: BQ76PL455A-Q1， device fault， MASK_DEV register failed

November 5, 2019, 12:20 am
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Part Number: BQ76PL455A-Q1

Dears:

we have a 14-packs battery group with BQ76PL455A-Q1，register of MASK_DEV was enabled, but device fault still occurs. why is this?

Best Regards!

Jun

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TMS320F28377D: Assembler Help: Reading data on a 32-bit PORT

November 5, 2019, 12:22 am
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Part Number: TMS320F28377D

Hi Guys, The F28377D LQFP has 3 32bit data ports. I'm using one port as a 32bit databus and the IN instruction only reads the lower 16bits and ignore the upper 16bits.

How do I read the full 32bit port?

The code I'm using is:

IN AL, *(PORTA) ; This works ok but only reads the lower 16bits.

IN ACC,*(PORTA); This does not work. The ACC is a 32bit register and the assembler will not allow it.

Any ideas?

Peter

 

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DLPC900: USB PID

November 5, 2019, 12:22 am
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Part Number: DLPC900

DLPC900 has a USB module. I would like to modify a default PID because 1 PC controls multiple DLPC900s. Can I do It?

Regards,
Uryyy

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TPD1E10B06: Test case waveform

November 5, 2019, 12:23 am
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Part Number: TPD1E10B06

Dear all：

        Does TPD1E10B06 have a test example waveform？

Thank you！

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UCD74120: Voltage sensing circuit doubt

November 5, 2019, 12:31 am
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Part Number: UCD74120

Hi,


I am using UCD74120 with UCD9244 (smart reflex interface) to power the variable core voltage (CVDD) of TMS3206678 multicore DSP.
The CVDD rail draws around 15A current.

I am trying to follow the EVMK2HX_ K2H EVM since it contains UCD74120. Regarding the schematic file (K2H_K2EVM-HK_SCH_A104_Rev4_0), I have the following doubts:

[1] On page #40, there is a 1k resistor (R77) in between CVDD rail and ground. What is the purpose of this resistor? In sluu490 design guide(Using the UCD92xx Digital POL Controller - pg #23), it is mentioned that "To ensure that the PCB layout tools properly feed the voltage sense back to the controller as a differential pair, a small resistor can be placed near the decoupling capacitor." What does this mean? Is this resistor mandatory?

[2] On same page #40, there are two 10 ohms series resistors (R614, R615) in series to the EAp and EAn lines.

(a) What is the purpose of these resistors? In sluu490 design guide (pg #24), it is written that two 10 ohms resistors are used when the load is situated on a different board. Are they talking about the same resistors that I am mentioning? Are they mandatory in my case where the controller and load are on the same board?

(b) We are routing EAp and EAn lines as differential signal. However, there is no signal present in EAn. In addition, if there is a ground plane below the signal layer where EAp and EAn are routed, the EAp will reference the ground plane below and not the EAn line. What is the purpose of EAn line?

[3] I was not able to find WebBench Design tool for the design of UCD74120. Is there any tool that can help me design with UCD74120?


Thanks and regards,
Binayak

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LM5034: Flyback topology no-load issue (PMOS temp icrease)

November 5, 2019, 12:37 am
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Part Number: LM5034

Hi all,

My customer use LM5034 for flyback application. And there has a issue in it.(Schematic is showing below.)

PMOS1(Q11) & PMOS2(Q12) (temperature increase when no load)

yellow:Q11 red:Q12 blue:load current

yellow:Q11 red:Q1/Q2 blue:load current

schematic:

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DRV5013-Q1: Output under VCC=2.5V

November 5, 2019, 12:47 am
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Part Number: DRV5013-Q1

Dear, Sir.

My customer is asking about the output when VCC is under 2.5V.

VCC range is defined from 2.7V to 38V.

According the datasheet description, I am gussing it would be Hi-Z?

Sorry to ask about this kind of matter. I would like to double-confirm.

Please give your advice.

Best Regards,

H. Sakai

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TMP100: TMP100 MTBF ISSUE

November 5, 2019, 12:51 am
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Part Number: TMP100

My client asked if the TMP100 has had MIL-HDBK-217F specifications such as accessories, Thanks.(Please visit the site to view this file)

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CCS: CCS V6.2 Installation method during anti virus program still running

November 5, 2019, 12:51 am
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Tool/software: Code Composer Studio

Hello.I'm using CCsv.6

I was CCS v6 and v3 for a past 10years. but last month my company PC changed to new one. So, I want to install again the CCS v6

but not able to install the CCS V6 due to anti virus program.

due to my company policy, im not able to turned of the anti virus program.

Can i install the CCS v6 without turn off the anti virus program?

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TMDSEVM572X: PCIe. How get EP Memory Space address?

November 5, 2019, 12:52 am
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Part Number: TMDSEVM572X

Hello.
I have evaluation module www.ti.com/.../TMDSEVM572X.
Also I have a board with FPGA. FPGA implements  PCIe device.
I run TIRTOS on DSP using CCS.
My program based on pcie_sample.c
I want to use evm as RC and board with FPGA as EP.
My goal is light LED on board with FPGA.
BAR0 on FPGA side must contain base address of Memory Space on EP.
LED register address shifted at begin of Memory Space at 20 (decimal)
After link up, I tune remote BAR:
barCfg.location = pcie_LOCATION_REMOTE;
barCfg.mode     = pcie_EP_MODE;
barCfg.base     = PCIE_OB_LO_ADDR_RC;
barCfg.prefetch = pcie_BAR_NON_PREF;
barCfg.type     = pcie_BAR_TYPE32;
barCfg.memSpace = pcie_BAR_MEM_MEM;
barCfg.idx      = 0;

if ((retVal = Pcie_cfgBar(handle, &barCfg)) != pcie_RET_OK)
{
Console_printf ("Failed to configure remote BAR0!\n");
exit(1);
}
Where PCIE_OB_LO_ADDR_RC = 0x7000_0000
After this I see this memory (I use CCS):
0x20001000    00051172    00180000    06808001    00000000
0x20001010    70000000    00000000    00000000    00000000
0x20001020    00000000    00000000    00000000    00051172
0x20001030    00000000    00000050    00000000    00000100
0x20001040    00000000    02006160    00000000    00000000

On 0x20001000 you can see 0x00051172. There are board DID and VID.
If I do not execute code above, on address 0x2000_1010 I see 0x0000_0000
After that I look at address 0x70000014 (equal PCIE_OB_LO_ADDR_RC + 20(dec)) and I see 0x0000_0000. I try to write 0xFFFF_FFFF at address 0x70000014 using CSS Memory Browser but I cannot. Value 0xFFFF_FFFF resets to 0x0000_0000.
 I booted Linux on ARM and viewed system log:
[    0.626104] dra7-pcie 51000000.pcie: Linked as a consumer to phy-4a094000.pciephy.1
[    0.626472] OF: PCI: host bridge /ocp/axi@0/pcie@51000000 ranges:
[    0.626508] OF: PCI:    IO 0x20003000..0x20012fff -> 0x00000000
[    0.626530] OF: PCI:   MEM 0x20013000..0x2fffffff -> 0x20013000
[    0.726611] dra7-pcie 51000000.pcie: link up
[    0.726742] dra7-pcie 51000000.pcie: PCI host bridge to bus 0000:00
[    0.726756] pci_bus 0000:00: root bus resource [bus 00-ff]
[    0.726767] pci_bus 0000:00: root bus resource [io  0x0000-0xffff]
[    0.726778] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff]
[    0.727088] PCI: bus0: Fast back to back transfers disabled
[    0.728099] PCI: bus1: Fast back to back transfers disabled
[    0.728138] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff 64bit]
[    0.728157] pci 0000:00:00.0: BAR 8: assigned [mem 0x20200000-0x208fffff]
[    0.728172] pci 0000:01:00.0: BAR 2: assigned [mem 0x20400000-0x207fffff]
[    0.728197] pci 0000:01:00.0: BAR 1: assigned [mem 0x20200000-0x203fffff]
[    0.728221] pci 0000:01:00.0: BAR 0: assigned [mem 0x20800000-0x208fffff]
[    0.728245] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
[    0.728257] pci 0000:00:00.0:   bridge window [mem 0x20200000-0x208fffff]


I tried to set PCIE_OB_LO_ADDR_RC to 0x2080_0000 (and also 0x2001_3000). In CSS Memory Browser at 0x2080_0000 (and also 0x2001_3000) and near  I found only 0xFFFF_FFFF.
What I am doing wrong?
What additional actions should I do?
Give me some advice, please.

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TPS61165: TPS61165

November 5, 2019, 12:53 am
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Part Number: TPS61165

Hi ,

I would like to find TI LED driver solution for my design.

The conditions as below,

1. Vin = 13.5V

2. Vout =26V

3. I_LED = 600mA

Is TPS61165 a suitable solution for the design?

LED strings as attaced.

Thanks!

Chin

(Please visit the site to view this file)

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ADS1147: Can ADS1147 support 4 independent single end input

November 5, 2019, 12:58 am
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Part Number: ADS1147

Hi Team,

 

From datasheet I found that positive/negative input of ADS1147 must be IN1~IN4, thus I doubt that this device can`t support 4 independent single end input, because we need to use one of the input to be bias for negative input.

Could you help to confirm it?

Thanks very much.

 

Regards, Sunny

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Power Source

November 5, 2019, 12:59 am
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I want to build a AC power source of 220v , 25 Khz.and 100Watt. Can you please suggest me the design? 

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CC1310: External Regulator mode of CC1310

November 5, 2019, 12:59 am
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Part Number: CC1310

Hi, 

if the CC1310 supports the 1.8V regulator mode as CC2640R2F?

if yes, if the Max TX power is impacted?  I can only see the max tx power vs. VDDs down to 2.1V.  

PS. customer uses 915MHz. 

BR. Albin

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TPS2H160-Q1: Alternative solution choose

November 5, 2019, 1:00 am
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Part Number: TPS2H160-Q1

Hi all,

I would like to find the alternative solution of BTS5231-2GS/BTS5242-2L.

For BTS5231-2GS, I found the the TPS2H160-Q1 has similar function. Do we have more appropriate device could replace?

For BTS5242-2L, any recommendation to replace? 

Thank you so much.

Roy

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BQ76PL455A-Q1：BQ76PL455A-Q1, limit of cells number

November 5, 2019, 1:02 am
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Part Number: BQ76PL455A-Q1

Dears:

there are some questions about BQ76PL455A-Q1.
1, How many batteries can BQ76PL455A-Q1 support in series,
2, Daisy-Chain Communication sopports up to 16 devices, if the number of devices more than 16, what type of communication can be adopted.

Best Regards!

Jun

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TMS320F28379D: The POSCNT is counting an incorrect value.

November 5, 2019, 1:03 am
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Part Number: TMS320F28379D

Dear All, 

I have configured GPIO50, GPIO51, and GPIO53 for eQEP1 module, but as you can see in screenshot, QPOSCNT is not reading the correct value. What could be the wrong?

GPIO settings are as per below. I am using QEP macro and SPEED_FR macro for theta and speed calculation. 

    EALLOW;


     GpioCtrlRegs.GPBGMUX2.bit.GPIO50 = 0;
     GpioCtrlRegs.GPBGMUX2.bit.GPIO51 = 0;
     GpioCtrlRegs.GPBGMUX2.bit.GPIO53 = 0;

     GpioCtrlRegs.GPBMUX2.bit.GPIO50 = 1;    // Configure GPIO20 as EQEP1A
     GpioCtrlRegs.GPBMUX2.bit.GPIO51 = 1;    // Configure GPIO21 as EQEP1B
     GpioCtrlRegs.GPBMUX2.bit.GPIO52 = 1;    // Configure GPIO22 as EQEP1S
     GpioCtrlRegs.GPBMUX2.bit.GPIO53 = 1;    // Configure GPIO23 as EQEP1I


     GpioCtrlRegs.GPBDIR.bit.GPIO50=0;
     GpioCtrlRegs.GPBDIR.bit.GPIO51=0;
     GpioCtrlRegs.GPBDIR.bit.GPIO52=0;
     GpioCtrlRegs.GPBDIR.bit.GPIO53=0;

     GpioCtrlRegs.GPBPUD.bit.GPIO50 = 1;    // Disable pull-up on GPIO20 (EQEP1A)
     GpioCtrlRegs.GPBPUD.bit.GPIO51 = 1;    // Disable pull-up on GPIO21 (EQEP1B)
     GpioCtrlRegs.GPBPUD.bit.GPIO52 = 1;    // Disable pull-up on GPIO22 (EQEP1S)
     GpioCtrlRegs.GPBPUD.bit.GPIO53 = 1;    // Disable pull-up on GPIO23 (EQEP1I)

     // Synchronize inputs to SYSCLK
     // Synchronization can be enabled or disabled by the user.
     // Comment out other unwanted lines.
     //
     GpioCtrlRegs.GPBQSEL2.bit.GPIO50 = 0;   // Sync GPIO20 to SYSCLK  (EQEP1A)
     GpioCtrlRegs.GPBQSEL2.bit.GPIO51 = 0;   // Sync GPIO21 to SYSCLK  (EQEP1B)
     GpioCtrlRegs.GPBQSEL2.bit.GPIO52 = 0;   // Sync GPIO22 to SYSCLK  (EQEP1S)
     GpioCtrlRegs.GPBQSEL2.bit.GPIO53 = 0;   // Sync GPIO23 to SYSCLK  (EQEP1I)

    EDIS;

Note : The GPIO 50,51,53 are accessible unlike Launchpad. I have used the same code and works well, but with GPIO 20,21 and 23.
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