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MSP430FR2355: Can't get NMI to trigger using the MSP430FR2355 LaunchPad board

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Part Number: MSP430FR2355

I'm trying to invoke the bootloader (BSL) via the falling edge of a 2 millisecond negative pulse applied on the RST~ pin.

The code reconfigures the RST~ pin as NMI. But then when I apply the RST~ pulse, the NMI interrupt handler does not run.

What is missing in the code that would prevent the NMI handler from running?

#include <msp430fr2355.h>

typedef void (*FuncPtr)(void);

void main(void) {
    WDTCTL = WDTPW | WDTHOLD;               // Stop watchdog timer
    PM5CTL0 &= ~LOCKLPM5;                   // Disable the GPIO power-on default high-impedance mode
                                            // to activate previously configured port settings
    P1DIR |= 0x03;                          // Set P1.0, P1.1 to output direction
    P1OUT  = 0x03;                          // Turn on the red LED
    P6DIR |= (1<<6);                        // Set P6.6 to output direction (green LED)
    P6OUT |= (1<<6);                        // Turn on the green LED

    // NMI interrupt triggers on falling edge of RST~/NMI pin
    SFRRPCR |= SYSNMIIES__FALLING;
    // Configure RST~/NMI pin as NMI
    SFRRPCR |= SYSNMI__NMI_L;       // RST~/NMI

    for(;;)
    {
        volatile unsigned int i;            // volatile to prevent optimization

        P1OUT ^= 0x01;                      // Toggle P1.0 using exclusive-OR
        P6OUT ^= (1<<6);                    // Toggle P6.6 using exclusive-OR

        i = 100000;                         // SW Delay

        do
        {
            i--;
        } while(i != 0);
    }
}


/*****************************************************************************
 Function:      NMI interrupt service routine

 Description:

 Dependency:    None

 *****************************************************************************/
#pragma vector=UNMI_VECTOR
__interrupt void UNMI_ISR(void)
{
    volatile unsigned int i;

    // Clear all pending user NMI flags
    SYSUNIV = 0;

    // Enable FRAM program memory writing
    SYSCFG0 &= ~PFWP_0;

    // Disable global interrupts
    __bic_SR_register(GIE);

    // Disable NMI interrupt
    SFRIE1 &= ~NMIIE__ENABLE;

    P1OUT |= 0x01;      // Turn on the red LED
    P6OUT &= !(1<<6);   // Turn off the green LED
    for(i=10000; i!=0; i--);    // Delay

    P1OUT &= !0x01;     // Turn off the red LED
    P6OUT |= (1<<6);    // Turn on the green LED
    for(i=100000; i!=0; i--);   // Delay

    // Invoke the BSL bootloader (never returns)
    // Setting the program counter to the memory location 0x1000 starts the BSL.
    // The stack is always reset, and RAM is cleared.
    // It should be noted that the GIE bit is not disabled, so this should be done by the calling
    // application if interrupts are not desired and appropriately returned from "Return to BSL" if they are used.
    // Because the stack is reset, the BSL warm start entry point is called as a C function.
    FuncPtr fpBsl=(FuncPtr)0x1000;
    fpBsl();
}

 

//***************************************************************************************//  MSP430 Blink the LED Demo - Software Toggle P1.0////  Description; Toggle P1.0 by xor'ing P1.0 inside of a software loop.//  ACLK = n/a, MCLK = SMCLK = default DCO////                MSP430x5xx//             -----------------//         /|\|              XIN|-//          | |                 |//          --|RST          XOUT|-//            |                 |//            |             P1.0|-->LED////  Texas Instruments, Inc//  July 2013//***************************************************************************************
#include <msp430fr2355.h>
typedef void (*FuncPtr)(void);
void main(void) {    WDTCTL = WDTPW | WDTHOLD;               // Stop watchdog timer    PM5CTL0 &= ~LOCKLPM5;                   // Disable the GPIO power-on default high-impedance mode                                            // to activate previously configured port settings    P1DIR |= 0x03;                          // Set P1.0, P1.1 to output direction    P1OUT  = 0x03;                          // Turn on the red LED    P6DIR |= (1<<6);                        // Set P6.6 to output direction (green LED)    P6OUT |= (1<<6);                        // Turn on the green LED
    // NMI interrupt triggers on falling edge of RST~/NMI pin    SFRRPCR |= SYSNMIIES__FALLING;    // Configure RST~/NMI pin as NMI    SFRRPCR |= SYSNMI__NMI_L;       // RST~/NMI
    for(;;)    {        volatile unsigned int i;            // volatile to prevent optimization
        P1OUT ^= 0x01;                      // Toggle P1.0 using exclusive-OR        P6OUT ^= (1<<6);                    // Toggle P6.6 using exclusive-OR
        i = 100000;                         // SW Delay
        do        {            i--;        } while(i != 0);    }}

/***************************************************************************** Function:      NMI interrupt service routine
 Description:
 Dependency:    None
 *****************************************************************************/#pragma vector=UNMI_VECTOR__interrupt void UNMI_ISR(void){    volatile unsigned int i;
    // Clear all pending user NMI flags    SYSUNIV = 0;
    // Enable FRAM program memory writing    SYSCFG0 &= ~PFWP_0;
    // Disable global interrupts    __bic_SR_register(GIE);
    // Disable NMI interrupt    SFRIE1 &= ~NMIIE__ENABLE;
    P1OUT |= 0x01;      // Turn on the red LED    P6OUT &= !(1<<6);   // Turn off the green LED    for(i=10000; i!=0; i--);    // Delay
    P1OUT &= !0x01;     // Turn off the red LED    P6OUT |= (1<<6);    // Turn on the green LED    for(i=100000; i!=0; i--);   // Delay
    // Invoke the BSL bootloader (never returns)    // Setting the program counter to the memory location 0x1000 starts the BSL.    // The stack is always reset, and RAM is cleared.    // It should be noted that the GIE bit is not disabled, so this should be done by the calling    // application if interrupts are not desired and appropriately returned from "Return to BSL" if they are used.    // Because the stack is reset, the BSL warm start entry point is called as a C function.    FuncPtr fpBsl=(FuncPtr)0x1000;    fpBsl();}


IWR6843: Placeholder - Migration Guide

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Part Number: IWR6843

Placeholder - content will be updated.

IWR6843: Placeholder - A

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Part Number: IWR6843

Placeholder - A

LM98714: CMOS mode

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Part Number: LM98714

Hello,

The datasheet says that it's 16-bit. But, for CMOS mode, is my understanding correct that it's only 8-bit? What I see in the datasheet pin functions is that cmos mode has an 8-bit parallel output.

Then, three-channel,16-bit refers to LVDS mode only?

Kindly help clarify.

Thanks a lot

DRV2511-Q1: OUT+/OUT- tolerance at Standby

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Part Number: DRV2511-Q1

Hi team,

I am trying to driver VCM using DRV2511.

In order to minimize DC current loading on the VCM while not actively driving, I plan to put DRV2511 in STNDBY mode while DRV2511 doesn't drive the motor.

I concern if back EMF caused by VCM will damage or degrade the life time reliability of the device if back EMF is applied to OUT+/- pin when the device is in STDBY mode.

Is that OK to use the STDBY mode like this?

Is there any concern regarding to the reliability or device operation perspective?

 regards,

TPS65987DDJ: Process Swap to Sink, and Process Vconn Swap function and behavior

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Part Number: TPS65987DDJ

Hi Team,

In my customer design, as it is a monitor, we set the port as DRP with TrySrc, and select the following setting.

However, in PD3 certification test, there is a test that the tester will test the DUT to be a sink, and will force a current to the DUT. In this case, as the monitor is a sourcing only, and will not sink current, we did not check the "process swap to sink", and it will fail the test, and should get a wavier.

My customer would like to know the behavior if we check the "process swap to sink", what will be the behavior that we could expect?

Another question is regarding the "Process Vconn swap". If we uncheck this, do we expect that during initial plug-in, the PD will not provide the 5V to Vconn? or it is just do not process the Vconn swap request when the platform wanted to pass back the Vconn to the PD?

Regards

SK Loo

EVM430-FR6047: USB HID connection or UART connection troubleshoot

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Part Number: EVM430-FR6047

Hello,

I wanted to read the DTOF values from the evm board by Raspberry Pi, through the USB HID UART connection or just UART connection. I have set the baud-rate to 115,200, and I don't receive any values.

I have also flashed the suggested code for enabling UART onto the evm430 launchpad board. But I am not getting anything. And could you confirm me the position of jumpers for this operation.  Please advice as soon as possible as I'm in a bit of a crunch situation. 

Thank You.

TPS61236P: Audible noises in both custom PCB and in Evaluation Board

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Part Number: TPS61236P

Hello,

I read the related post https://e2e.ti.com/support/power-management/f/196/t/757404 and I too have this issue with audible noise. I measured the voltage at the input and the output of the boost and saw ripple at around 16-19 KHz under light loads (approximately 30-60mA). Below graph yellow is Vin and green is Vout. Vin and Vout are with respect to the TPS61236P labels.

 

Here is my schematic as well. 

I know under light loads, the boost should enter the PFM mode. The waveform on Vout matches that given in Figure 20 of the datasheet (i cannot make out the time division info on the plot). Is it normal for this boost to operate in the audible frequency range (20Hz to 20KHz)? Are there modifications I can make to avoid this range or to at least reduce the noise?

Notes:

1. I have tested with the 1.5F capacitor off and on the board.

2. I have added extra capacity (150uF) MLCC on the input. 

3. The tantalum on the evaluation board does not change the audible noises.

4. The board makes a much louder noise during initial boot up with the 1.5F capacitor. (In this state, the super capacitor pulls Vout lower than Vin which turns off the boost. When Vin is lower than Vout it starts again. This continues until the capacitor is charged)

Here is a picture of the board layout


how to detect different int_source inside the same int_group

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Part Number: TMS320F28379D

Tool/software: Code Composer Studio

Good morning.

I'm in front of a not so usual problem.

I've enabled two different PWMs (EPWM1 and EPWM4) to trigger interrupt.

They are both muxed to INTERRUPT_ACK_GROUP3.

The question is:

once the ISR code is fetched, is there a way to detect which pwm had triggered it?

i.e. :

is possible to get the information that was in PIEIFRx.y?

Paragraph 3.4.3 of the manual says:

When a peripheral generates an interrupt (on PIE group x, channel y), it triggers the following sequence of events:

1. The interrupt is latched in PIEIFRx.y.
2. If PIEIERx.y is set, the interrupt propagates.
3. If PIEACK.x is clear, the interrupt propagates and PIEACK.x is set.
4. The interrupt is latched in IFR.x.
5. If IER.x is set, the interrupt propagates.
6. If INTM is clear, the CPU receives the interrupt.
7. Any instructions in the D2 or later stage of the pipeline are run to completion. Instructions in earlier stages are flushed.
8. The CPU saves its context on the stack.
9. IFR.x and IER.x are cleared. INTM is set. EALLOW is cleared.
10. The CPU fetches the ISR vector from the PIE. PIEIFRx.y is cleared.
11. The CPU branches to the ISR.

Once @ point.11, PIEIFRx.y has been already cleared.  So where can I find the information? (if possible...)

Best regards

Giovanni

AWR1843BOOST: When flashing chip, UniFlash hangs at erase command.

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Part Number: AWR1843BOOST

We've built several AWR1843Boost (Rev B) boards and while trying to flash the chip using UniFlash, the process hangs when sending the erase command to the chip.  The TM4C MCU has been programmed and is recognized by UniFlash as having TI's XDS110 USB debug probe.  We didn't provide the device with a serial number as we assumed that irrelevant.  Any ideas on what could cause it to hang?

CC1352R: Sample BLE application delay in response

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Part Number: CC1352R

Hi,

I am working on sample BLE application with CC1352R and its SDK 3.10 as central as well as peripheral.

While sending the data from central to peripheral,its generally taking time around 3 to 4 seconds that could be stack processing in background.

Because that i am facing the problem while receiving response back from peripheral as i need the confirmation of message is received.

I have tested with printing the Debug message in given loop(for one) and its also printing after 3 to 4 seconds each time.

Question are 

1.how to boost the process of BLE communication between two devices as its taking much time while send from one device to another or while reception.

2.How to get confirmation of message send successfully in Central code as well as peripheral code.

3.Why the peripheral device do take much time(around 5 seconds) to connect central devcie. what is the reason?

AFE7444: Access denied for AFE7444 reference HDL files

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Part Number: AFE7444

Hi, I am looking for AFE7444 reference HDL files in order to know if I can easily add this new code in my project if we buy this chip.

I follow the instructions in this topic, but when I filled the form and clicked on submit after certifying that all the above is true, a new page opens and tell me :

Access Denied

You don't have permission to access "www.ti.com/.../swlicresults.tsp on this server.

Reference #18.265c1702.1568994301.51445c25

Why I have this message? How can I get the complete datasheet and the reference HDL code?

Regards,

Luc

TI-PLC-G3-DC: Apply For G3 DC Special Version

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Part Number: TI-PLC-G3-DC

Hi,

There is a front end application with G3 DC that requires multi-screen. In the past, screens are driven by a x86 PC. Now I'm trying to move the business logic and G3 DC to AM5708 so as to replace AM3359 and the huge x86 motherboard. I thought this was easy due to the similar micro-architecture between AM5708 and AM3359. However, g3_dc_AM335X_aes_msb_loadng.exe exit unexpectedly with a segment fault. I consulted my local technical support of TI. They advice me to recompile the code in AM5708's environment. I remember another TI's staff has told me that I can apply for special version of G3 DC included the source of G3 DC runing on AM3359 if there is really a demand when I once complain to him about the size of extra x86 board. I have no idea where to send this request so I write this thread. Besides, I don't know which forum should I post this thread. If I had post it to a wrong forum, please help me correct it.

Currently I'm working with G3_DC_SDK_Package_V45010 and it contains the listed code except g3_dc_AM335X_aes_msb_loadng.exe and g3dc_cli_AM335X. I would like to request the special version containing code of g3_dc_AM335X_aes_msb_loadng.exe and g3dc_cli_AM335X.

CCS/IWR1642BOOST: The mmWave Demo Visualiser cannot run with correct SDK Demo Version

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Part Number: IWR1642BOOST

Tool/software: Code Composer Studio

Hi guys,

I am having a problem using the mmWave Demo visualizer with IWR1642BOOST. I am getting a status saying " SDK input version [major, minor ] = [3, 2]  not matching [2, 0]  reported by target, Hint: Change input version/target and try again. I have been using Demo Visualiser ver 3.2 and the demo from the industrial toolbox for xwr16xx. Can you please help me resolving this issue.

Thank you for your help!

Apply For G3 DC Special Version

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Hi,

There is a front end application with G3 DC that requires multi-screen. In the past, screens are driven by a x86 PC. Now I'm trying to move the business logic and G3 DC to AM5708 so as to replace AM3359 and the huge x86 motherboard. I thought this was easy due to the similar micro-architecture between AM5708 and AM3359. However, g3_dc_AM335X_aes_msb_loadng.exe exit unexpectedly with a segment fault. I consulted my local technical support of TI. They advice me to recompile the code in AM5708's environment. I remember another TI's staff has told me that I can apply for special version of G3 DC included the source of G3 DC runing on AM3359 if there is really a demand when I once complain to him about the size of extra x86 board. I have no idea where to send this request so I write this thread. Besides, I don't know which forum should I post this thread AM335x forum or here. If I had post it to a wrong forum, please help me correct it.

Currently I'm working with G3_DC_SDK_Package_V45010 and it contains the listed code except g3_dc_AM335X_aes_msb_loadng.exe and g3dc_cli_AM335X. I would like to request the special version containing code of g3_dc_AM335X_aes_msb_loadng.exe and g3dc_cli_AM335X.


CCS: How to add linked resources in to CCS 9.1 project

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Tool/software: Code Composer Studio

Hi expert,

I'd like to know how to add linked resources in this page.

Thanks

Sheldon

TPS43060: TPS43060

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Part Number: TPS43060

Hi all, I have designed a DCDC converter 12V (battery)  to 36V, with a output power max of about 250W (8A at 36V) and really it works as expected, but I have EMC problem! 

I have followed the suggestions for better layout described in datasheet itself, but the results are not good,  the EN55032 Class B limit is not satisfy in the area 30MHz-100MHz with peaks around 45dBuV (the limit is 30dBuV). 

I am using ferrites and common mode choke (impedence about 1K ohm in 30-100MHz area) on the output , without these components the behaviour was worst. There are several ceramic capacitors on 12V input voltage, I put also the smd X2Y ceramic capacitors,  With all these components the better board gives the result of 45dBuV! (Over EN55032 Class A!). Other boards (same layout and components) have dBuv more. Consider that we are not testing in the worst condition as output power, we are around 25%, 36V about 2A.

The frequency used is 125KHz, the inductor is 6.8uH (40A) with shunt 1.66mohm (3 shunt of 5mohm in parallel), the 2 external mosfet (60V 100A 2.6mohm) in D2PACK with heatsink on pcb.

I have stop the "high side" mosfet (cutting out its gate resistor and shorting the gate with source pins) using it as a  diode (loosing the syncronous mode), and the EMC have improved a little bit, in this mode I have increased the gate resistor for "low side" mosfet to 22 ohm, and the EMC have improved a little bit more (Class A ok, but not Class B).

Coming back to syncronous mode (high side mosfet enabled again), I try to use 10 ohm as gate resistor for both mosfet, but in this way I have fired the mosfet itself, I believe that with this gate resistor the turn off time of the mosfet is too large while the other mosfet is already on.

So, the questions are:

1) which is the maximum gate resistor you suggest? 

2) have you any idea to improve this kind of EMC problem?

Thanks in advance

Renato 

CCS: Questions regarding JTAG emulation circuit hardware design

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Tool/software: Code Composer Studio

Hi expert,

Regarding designing JTAG circuit, I have following question from my customer. These questions are for traditional JTAG.

1. Why EMU0 and EMU1 are required to be pulled up? If left them just floating, what will happen?

2. Any way to check if a XDS100 or XDS200 emulator is broken? Some of their emulators are quite easy to get error 2131 when connecting, some are not on the same hardware.

3. The disance between the header and target is recommended to be with 6 inches. How do you define a "header"? The phycal connector or where we do the pull-up?

4. For figure 17 in document spra439e. We dind't see any pull up on TDO which is different from what we saw on document, why? Are TDI and TDO allowed to leave float? What are the risks of not pulling up these pins?

Thanks

Sheldon

TPS7B4254-Q1: Out put abnormal

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Part Number: TPS7B4254-Q1

Hi Team,

I am doing a reference design using TPS7B4254-Q1,  the aimed output should be 22V.  The output waveform as the following picture shows,looks abnormal, could you please kindly help to give some suggestions about this phenomenon?  I also attached my design circuit as following picture shows. Thank you very much for your kindly support.

Best regards

Jessica

Compiler/F28M36P63C2: POR, MBOOTROM

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Part Number: F28M36P63C2

Tool/software: TI C/C++ Compiler

The Concerto stucks after a POR in the MBOOTROM and even does not reach the BootToFlash. To enable a successful debugging the customer is asking for the source code of the MBOOTROM (version: 0x100258 0x06120101). For other CPUs the source code is availabale in our control suite. 

Thanks and bye
Hanno 

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