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TIDEP-01012: from antenna patterns to the data capture card questions regarding TIDEP-01012

September 20, 2019, 6:54 am
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Part Number: TIDEP-01012

Hi, 

I have the following questions about the non-released yet TIDEP-01012:

1/      Do you have antenna patterns for the board? (element-wise patterns as well as the phased array pattern of Tx?) 

2/      Is it possible to use DCA1000 boards instead of TIDEP-01017 as capture cards? The reasons for using those are two folds: we have been working with them and we are pretty familiar with all aspects of the boards, and it might be challenging and time-consuming to use TIDEP-01017 for quick prototyping since, as far as I understood, they require RTS programming. Therefore, for a simple range/Doppler FFT operations we might get into hard coding of the RTS processors on TIDEP-01017. 

3/       In "Design Guide: TIDEP-01012" document, the reported maximum detectable ranges are 150 and 350 m for MIMO and TXBF modes, respectively. Why did not you try to achieve a higher range? The chirp configuration should not be limiting for the maximum detectable range while SNR is a limiting factor. Though are the reported maximum ranges are based on the measured SNRs or they are just typical values?

I will be so appreciated if you give a comprehensive guide. 

Best regards, 

Mostafa 

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BQ27542-G1: BQ27542-G1

September 20, 2019, 6:59 am
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Part Number: BQ27542-G1

Hi,

I m facing flash failure  issue.

Flashing tool used: Software tool Battery Management Studio and Hardware tool is EV2400.

We are using : 2BQ27542-G1

Issue: We have produced 200 boards with BQ27542-G1.  Out of 200 number of boards 190 boards are working fine.  In next month we are going produce 1000 number of devices with the same chip.

History of Remaining 10 boards:

1. These boards were worked during the first time flashing.

2. During the 2nd time flashing, we are facing the flashing failure on these boards.

Please help me how to proceed further.

-Lingaraju E

Mob: +91 9986883051

eMail: lerappa@innominds.com

Innominds Software Pvt. Ltd.

Bangalore.

India.

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AM3352: JTAG connection while linux running

September 20, 2019, 7:06 am
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Part Number: AM3352

Dear Champs,

I'm supporting customer to connect JTAG on their custom board and realized the connection to Cortex-A8 core was failed due to linux running.

When I tried to connect JTAG to Cortex-A8 core while linux running, I faced below error. Is this normal situation?

If so, is there any way to connect JTAG without rebuilt kernel/U-BOOT while linux running?

When I checked JTAG connection using 'Test connection' in the TargetConfigurations, all tests are passed.

Do you think it is possible there is an issue in their JTAG HW on custom board?

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CortxA8: Error connecting to the target: (Error -1170 @ 0x0)
Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK).
(Emulation package 8.1.0.00007)

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Thanks and Best Regards,

SI.

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CCS/TMS320C6748: Tutorial for Kick start projects

September 20, 2019, 7:13 am
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Part Number: TMS320C6748

Tool/software: Code Composer Studio

Is there any good reference for image processing using TMS320C3748 uC , I am new to this DSP processor.

Thanks

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TL783: using for voltages above 125 V

September 20, 2019, 7:13 am
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Part Number: TL783

Is there a better way of using TL783 above 125 V output than simply setting a single device to produce 200 V out and protecting it with three 39 V zener diodes?

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BQ76940: Cannot clear OVRD_ ALERT fault

September 20, 2019, 7:16 am
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Part Number: BQ76940

Good day,

What causes the OVRD_ALERT bit to become 1? From the datasheet:

"The ALERT pin may also be driven by an external source; for example, the pack may include a secondary overvoltage protector IC. When the ALERT pin is forced high externally while low, the device will recognize this as an OVRD_ALERT fault and set the [OVRD_ALERT] bit. This triggers automatic disabling of both CHG and DSG FET drivers. The device cannot recognize the ALERT signal input high when it is already forcing the ALERT signal high from another condition."

However, the ALERT pin in my AFE is solely connected to my MCU as an input. So I can't seem to see how the ALERT pin is being forced high externally while low. At startup, when I read the SYS_STAT(0x00) register, I get both OVRD_ALERT and UV faults (UV is expected, as my cell voltages are 2.9V while my UV_TRIP is at 3.1V). I have a pushbutton that clears all bits in the SYS_STAT register by writing 1's to all bits (0xBF) to register address (0x00). However, when I read SYS_STAT again, I get the same two faults.

Thank you very much,

Robert

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DLPDLCR470TEVM: Can get the DMD to display anything

September 20, 2019, 7:17 am
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Part Number: DLPDLCR470TEVM

 I received it this week, and connected the 4422 to the 470tecm and a 5V supply.   Nothing seems to happen to the DMD.  I was able to communicate with the 4422 and load the projector file and went through the SPLASH image procedure.

Is another power supply needed?  Is there a jumper configuration I need to just put up test patterns?

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CC2640R2F: GPIO initialization and setting value

September 20, 2019, 7:29 am
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Part Number: CC2640R2F

I am looking to use a GPIO pin in my Launchpad CC2640R2F project. However, I don't seem to understand the requirements for configuring a pin. What modifications need to be made in the CC2640R2_LAUNCHXL.c, CC2640R2_LAUNCHXL.h, and in the project .c file. 

I want to write a GPIO pin High. 

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TPS61175: Confirming optimal schematic for boost converter

September 20, 2019, 7:31 am
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Part Number: TPS61175

Hi there, I wanted to confirm with a specialist that my schematic design is optimal for what I want to do. I used a lot of the information provided from both the datasheet and the TPS61175EVM-326 . My device takes an input voltage of 15V and outputs at 24V. which from the equation for max output current gives me 1.5A. Attached below are the values I have chosen for the passive components to the schematic. Please let me know if you have recommendations for changes or anything. Thanks! 

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CCS/TMDXIDDK379D: CCS Debug not working

September 20, 2019, 7:39 am
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Part Number: TMDXIDDK379D

Tool/software: Code Composer Studio

I am new to this dev kit and I was following the user guide to try to understand it. However whenever I try to run the debugger, the enable flag resets to 0 in the expression window and nothing executes. This is what I see:

_______________________________________________________________________________________

_______________________________________________________________________________________

_______________________________________________________________________________________

_______________________________________________________________________________________

After looking online, This break might occur because the target is halted at "a program address where there is no source code correlation", or "the PC not being able to properly locate estimator functions in ROM", or "the CPU had executed illegal opcode."

But as i am new, i don't really understand how to fix the problem.

I tried to load the output file onto the device by going to Run->Load->Load Program but that also did not work when I actually ran the program.

What am i doing wrong?

user guide: http://www.ti.com/lit/ug/sprui44/sprui44.pdf

product: www.ti.com/.../TMDXIDDK379D

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ADS1018: ADS1018 vs ADS1118 vs TEGAM 940A - how can I obtain more robust results?

September 20, 2019, 7:43 am
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Part Number: ADS1018

Hello,

Recently I got a chance to compare both ADS1018 and ADS1118 to a thermocouple calibrator TEGAM 940A, Results obtained from ADS1118 vs TEGAM 940A are much better than ADS1018 vs TEGAM 940A. Both devices are driver by the same code (except for the temperature conversion). I was wondering if there are techniques to improve upon the results as seen on ADS1018. I am operating this on continuous conversion mode, 128SPS, Pull up enabled and a PGA of +/-256mV. 

Here are the graphs. 

Thank you in advance for any sort of input.

Shubham Tandon

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66AK2H14: U-boot on custom board

September 20, 2019, 7:48 am
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Part Number: 66AK2H14

Hi,

I am currently working on a custom board using the 66AK2H14 processor. I currently flash my u-boot on the NOR flash of the board. I managed to see U-boot starting using UART.

However, It always stop get stuck at this point on my console:

Cannot read DIMM params                                                                                                
Sorry, I don't know how to configure DDR3A.                                                                            
Bye :( 

I saw that it comes from ddr3_read_spd function in arch/arm/mach-keystone/ddr3_spd.c. The code that can be found inside is the following:

    i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE);    
    old_bus = i2c_get_bus_num();
    i2c_set_bus_num(1);

    ret = i2c_read(0x53, 0, 1, (unsigned char *)spd_params, 256);

    i2c_set_bus_num(old_bus);

    if (ret) {
        printf("Cannot read DIMM params\n");
        return 1;
    }

I can see that i2c_read function of course returns 1. Why the I can't read the params by I2C?

Do you have any advice or idea about this?

I did the change in board/ti/ks2_evm/ddr3_cfg.c to follow the DDR3 used on our board with our custom ddr configuration. The configuration of ddr3a phy and ddr3a emif was tested by emulation with a custom gel file including our changes. It was tested by emulation on DSP and the accesses to DDR3A were validated with success. 


Thank you for your help.

Best Regards.


K.Luong

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BQ40Z60: Lstatus value unknown

September 20, 2019, 7:48 am
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Part Number: BQ40Z60

Hello,

After doing a valid learning cycle (Lstatus going from 04 to 06), the Lstatus pass to a value of 14.

As the bit 4-7 of this register are not describe, could you explain this result ?

For your information, in Data Memory Gas Gauging, the register 'update status' has the value 0E, So i suppose that the learning cycle has complete correctly. agree ?

Thank you

Gilles

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CC3220SF-LAUNCHXL: SL_DEVICE_EVENT_FATAL_NO_CMD_ACK

September 20, 2019, 7:54 am
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Part Number: CC3220SF-LAUNCHXL

Hi

I am running the aws_cc32xx_2_20_00_02 plugin with simplelink_cc32xx_sdk_2_40_02_00

subscribe_publish_sample sample code with IAR compile and FreeRTOS option.

The device is hitting 'void SimpleLinkFatalErrorEventHandler(SlDeviceFatal_t *slFatalErrorEvent)' option SL_DEVICE_EVENT_FATAL_NO_CMD_ACK.

I have yet to run the full demo. 

Am i correct that this error is caused by external flash rd/wr   OR is it a read between CC3220SF cores?

Is it a hardware issue or is there any firmware fixes i can attempt.

 i have ordered a new dev board.. .but in the mean time any ideas would be appreciated

Many Thank in advance

William

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BQ40Z80: Enabling/disabling gauge voltage output from host

September 20, 2019, 7:58 am
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Part Number: BQ40Z80

Is there a way to enable/disable pack output from host. I managed to do this by enabling ManufacturingStatus()[FET_EN] = 1, and then set ManufacturerAccess() 0x0020 DSG FET Toggle.

But that is said to be needed for manufacturing testing purpose. Can this be used in production safely?

Will gauge protection work when FETs are set to be operated in manual mode? Any consequences else?

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CCS/EK-TM4C1294XL: Type def struct call backs missing in array data

September 20, 2019, 8:05 am
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Part Number: EK-TM4C1294XL

Tool/software: Code Composer Studio

Struggling to make sense why serial UART buffered data is missing when a command is processed via table of commands. Dayz trying to get decimal value from a serial two part ASCII command stream only to discover it don't work as someone at TI may have missed an important issue being clouded by an alternate return argument data path.

First part "speed" command, second a decimal value that should be passed into the argv[] of the command handler.  Being frustrated added argument array into the command being processed. CCS debug shows ASCII (serial) array data g_ccArgv[4] value "1847" is missing in the return call back, typedef (*pfnRxCmdLine). It seems TI engineers relied on UARTPeak() in order to determine a manually enter terminal string command via CR (0x0D). Somehow the call back cmd string data argument portion was incorrectly transferred into the UART BUFFERED and not the pfn call back assignment, typedef (*pfnRxCmdLine). The entire command handler structure was built on a false narrative as it can not be used to handle serial UART commands as is. Perhaps no body ever scrubbed (cmdline.c) code to determine practice use in other UART scenarios such as high speed attached ASCII data command source.

 Perhaps the Thumb instructions that preform pfn call back function of (argc/argv[]) attachment are not working as intended? Seemingly (cmdline.c) arguments will only forward typedef (*pfnRxCmdLine) pointed to via UART buffer but the argument value portion of the callback should use (SRAM pointer addresses) from the argument array of pointers into UART data.   

1. Why does CCS show 4 digits g_ccArgv[4] "1847" when only single 8 bit digit (1) is present?  2. Why does typedef (*pfnRxCmdLine) call back type fail to return the values CCS debug indicates via (SRAM address) during the command argument being matched and processed, (speed) in this case?   How can I get the WA shown in (Cmd_Targetspeed) to produce final decimal value from the 4 returned array values 1,10's,100's, 1000's place holders? Note the command handler is serial, so each array argument value[n] is filled each time a "speed" match 4x in this case. Note the (g_parameter.ulTargetSpeed << 14) in call handling, why 110 decimal if 1847 is the final result g_pccArgv[4]? Why is this simple code not working to prodce decimal values via two different methods?  

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CCS/TMS320F28069: Issue on PC Lint Plus integration in CCSv8

September 20, 2019, 8:08 am
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Part Number: TMS320F28069

Tool/software: Code Composer Studio

Hi guys,

I'm trying to configure PC Lint Plus in CCSv8 but I have some issues. I was reading a conversation about it.

Is the "ccs28x_ti.lnt" file available so I can check the configuration? Can you post the file?

Thank you!

Fabrizio 

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TMS320F280049: SPI SOMI Delay time too long

September 20, 2019, 8:13 am
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Part Number: TMS320F280049

Hello,

I work with the F280049 and come across a strange behaviour. Due to unexpected problems during SPI communication I looked a little closer into the timings of all signals.

I am using INTOSC2 which gives me a SYSCLK of around 96.25 Mhz as stated in the appropriate Technical Reference (SPRUI33B) on page 108. On my self designed board I have the recommended set of capacitors close to the chip and soldered everything by hand. So far I can tell, everything is connected fine and all solder points look good. All connections are tested with a multi meter.

My LSPCLKDIV = 0 so my peripheral clock should run wit system clock. The spi is configured as slave and my SPI clock is 10 Mhz, polarity is 0 and phase is 1. High speed mode is enabled as well as fifo. The datasheet (SPRS945D) tells me that the delay td(SOMI)S between the falling edge and a valid SPISOMI is 14 ns at max. But as far as I can't tell my oscilloscope shows me 19ns to 29ns jitter for the firs falling edge. The setup time for the SPI between SPISTE down and CLK up is 66ns. All edges look good and with small rise and fall times.

The SOMI pin is connected to a SN65LVDS2DBVR. CLK anf SIMO ar comming from a SN65LVDS1DBVR and have a 4 to 5 ns delay.

Can someone explain to me where this jitter and extra time is coming from? Any idea how to fix this?

Regards,
Martin

The picture shows the maximum delay (5ns from CLK + 29 ns from SOMI delay)

1 - SPISTE at Master

Ch2 - SOMI at Slave

9 - SIMO at Master

10 - CLK at Master

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Single phase BLDC 80000 RPM solution

September 20, 2019, 8:18 am
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Please help to suggest single phase BLDC 80000 RPM solution , MCU or SOC solutions are available。

Best Regards 

James

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DRV8353R: Identifying low side gate drive return path

September 20, 2019, 8:24 am
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Part Number: DRV8353R

Hi,

I was hoping to seek clarification on the return path of GLx. It appears that the return path will be SPx when using a shunt resistor. If this is true, then I assume that best practice would be to make the SPx trace as thick as the GLx trace to accommodate the possible 2A current flow. This would mean that one would not use relatively thinner differential traces that are common for current sensing since SPx is also used for current sensing?

Respectfully,

Lucas

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