Part Number: TIDA-01604
Dear team:
How to determine the grid frequency in reference design TIDA-01604? I only see the phase-locked section in the reference manual.
http://www.ti.com/lit/ug/tidue54a/tidue54a.pdf
Best regards
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TIDA-01604: How to determine the grid frequency in reference design TIDA-01604?
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TPS23751: T2P(Type2 PSE Indicator) behavior
Part Number: TPS23751
Hi
I have a question about T2P pin in TPS23751.
I'm designing circuit of PD type2 using TPS23751.
However, I think that our product do not necessarily require a Type2 PSE indicator.
If so, is the following correct?
1. T2P pin in the PD circuit is left unconnected
2. T2P circuit do not need to place in our product(PD) for IEEE802.3at compliance test.
Best Regards,
keisuke
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PCM9211: cap for PLL loop filter
Part Number: PCM9211
Hello
I understand CH or C0G type ceramic filter are recommended for PLL loop filter,
but if customer used B or X7R, is it problem?
I think it should tested by customer themselves, but please advise.
Best Regards
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AM3358: reason to "lock" all threads
Part Number: AM3358
Dear TI and all,
this question to try to understand the reason why many threads, also mark [ resolved ] and near to a solution are without solution and "locked". Not understanding the reason of this. Is the solution only visible with certian permissions ? Or may be just a case ?
Also, i would have liked to reply and add some solutions. Even if late, it could still be useful to who is looking for the solution.
Regards
Angelo
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CCS/AWR1843BOOST: The relation between the CFAR threshold and rxGain in the profile configuration
Part Number: AWR1843BOOST
Tool/software: Code Composer Studio
Hi,
If I select rxGain as different value, should the CFAR threshold be adjusted according to the rxGain value？I.e.,the larger the rxGain is, the larger the threshold is?Is that right?
Regards,
Rata
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TAS5805M: Audio process latency for TAS5805M
Part Number: TAS5805M
Hi,
1. When “ALL PASS” is selected in the Biquads Filter Is there a difference in delay time when GAIN is set to 0 dB with “ON”? 2. In the FIR Filter, when b0 is 1 ... 000 Is there a difference in the delay time when b127 is 1 ... 000? Does TAS5805M DSP process have audio buffer? Customer wants to know latency time whether TAS5805M DSP process has audio buffer.
if so, Please let me know how many samples.
Regards,
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TLV62569: iD8212 alternative
Part Number: TLV62569
Hi Team,
Could I use the TLV62569 to replace iD8212 for Pout=3.3V/1A application?
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CC2642R: How to scan 100 ble devices in 1 second?
Part Number: CC2642R
Hi,
How many devices can be scan in 1 second by using CC2642R? My customer target is over than 100 devices in 1 second.
Actually, when we set the BTool duration to be 100, it only can scan 14-15 devices in one second.
How to set the parameter to meet the target of scanning 100 devices in 1 second? Thanks.
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MSP430F5659: Odd behavior of controller functionality
Part Number: MSP430F5659
Hi,
We are using MSP430F5659 having 512KB memory size and 64KB of RAM.
For our application we are using IAR IDE with following settings:
Code Model: Large
Data Model: Large
Floating Point size of double: 32bits
Optimization: Low
While development we are facing below scenario data corruption issues:
1 In one of function which having 5 input arguments, On simple if condition execution local variable data got corrupt, where no data modification did.
Observation: Corrupted variable was allocated in local register, that means local register was corrupted.
Solution: After some trial and we fixed above issue, With function argument as structure pointer.
structure holding 5 members (Nothing but 5 argument data of earlier function).
Example:
Issue:
void func(arg1, arg2, arg3, arg4, arg5)
{
local1;
local2;
local3 = arg4;
local4 = arg5;
if(condition) -----------> after this line execution local3 got corrupted
{
}
local1 = arg2;
}
Solution:
struct{
arg1; arg2; arg3; arg4; arg5;
}
void func(struct *data)
{
local1;
local2;
local3 = data->arg4;
local4 = data->arg5;
if(condition) -----------> after this line execution local3 not corrupted
{
}
local1 = data->arg2;
}
Query: Please comment for this, is there any limitation for function argumen. Because we faced same issue for function with 4 argument.
Its been wokring fine for function with argument less than 4.
=====================================================================================================================================================
2 In one of function value assigment is not working.
Observation: We are assigning values from function input argument pointer member to globle pointer member.
while assigningment we can observe correct value in function input argument pointer member,
But after assigning to globle pointer member value getting shifted by 8 bits.
Solution: While debugging we found that after single byte gloable variable declairation this issue was observed.
On changing gloable variable declairation from single byte to word byte it was working fine.
Example:
Issue:
file1:
unsigned char glob_data;
void func()
{
doing jod with variable --> glob_data;
}
-------------------------------------------------------------------------------------------------------------------
file2:
struct1
{
member1; member2;...member30;
}
struct2
{
member1; member2;...member30;
}
struct1 *ptr_glob;
void func(strcut2 *data)
{
ptr_glob->member4 = data->member4; -------> data->member4 holding value 01 --> 0x01
do other job; -------> data->member4 holding value 256 --> 0x0100, as it suppose to be 0x01
}
-------------------------------------------------------------------------------------------------------------------
Solution:
file1:
unsigned int glob_data;
void func()
{
doing jod with variable --> glob_data;
}
-------------------------------------------------------------------------------------------------------------------
file2:
struct1
{
member1; member2;...member30;
}
struct2
{
member1; member2;...member30;
}
struct1 *ptr_glob;
void func(strcut2 *data)
{
ptr_glob->member4 = data->member4; -------> data->member4 holding value 01 --> 0x01
do other job; -------> data->member4 holding value 01 --> 0x01, which is expected
}
-------------------------------------------------------------------------------------------------------------------
Query: Need to understand memory impact on changing globle variable size.
We observed different behaviour like value got assigned with even with 24bit shifted, after variable size adjusment as like above example it got fixed.
=====================================================================================================================================================
3. Unpredictable behaviour on including or removing portion of code.
Observation: On removal/ adding of some portion of code, which does not include any data corrution logic. Application is not behaving normal.
Solution: If issue obaserved on removal of code then include code again to work normal. same case with on adding code.
Issue number 1 and 2 were observing since in early stage of application development, where Code Memory size was above 100KB (Code + Const Memory) and Data Memory was above 16KB.
Where issue 3 we are obaserving more frequently, Currently our application have consumed Code Memory of 390KB (Code + Const Memory) and Data Memory of 24KB.
Below is the part of current map file:
****************************************
* *
* SEGMENTS IN ADDRESS ORDER *
* *
****************************************
SEGMENT SPACE START ADDRESS END ADDRESS SIZE TYPE ALIGN
======= ===== ============= =========== ==== ==== =====
DATA16_AN 0102 - 0103 2 rel 0
015C - 015D 2
016C - 016F 4
0224 - 0225 2
022A - 022B 2
0340 - 0341 2
03C0 - 03C3 4
03D2 - 03D3 2
03E0 - 03E1 2
049C - 049D 2
04A0 - 04A1 2
04AE - 04AF 2
05DE - 05E1 4
05E6 - 05E7 2
05EA - 05EA 1
05EC - 05EC 1
05EE - 05EE 1
05FC - 05FD 2
061E - 0621 4
0626 - 0627 2
062A - 062A 1
062C - 062C 1
062E - 062E 1
063C - 063F 4
065E - 0661 4
0666 - 0667 2
066A - 066A 1
066C - 066C 1
066E - 066E 1
0672 - 0673 2
067C - 067D 2
0700 - 0703 4
070A - 070B 2
0710 - 0710 1
0720 - 0721 2
CODE_I 2400 rel 1
DATA20_I 2400 - 4605 2206 rel 1
CSTACK 6360 - 63FF A0 rel 1
CSTART 8000 - 8037 38 rel 1
ISR_CODE 8038 - 8247 210 rel 1
<CODE> 1 8248 - FF7F 7D38 rel 1
INTVEC FF80 - FFF7 78 com 1
RESET FFFE - FFFF 2 rel 1
<CODE> 2 00010000 - 0004524D 3524E rel 1
DATA20_C 0004524E - 00064FB2 1FD65 rel 1
DATA20_ID 00064FB4 - 000671B9 2206 rel 1
CODE_ID 000671BA rel 1
DATA20_Z 000F0000 - 000F3B8B 3B8C rel 1
DATA20_N 000F3B8C rel 1
****************************************
* *
* END OF CROSS REFERENCE *
* *
****************************************
250 440 bytes of CODE memory
24 114 bytes of DATA memory (+ 74 absolute )
139 115 bytes of CONST memory
Please kindly help us and do share your solution/ thoughts with us.
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TMS320F28335: Not able to find out Source code mentioned in Application Report SPRAB69–September 2009
Part Number: TMS320F28335
Hi Team,
I am referring Application Report SPRAB69–September 2009 to use flash as a EEPROM.
But not able to find out the source code as mentioned on that AN at this link http://www-s.ti.com/sc/techlit/sprab69.zip
Please suggest from where I can get the same.
Thanks & Regards,
Sachin
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TAS2563: PPC3-EVM not recognized USB connection
Part Number: TAS2563
Hello,
Our two sets of TAS2563EVM on PPC3-EVM was working very well.
But suddenly GUI is not able to recognize USB connection and "Connect" bottom is not showing up.
I tried "remove-miniEVM" batch program, there is no help.
Both EVMs have same phenomena.
In our experiment PPC3-EVM USB function is coming back and work correctly after 24-48hr aging time.
Do you see any XMOS USB interface Freezing or Latch up phenomena?
How can we recover the function before 48hr waiting time?
Regards,
Mochizuki
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Question about ADC sample bit width extension
If a signal S is divided into m intervals according to the amplitude, and then the corresponding amplitude interval is sampled by m n-bit wide ADCs, then whether this can be equivalent to an ADC with a bit width of n+log(2, m) sampling?
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TPS25942A: what's the FLT pin behavior when remove Vin but Vout still holded
Part Number: TPS25942A
Hello, there are two questions about this device.
1. Does FLT pin could connect to other power rail(not Vin or Vout itself) with a pull up resistor? I think it will be fine but just double confirm here.
2. When Vin remove suddenly but Vout was hold, what's the behavior of FLT pin, high or low? does the internal Mosfet conducted of closed at that condition? Is there a document that describe the indeterminate status of the internal Mosfet which connected to FLT pin?
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TS3DS10224: Is it possible to monitor 1:2 fan-out mode?
Part Number: TS3DS10224
Hello,
We would like to monitor USB bus signal by someway. I found TS3DS10224.
I assumed 1:2 fan-out mode. USB master is connected to INA+/-. USB slave is connected to OUTA0+/-, Monitor is connected to OUTB0+/- for example.
I think TS3DS10224 is passive switch so we can monitor either up link(OUT0A+/- -> INA+/-) or down link(INA+/- -> OUTA0+/-) at OUTB0+/- terminal.
Is my understanding correct?
USB is tree architecture. Do you think OUTB0+/- can monitor up link signal. I mean USB master can't connect at OUTB0+/-.
Best regards,
Toshihiro Watanabe
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INA190: First stage stability issue
Part Number: INA190
Hi guys
Our customer is using our INA190 as output current sense.
Common mode voltage: 12Vout; Load Current: 0-50A.(DC output) Shunt resistor: 3* 0.3m ohm parallel;
Blue: Iout AC COUPLE； Yellow: INA190A3 OUT. 5A Iout
10A Iout
15A Iout. You can see the red circle phonomenon. Oscillation problem；
50A Iout；Oscillation problem
Schematic：
After that: we also asked customer to change R425 and R428 to 0 ohm. Remove the Offset_ADJ. But the results keep same.
However, when we replace it by INA199B3. The test result is OK. Please see the waveform:
Pink INA199B3 OUTPUT
I found that INA199 has no the first stage but INA190 has one. why we have the first tage int the INA190? is this any relationship between both?
INA199 Block:
INA190:
Your feedback are very appreciated.
Thanks
-Pengfei
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MSP430F5659: Tool to flash firmware builds on hardware boards
Part Number: MSP430F5659
Hi Team,
I am using MSP430F5659 controller and IAR IDE. I am new to MSP family.
Need your support to know the tool details which will be used to flash the firmware on hardware boards by service team/manufacturing teams.
For ST micro controllers, i have use STM32 utility tool, with which i can flash the hex/bin file directly on hardware boards without IAR.
Do we have anything like that for MSP430.
Please let me know.
Thanks,
Krishna
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CC2642R: No UART output after adding display_print1() funciton
Part Number: CC2642R
Hi,
We want to enable uart to print based on simplelink_cc13x2_26x2_sdk_3_20 simple_central project, but failed
Is there a good UART printing example or detailed document to help us make troubleshooting? Thanks.
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DRA77P: Trouble building recipe for bluez5.50 in yocto
Part Number: DRA77P
Hi,
We have been trying to build a recipe for bluez in our yocto and comes up with following errors,
WARNING: bluez5-5.50-r0 do_fetch: Checksum mismatch for local file /home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/downloads/bluez-5.50.tar.xz Cleaning and trying again. WARNING: bluez5-5.50-r0 do_fetch: Renaming /home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/downloads/bluez-5.50.tar.xz to /home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/downloads/bluez-5.50.tar.xz_bad-checksum_8e35c67c81a55d3ad4c9f22280dae178 WARNING: bluez5-5.50-r0 do_fetch: Checksum failure encountered with download of cdn.kernel.org/.../bluez-5.50.tar.xz - will attempt other sources if available WARNING: bluez5-5.50-r0 do_fetch: Checksum mismatch for local file /home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/downloads/bluez-5.50.tar.xz Cleaning and trying again. WARNING: bluez5-5.50-r0 do_fetch: Renaming /home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/downloads/bluez-5.50.tar.xz to /home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/downloads/bluez-5.50.tar.xz_bad-checksum_8e35c67c81a55d3ad4c9f22280dae178 ERROR: bluez5-5.50-r0 do_fetch: Checksum failure fetching cdn.kernel.org/.../bluez-5.50.tar.xz ERROR: bluez5-5.50-r0 do_fetch: Fetcher failure for URL: 'cdn.kernel.org/.../bluez-5.50.tar.xz'. Checksum mismatch! File: '/home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/downloads/bluez-5.50.tar.xz' has md5 checksum 8e35c67c81a55d3ad4c9f22280dae178 when 913f35d6fa4ca5772c53adb936bf1947 was expected File: '/home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/downloads/bluez-5.50.tar.xz' has sha256 checksum 5ffcaae18bbb6155f1591be8c24898dc12f062075a40b538b745bfd477481911 when ddab3d3837c1afb8ae228a94ba17709a4650bd4db24211b6771ab735c8908e28 was expected If this change is expected (e.g. you have upgraded to a new version without updating the checksums) then you can use these lines within the recipe: SRC_URI[md5sum] = "8e35c67c81a55d3ad4c9f22280dae178" SRC_URI[sha256sum] = "5ffcaae18bbb6155f1591be8c24898dc12f062075a40b538b745bfd477481911" Otherwise you should retry the download and/or check with upstream to determine if the file has become corrupted or otherwise unexpectedly modified. ERROR: bluez5-5.50-r0 do_fetch: Function failed: base_do_fetch ERROR: Logfile of failure stored in: /home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/bluez5/5.50-r0/temp/log.do_fetch.14473 ERROR: Task (/home/teuser/ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01/yocto-layers/sources/oe-core/meta/recipes-connectivity/bluez5/bluez5_5.50.bb:do_fetch) failed with exit code '1'
What do we do to resolve this ?
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TUSB1044: for PCIe Gen3
Part Number: TUSB1044
Hi Team,
May I know that I can use TUSB1044 for PCIe Gen3 re-driver application?
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WEBENCH® Tools/TMS320F28388D: RMII reference clock
Part Number: TMS320F28388D
Tool/software: WEBENCH® Design Tools
Hello,
There seems to be a contradiction in the description of the RMII interface signals (F2838x TRM, section 42.2.1.2). Indeed, it says "The clock [RMII_REFCLK] is generated by the PHY (...). If External clocking option is selected this signal is input and if internal clock is selected, this signal is output." I believe that it should rather say that RMII_REFCLK is generated by the PHY in external clocking mode. Please confirm.
Also, it would be good that the names be consistent across the TRM and the datasheet as the latter refers to ENET_RMII_CLK.
Best regards,
François.
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