Part Number: AM5728
On my custom AM5728 board, running TI Linux SDK 5.02, which includes TI U-Boot 2018.01, I am trying to follow Ethernet PHY (TI DP83867) I/O delay tuning guide from here.
The guide lists these 5 steps:
- write 0x0040 to register 0x0000 // Force 1000BASE speed
- write 0x0c01 to register 0x0170 // Adjust IO pad impedance
- write 0xd001 to register 0x0016 // Start PRBS generation and loopback to RGMII
- write 0x0077 to register 0x0086 // Set RX & TX RGMII clock delay to 2.0 ns
- write 0x00d3 to register 0x0032 // Enable RX & TX clock delay
U-Boot can detect the Phy without issue:
=> mii device
MII devices: 'ethernet@48484000'
Current device: 'ethernet@48484000'
=> mii info 0
PHY 0x00: OUI = 0x80028, Model = 0x23, Rev = 0x01, 1000baseT, FDX
And can also read the control register using mdio and mii commands:
=> mdio read 0
Reading from bus ethernet@48484000
PHY at address 0:
0 - 0x40
=> mii dump 0 0
0. (0040) -- PHY control register --
(8000:0000) 0.15 = 0 reset
(4000:0000) 0.14 = 0 loopback
(2040:0040) 0. 6,13 = b10 speed selection = 1000 Mbps
(1000:0000) 0.12 = 0 A/N enable
(0800:0000) 0.11 = 0 power-down
(0400:0000) 0.10 = 0 isolate
(0200:0000) 0. 9 = 0 restart A/N
(0100:0000) 0. 8 = 0 duplex = half
(0080:0000) 0. 7 = 0 collision test enable
(003f:0000) 0. 5- 0 = 0 (reserved)
However, I can't seem to access ass register 0x1F:
=> mdio read 0x1f
Reading from bus ethernet@48484000
PHY at address 0:
31 - 0x0
=> mdio read 0x20
Reading from bus ethernet@48484000
PHY at address 0:
Error
And the mdio command mentions this limitation:
mdio - MDIO utility commands
Usage:
mdio list - List MDIO buses
mdio read <phydev> [<devad>.]<reg> - read PHY's register at <devad>.<reg>
mdio write <phydev> [<devad>.]<reg> <data> - write PHY's register at <devad>.<reg>
mdio rx <phydev> [<devad>.]<reg> - read PHY's extended register at <devad>.<reg>
mdio wx <phydev> [<devad>.]<reg> <data> - write PHY's extended register at <devad>.<reg>
<phydev> may be:
<busname> <addr>
<addr>
<eth name>
<addr> <devad>, and <reg> may be ranges, e.g. 1-5.4-0x1f.
So how do I access registers at 0x170 to run the Phy IO delay tuning?
