Part Number: DRA744
HI TI Team,
Platform: TOI DRA74x SOC
eMMC : samsung
We have one problem when we are issuing "sanitize" operation from host to eMMc device. Once we issue Sanitize operation the response can take up to 4min(240 sec) according to eMMC standard . But Ti has one errata (snippet is attached below) where maximum time out is always 700 ms when host is running at 192MHZ. For to over come this Ti has already added software timer(which is coming approx 3 sec in our hardware) for the response. This time out is applicable for all the responses, if the response comes in less than 4sec timer is deleted, but sanitize requires more time (240 sec) according to specs. We have observed that once we issue sanitize operation CMD6 is send from host will wait for 4 sec( 700ms from H/W time out + 3 sec from S/W timer) to get respnse, If response is not with in 4 secs driver will HPI interrupt to interrupt sanitize operation using CMD13 untill it is success. We have observed that system will go for hang after certain time due to RCU lock. To over come this sanitize time out We have tried some experiments by increased time out to 240 sec in "omap_hsmmc_do_irq()" in drivers/mmc/host/omap_hsmmc.c. After applying the below change We observed that response(for CMD6 sanitize) is coming after 12 seconds . As we cannot pre-determine for response we have to wait for 4mins max accoding to standard.
omap_hsmmc_do_irq(){
.....
OMAP_HSMMC_WRITE(host->base, STAT, status);
if (end_cmd || ((status & CC_EN) && host->cmd)) {
omap_hsmmc_cmd_done(host, host->cmd);
if (host->data_timeout) {
unsigned long timeout;
if ((host->mrq->cmd->arg >>16 & 0xFF) == EXT_CSD_SANITIZE_START) {
host->data_timeout=240000000000;
}
timeout = jiffies +
nsecs_to_jiffies(host->data_timeout);
mod_timer(&host->timer, timeout);
}
}
if ((end_trans || (status & TC_EN)) && host->mrq)
omap_hsmmc_xfer_done(host, data);
}
Here there is a new problem, We connot wait for 240 seconds in ISR context, which will impact system performace and lead to other errors. We would like to know is there any reasons for running software timer in ISR context. Can you suugest any approaches for this.
Above is the highlighted we have added for experimental purpose.
Errata:
* DRA7 Errata No i834: When using high speed HS200 and
* SDR104 cards, the functional clock for MMC module
* will be 192MHz. At this frequency, the maximum
* obtainable timeout (DTO =0xE) in hardware is
* (1/192MHz)*2^27 = 700ms. Commands taking longer than
* 700ms will be affected by this small window frame
* and will be timing out frequently even without a
* genuine timeout from the card. Workaround for
* this errata is use a software timer instead of
* hardware timer to provide the timeout requested
* by the upper layer.
Thanks and Regards,
Vivek
static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status)