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CCS/MSP432P4111: MSP432 BSL Software Invocation Documentation Is Lacking

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Part Number: MSP432P4111

Tool/software: Code Composer Studio

Hello,

I have seen some other posts in the forum where users have trouble with the software invocation of the MSP432 BSL. The symptom is that the BSL works fine when invoked via hardware invocation or the lack of a main program (0xFF in first 8bytes of main memory). I ran into the very same problem as mentioned here(), but the solution there was not complete.

I have found that the software invocation should look like the following:

    Interrupt_disableMaster();
    for (int i=0; i < 240; i++) NVIC->IP[i] = 0; // This is critical! However SLAU622H does not mention this for SW invocation.                                                                                                                                                
    NVIC->ICER[0] = 0xFFFF;
    NVIC->ICER[1] = 0xFFFF;
    NVIC->ICPR[0] = 0xFFFF;
    NVIC->ICPR[1] = 0xFFFF;
    BSL_INVOKE(BSL_UART_INTERFACE);


My key finding was that the interrupt priorities MUST be reset to zero. I also reset the Systick (BSL uses to find the baud), Timer A0 (BSL uses for 10 second timeout), and USCI A0 (UART used to program). So I add the following code prior to entering the BSL:

    /* Make sure our MPU settings don't cause problems in the BSL. */
    MPU_disableModule();

    /* The BSL does not initialize some hardware it uses. It requires                                                                                                                                                                                                         
     * the Systick (to determine UART baud rate) and Timer A0 (to set                                                                                                                                                                                                          
     * the 10-second timeout). Prepare these for use by BSL. */
    SysTick_disableInterrupt();
    SysTick_disableModule();
    Timer_A_stopTimer(TIMER_A0_BASE);

    /* Need to reset UART A0 for firmware update. Be sure to make the                                                                                                                                                                                                          
     * corresponding GPIOs input pins. */
    UART_disableModule(EUSCI_A0_BASE);
    GPIO_setAsInputPin(GPIO_PORT_P1, GPIO_PIN2);
    GPIO_setAsInputPin(GPIO_PORT_P1, GPIO_PIN3);

I hope this helps someone. You may want to update SLAU622H with the interrupt lines above. I was going nuts trying to figure out how to invoke the BSL for firmware updates in the field!

Best,

Mike


BQ24650: Output capacitor selection

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Part Number: BQ24650

I have an application in which a boost converter (TPS61087) runs directly from my LiIon battery, which is charged using BQ24650. The BQ24650 data sheet specifies specific, low-value output capacitors that are commensurate with its feedback compensation loop. In my case, 10uF. But the boost converter wants at least twice that on its input. So, what happens if I use a larger output cap? Or, is it sufficient to isolate the boost input caps from the charger using a low-value resistance?

AM5728: How to disable GPIO6_16 from triggering interrupt on A15 core0?

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Part Number: AM5728

Hi there,

I'm working with Linux processor-sdk 05.02.00.10 and RTOS processor-sdk 4.03.00.05.
I successfully worked with jailhouse hypervisor on the AM5728 evaluation board.

Now I'm trying to startup jailhouse on a AM5728 based custom board.

In my custom board pin F21 is pinmuxed to be GPIO6_16. When the RTOS inmate is launched this gpio is set to '1' by some peripheral.

On the Linux side a registered interrupt starts running:

165:          0          0  4805d000.gpio  16 Level     palmas

I think this interrupt is triggered by GPIO6_16 because after exporting gpio144 on the linux side I get:

# cat /sys/kernel/debug/gpio

.......

gpiochip4: GPIOs 128-159, parent: platform/4805d000.gpio, gpio:
gpio-144 ( |sysfs ) in lo IRQ

.....

After the RTOS inmate is launched the pin is set to high and the interrupt is running. 

and once the interrupt count reaches 100001:

[ 1424.726062] irq 165: nobody cared (try booting with the "irqpoll" option)
[ 1424.726070] CPU: 0 PID: 34 Comm: irq/41-4805d000 Tainted: G O 4.14.79-rt47-gd9200ca684 #18
[ 1424.726073] Hardware name: Generic DRA74X (Flattened Device Tree)
[ 1424.726075] Backtrace:
[ 1424.726096] [<c010b808>] (dump_backtrace) from [<c010baec>] (show_stack+0x18/0x1c)
[ 1424.726102] r7:000000a5 r6:200f0093 r5:00000000 r4:c0d57560
[ 1424.726111] [<c010bad4>] (show_stack) from [<c082207c>] (dump_stack+0x90/0xa4)
[ 1424.726120] [<c0821fec>] (dump_stack) from [<c01837b8>] (__report_bad_irq+0x30/0xd4)
[ 1424.726126] r7:000000a5 r6:d4b27a00 r5:00000000 r4:d4b27a00
[ 1424.726133] [<c0183788>] (__report_bad_irq) from [<c0183bf0>] (note_interrupt+0x270/0x2bc)
[ 1424.726139] r9:600f0013 r8:00000001 r7:000000a5 r6:d4b27a00 r5:00000000 r4:d4b27a00
[ 1424.726147] [<c0183980>] (note_interrupt) from [<c0180cb0>] (handle_irq_event_percpu+0x74/0x80)
[ 1424.726152] r10:00000000 r9:600f0013 r8:00000001 r7:00000002 r6:d4b27a00 r5:00000000
[ 1424.726155] r4:00000000 r3:00000000
[ 1424.726161] [<c0180c3c>] (handle_irq_event_percpu) from [<c0180d3c>] (handle_irq_event+0x80/0xb8)
[ 1424.726166] r7:d4a60468 r6:d4a60410 r5:d4b27a70 r4:d4b27a00
[ 1424.726172] [<c0180cbc>] (handle_irq_event) from [<c018472c>] (handle_level_irq+0xb0/0x194)
[ 1424.726177] r7:d4a60468 r6:d4a60410 r5:d4a60464 r4:d4b27a00
[ 1424.726183] [<c018467c>] (handle_level_irq) from [<c017fdb0>] (generic_handle_irq+0x2c/0x3c)
[ 1424.726186] r5:d4a60464 r4:00000010
[ 1424.726194] [<c017fd84>] (generic_handle_irq) from [<c04329e8>] (omap_gpio_irq_handler+0x108/0x15c)
[ 1424.726201] [<c04328e0>] (omap_gpio_irq_handler) from [<c0181dd8>] (irq_forced_thread_fn+0x28/0x7c)
[ 1424.726206] r10:c0181db0 r9:d4a43340 r8:d4a38400 r7:00000001 r6:00000000 r5:d4a38400
[ 1424.726208] r4:d4a43340
[ 1424.726214] [<c0181db0>] (irq_forced_thread_fn) from [<c0182130>] (irq_thread+0x130/0x208)
[ 1424.726219] r7:00000001 r6:00000000 r5:ffffe000 r4:d4a43364
[ 1424.726226] [<c0182000>] (irq_thread) from [<c0149368>] (kthread+0x164/0x16c)
[ 1424.726232] r10:d4871ac8 r9:c0182000 r8:d4a43340 r7:d4a72000 r6:00000000 r5:d4a43380
[ 1424.726233] r4:d49e3200
[ 1424.726241] [<c0149204>] (kthread) from [<c0107a90>] (ret_from_fork+0x14/0x24)
[ 1424.726246] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0149204
[ 1424.726248] r4:d4a43380
[ 1424.726252] handlers:
[ 1424.726257] [<c0180dc8>] irq_default_primary_handler threaded [<c056c164>] regmap_irq_thread
[ 1424.726269] Disabling IRQ #165

It seems like GPIO6_16 is set to high which causes this interrupt to run without being handled and then it is shutdown by the kernel.

I think it is related to some palmas driver.

I tried to disable GPIO6 in the device tree but then the kernel got stuck upon power up.

Can you direct me how to either disable this driver completely, or move the irq to a different gpio?

Or how can I disable this gpio6_16 in particular from triggering and interrupt in A15 core 0?

Thanks a lot,

Nir.

CCS/TMS320F28379D: unresolved symbol

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Part Number: TMS320F28379D

Tool/software: Code Composer Studio

Hello,

I am getting following errors. Please help me to fix them. Thank you in advance

Regards, 

Sindhu H

CCS/AM5728: CCS memory browser can access McSPI4 only when set to "Physical"

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Part Number: AM5728

Tool/software: Code Composer Studio

Hi there,

I'm working with Linux processor-sdk 05.02.00.10 and RTOS processor-sdk 4.03.00.05.
I successfully worked with jailhouse hypervisor on the AM5728 evaluation board.

Now I'm trying to startup jailhouse on a AM5728 based custom board.

The RTOS inmate app is unable to access McSPI4 memory space.

Using CCS memory browser I can view the address space properly only when the memory browser is set to "Physical".

When it is set to "CPU" the address space is zeroed out.

Why is that?

Address spaces of McSPI1,2,3 are available when the memory browser is set both in "Physical" and "CPU", and the RTOS inmate can access them with no problem.

Thanks a lot,

Nir.

TMS570LC4357: Is it possible to write to peripheral registers with the HTU?

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Part Number: TMS570LC4357

Hello, I'm trying to configure a peripheral register using the the N2HET by passing data using the HTU. 

I have the N2HET and HTU working well(I'm able to read/write from the RAM (512kB) portion of memory). However, I can't seem to write to peripheral registers. I'm specifically talking about this region here:

Is it possible to write to the peripheral registers using the HTU? Am I missing something? 

Thanks.

CC1310: Understanding fecMode parameter

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Part Number: CC1310

Hi,

I have noticed that in RF Studio when I select 50 kbps fecMode is 0.  If I select 2.5 kbps fecMode is 0x8. In this document it says to use 0xA. Which one

should be used to enable FEC and is there a definition of what those bits mean?

Victor

MSP430FR5989: UBDIFG and UBDRSTEN; GC5 Errata

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Part Number: MSP430FR5989

Hi,

if I have GCCTL0.UBDIE = 0, GCCTL0.UBDRSTEN=0 and GCCTL0.CBDIE = 0,  is it possible to have UBDIFG bit set by HW while the error reporting is turned OFF and later on when SW enables the Error reporting, for ex: sets GCCCTL0.UBDRSTEN = 1, then I get a PUC immediately. If so, it is safer to clear the UBDIFG before I turn ON the error reporting (PUC or NMI) right?

This in relation to the GC5 Errata, does it make sense to include clear the UBDIFG flag (any other FRAM error detection flags) before re-initializing the GCCTL0 to enable PUC generation? W.r.t GC5 errata work around how is it guaranteed that the first access to FRAM after wake up doesn't set the UBDIFG?

Best Regards

Santosh Athuru


MSP-EXP430F5529LP: BoosterPack Plug-in Module Connector pins 31 & 32 (J4:P3.7 and P8.2) - are these signals attached to the MSP430F5529?

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Part Number: MSP-EXP430F5529LP

Hi,

Sorry for a simple question. I'm really trying to do my homework before posting, but there's a lot to learn. Your patience is appreciated.

I'm using CCS 8.3.0.00009 with the "ti-cgt-msp430_18.1.4.LTS" compiler.

I would like to attach a signal to the BoosterPack Plug-in Module Connector in a way that won't interfere with any existing functions, but which can be used to interrupt the MSPF5529. These pins (see title) don't seem to be used for anything on the LaunchPad, but I can't find them in Figure 42 of the user's manual ("slau533d.pdf").

If these pins are attached to the MSP430F5529, how are they identified in CCS?

If the pins are not attached, are there any other pins which I might employ or "borrow" in order to interrupt the MSP430?

My application is using the TDC7201-ZAX-EVM.

Any help is appreciated. 

F28M35H52C: M3 Watchdog0: WatchdogHandler is triggered even before the initialization is complete

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Part Number: F28M35H52C

Hi,

   I have been following the example provided in the control suite for the watchdog timer. My understanding of how the API works don't match the actual execution sequence which I would like to confirm with you.

I have attached a video of my debugging session that clearly elaborates the following.

watchdog_init()

{

// Enable the peripheral.
SysCtlPeripheralEnable(SYSCTL_PERIPH_WDOG0);

// Enable the watchdog interrupt.
IntEnable(INT_WATCHDOG);

// Unlock writes to watchdog configuration.

WatchdogUnlock(WATCHDOG0_BASE);

// Set the period of the watchdog timer.
WatchdogReloadSet(WATCHDOG0_BASE, loadValue);

// Enable reset generation from the watchdog timer.
WatchdogResetEnable(WATCHDOG0_BASE);

// Enable the watchdog timer.
WatchdogEnable(WATCHDOG0_BASE);

// Lock subsequent writes to watchdog configuration.
WatchdogLock(WATCHDOG0_BASE);

}

Problem: Even before the Watchdog LOCK function is executed, a watchdog interrupt is triggered. Can someone explain why this is happening?

Am I missing something?

(Please visit the site to view this video)

Anoja

CC3220SF: Race condition gathering SL_WLAN_GENERAL_PARAM_EXT_CONNECTION_INFO after SL_NETAPP_EVENT_IPV4_ACQUIRED event triggered

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Part Number: CC3220SF

Hi support,

Our device is attempting to figure out what LSI to request based on the AP settings provided by a call to

    // Will only return valid info when STA is connected to AP
    SlWlanExtConnectionInfo_t ExtConnectionInfo;
    _u16   config_opt = SL_WLAN_GENERAL_PARAM_EXT_CONNECTION_INFO;
    _u16   Len = sizeof(SlWlanExtConnectionInfo_t);
    uint16_t sl_ret_val =  sl_WlanGet(SL_WLAN_CFG_GENERAL_PARAM_ID, &config_opt, &Len, (_u8 * )&ExtConnectionInfo);
    assert (sl_ret_val == 0);

The sl_WlanGet function is returning 0 even though the data is not yet updated.  We have an AP that it set to have a DTIM of 2, yet it is returning a ExtConnectionInfo.DTIMPeriod of 1 sometimes.  It doesn't happen every time.  Maybe 20% of the time, it is returning a DTIMPeriod of 1 instead of 2.

We tried gating this call after SL_NETAPP_EVENT_IPV4_ACQUIRED, and after SL_WLAN_EVENT_CONNECT, but the same behavior results.  

When is it OK to make the call to grab this data?  Should we be adding in some delay after one of these events above?

Thanks!

WEBENCH® Tools/AMC1301: Linear output of AMC1301?

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Part Number: AMC1301

Tool/software: WEBENCH® Design Tools

Hi,

I simulate AMC1301 circuit and it is fine (from Vin to C23), but the output VM2 is not linear to the input Vinp-n, for example, when Vinp-n=243.67mV, VM2=1.37V, the gain is not 8.2. why? There will be some gain error but it seems too big.  Datasheet says -0.25V<VINP – VINN<0.25V. Since the value seems changing, how to determine the safety margin for VINP – VINN for Vin=360V-480V in my circuit? please find simulation file attached below.

I simulate the OPA320 circuit (from VM2 to C24) and it is good.

When I combine them together. I don't understand the results. First is transient analysis and second is steady state analysis. Why VM2 is negative in transient analysis and keeps going down in steady state? The signal would stay same after some time whether it is in transient or steady state analysis, am I wrong? 

I am wondering if my circuit is wrong somewhere?  

(Please visit the site to view this file)

Thanks,

Hongmei Wan

CCS/TMS320F280049C: c2000 not found after update to CCS 9.1.0

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Part Number: TMS320F280049C

Tool/software: Code Composer Studio

Hello!

Installed CCS 9.0.1 and C2000Ware_2_00_00_02 and sucessfully build and run small project.

Than allowed CCS update to 9.1.0  and afterwards C2000 was not found anymore by CCS.

Multiple restarts and reinstalls later even the CCS 9.0.1 is not working anymore.

Any ideas?

Wifi driver not loading on system boot

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Hi,

I am working on HummingBoard edge which uses i.MX6 processor and the wifi driver it uses is wl18xx_driver (Version- Rev 8.9.0.0.69). So whenever I boot the board for the first time the wifi driver isn't loaded and at the same time when I reboot the system everytime the wifi driver is loaded. When I read the dmesg output for the kernel after rebooting it I find the following output:

[   13.879818] wlcore: wl18xx HW: 183x or 180x, PG 2.2 (ROM 0x11)

[   13.897226] wlcore: WARNING Detected unconfigured mac address in nvs, derive from fuse instead.

[   13.923443] wlcore: WARNING This default nvs file can be removed from the file system

[   13.976375] wlcore: loaded

[   14.590609] wlcore: PHY firmware version: Rev 8.2.0.0.236

[   14.648646] wlcore: firmware booted (Rev 8.9.0.0.69)

[   14.676574] IPv6: ADDRCONF(NETDEV_UP): wlan0: link is not ready

I don't find the same when the board is booted for the first time. Similarly when I do 'rfkill list all' or ‘lshw -C network’ wireless LAN is not enlisted after booting the system for the first time , while it appears on reboot for the same commands. The Linux distribution I am using is Debian and the kernel use is 4.9.150-imx6-sr. Please help me in fixing this. Thanks in advance.

Regards,

Emil Peter

AM6546: Which register show the device boot diagnostics?

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Part Number: AM6546

(I am asking this question on behalf of a customer)

Could TI please point out in TI's documentation information about 'how to read out diagnostic statuses' of the AM65xx/ DRA80M device during/after boot the Linux PDK? Important interest topics include:

  • Last reset reason
  • BIST execution/results
  • Ethernet tx/rx error counters per interface
  • Incremental boot count
  • CAN tx/rx error counters per interface
  • DDR error counters

AWR1642BOOST: Can I reproduce the vital sign lab with AWR1642Boost?

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Part Number: AWR1642BOOST

Hello!

I want to reproduce the vital sign lab but I only have AWR1642Boost. Am I able do it?

Thank you very much!

Best,

PJ

CCS/EK-TM4C1294XL: How to call Task_Object_get(Task_Object *array, Int i);

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Part Number: EK-TM4C1294XL

Tool/software: Code Composer Studio

Can anyone help with:

Task_Handle Task_Object_get(Task_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
Q1. what is the meaning (array == NULL)?
Q2.  show an example how to make call for this function.
Thanks,

CC2640R2F: Maximum TX Octets, maximum characteristic size

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Part Number: CC2640R2F

We are using the CC2460R2F with the provided "simple_np" example. We have created several services and characteristics on our AP which work fine for apps which do not attempt to negotiate MTU size. All characteristics but one are 20 bytes in size, while the last characteristic's size can be adjusted dynamically based on the exchanged MTU size, but start with size 20 bytes.

The stack indicates that the maximum supported ATT_MTU size is 247, but while fumbling through our dynamically-sized characteristic implementation, we found that only the first 20 bytes get sent (when notifications are enabled, for example), regardless of the negotiated MTU size as indicated from the SNP to our AP by way of an SNP_ATT_MTU_EVT. We tried many things with no effect, and so we started using a BLE sniffer.

During establishment of the connection, the MTU size is negotiated (between nRF Connect app on Android version 9) as follows:

Exchange MTU Request, Client Rx MTU: 517
Exchange MTU Response, Server Rx MTU: 247
LL_LENGTH_REQ, as pictured below:

LL_REQ

LL_LENGTH_RSP, as pictured below:

LL_RSP

Does this mean what I think? That the CC2460R2F only supports writing/notifying up to 20 bytes? If so, how can this be changed? From what I read, the TI BLE Stack supports DLE by default, with no configuration required.

Additionally, a simpler query:

Is it true that the appropriate size for a characteristic is ATT_MTU_SIZE-3, to leave 1 byte for the opcode and 2 bytes for the Attribute Handle?

BQ34Z100-G1: BQ34Z100-G1 Gauging Error Tips

DRV8702-Q1: Full bridge solenoid drive

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Part Number: DRV8702-Q1

I'm looking to use the DRV8702-Q1 as a 1-2A max continuous full bridge solenoid driver. To reduce the 12V solenoid open and close times the supply voltage will be increased to 18-24V while pulse width modulating the full bridge in forward and reverse modes (instead of recirculate mode). My concern is using the DRV8702 in reverse drive mode because this will put a negative voltage across, and a negative current through, the current sense resistor. Will the internal CSA output stay at 0V when Vsp-sn < 0V? Will the CSA output need any extra settling time after Vsp-sn goes back above 0V? The current sense resistor will be 0.1 ohm and the maximum current will be about 2A.

Will the fault output behave normally during and after the negative voltage duration?

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