Hello,
I'm new to DSPs, and have been working on getting audio through the McBSP port on a C6424. The target hardware is of our own design, but is loosely based on the C6424EVM. I've been able to do simple polling, and EDMA without the help of Sys/Bios. All of these attempts work very well.
I've now added Sys/Bios to the mix and am trying to create a simple interrupt routine.
The McBSP is a slave in this case, and is receiving clocks for a TDM stream of 10 channels (one phase). I've attached a .pdf of the interrupt service routine, and the Sys/Bios configuration. The code simply puts out samples from a multiplexed sine table.
The routine seems to work, but the channels rotate about once a second, as if an interrupt was being missed. In the idle task, I’m monitoring the missed interrupt registers, but they’re not showing anything. If I deliberately miss interrupts (by globally disabling them for a time), my little warning system goes off. However, if I put a long delay inside the ISR such that it is obviously missing interrupts, I don’t get the same indication. So, that’s my first quandary.
I think I've disabled every other hardware interrupt in the system. Enabling hardware interrupt tracking in the Execution graph breaks the code (it seems to run too slowly).
Another interesting tidbit is that if I disable full debugging capabilities, I get hash on the outputs. Yet, I must have full optimization turned on.
Anyway, the big question is, what's holding up the ISR, if anything?
By the way, what are the "priorities" of the interrupts? Is a higher numbered interrupt a higher priority than a lowered numbered interrupt (the same as with SWIs)?
Thanks for the help.
Brian
Sys/Bios 6_33_05_46
XDC 3_23_03_53
CCS Version: 5.2.1.00018