I have a TMS570 connected to a non-TI PHY controller, a Micrel KS8721. I have lwip working on the TMS eval board that has the TI dp83640 phy, and I can step through the rx handler and see it clears the interrupt properly. The 570 emac reference manual indicates that the RX0CP completion pointer clears the interrupt when the descriptor pointer matches this emac register value. I see from my debug statements and by stepping through the code that this is occurring. But as soon as I exit the irq, a new one receive irq hits.
The emac irq is mapped to vector 77(rx) and 79(tx), and I've configured HalCogen pin muxing to enable the full MII interface (not the reduced mode RMII). Practically the same code that runs on the TI Eval board is running on my system, except that I have a different PHY driver that I ported from another ARM9 project.
Both phy controllers have an external interrupt that is disabled, in addition I have disabled the rxpulse generation. In the 570 emac reference, the setup of the emac controller involves 17 steps, I have found all 17 places in the hdkif.c module that initializes this chip.
I realize that most projects would just use the recommended TI phy part, but I need to salvage this design as it has already been laid down, and replacing it would require scrapping all our boards as the pinouts to the dp83640 are not compatible.