LMH1218: Cascading multiple LMH1218 and jitter

Part Number:LMH1218

Hello,

We are hoping you could help us check into a concern that we have with our new design.  Currently we have a requirement for three SDI outputs and are using three LMH1218 devices in series (see the attached drawing for clarity) to meet this requirement.  One of our concerns is with the jitter on the third output (both on the SDI output and to the subsequent FPGA) as to whether it would exceed the SDI SMPTE specification at a 6G rate or whether this scheme would work at all due to the total jitter throughout the path.

Thanks in advance for the assistance,

Kevin McNulty(Please visit the site to view this file)