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CC2500, Folded Dipole Antenna and CCA/RSSI Error

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Hi friends,

I have a new design that is use CC2500 transiever and STM32F407 MCU. I follow the steps for folded dipole antenna that are explained in DN004. My PCB layout is almost same as TI reference layout. I have used 4-Layer PCB and absolutely I am aware of microstrip/stripline issues. Then I ported SimpliciTI to my MCU. Everythings is OK. I can communicate and configure the CC2500 with SPI. I have another design that is used CC2510. This design is based TI reference layout (with meandered F antenna-AN043) and is working perfectly. I tested two of modules at the same time. They can communicate with each other perfectly.

So I want to communicate my CC2500 based design and CC2510 based design.

First I started CC2500 based design tests and unfortunately I have some issues. After deeply inspection I became aware of my CC2500 based design get very low RSSI value in RX mode and it doesn't assert CCA bit in CCA detection mode. There is no RF node except WiFi access point in my office. I set the MCSM1 to 0x3C and I put it RX mode (I checked the MARCSTATE of course). There is no CCA assertion!!! So I disable the CCA checking with  MCSM1->0x0C. Of course it assert the CCA signal but RSSI value is -15dBm..-20dBm. I could not understand this situation. What is the source of problem?

I tested the design with kinds of BW options. 

IF=100KHZ, BW=200KHZ, IF=100KHZ, BW=325KHZ, IF=100KHZ, BW=541KHZ, IF=100KHZ, BW=650KHZ

IF=200KHZ, BW=200KHZ, IF=200KHZ, BW=325KHZ, IF=200KHZ, BW=541KHZ, IF=200KHZ, BW=650KHZ

The results are same.

My radio config register values are below:

#define SMARTRF_SETTING_IOCFG2 0x29
#define SMARTRF_SETTING_IOCFG1 0x2E
#define SMARTRF_SETTING_IOCFG0 0x06
#define SMARTRF_SETTING_FIFOTHR 0x07
#define SMARTRF_SETTING_SYNC1 0xD3
#define SMARTRF_SETTING_SYNC0 0x91
#define SMARTRF_SETTING_PKTLEN 0xFF
#define SMARTRF_SETTING_PKTCTRL1 0x04
#define SMARTRF_SETTING_PKTCTRL0 0x05
#define SMARTRF_SETTING_ADDR 0x00
#define SMARTRF_SETTING_CHANNR 0x00
#define SMARTRF_SETTING_FSCTRL1 0x04
#define SMARTRF_SETTING_FSCTRL0 0x00
#define SMARTRF_SETTING_FREQ2 0x5D
#define SMARTRF_SETTING_FREQ1 0x44
#define SMARTRF_SETTING_FREQ0 0xEC
#define SMARTRF_SETTING_MDMCFG4 0x16
#define SMARTRF_SETTING_MDMCFG3 0x83
#define SMARTRF_SETTING_MDMCFG2 0x03
#define SMARTRF_SETTING_MDMCFG1 0x23
#define SMARTRF_SETTING_MDMCFG0 0x3B
#define SMARTRF_SETTING_DEVIATN 0x44
#define SMARTRF_SETTING_MCSM2 0x07
#define SMARTRF_SETTING_MCSM1 0x3C
#define SMARTRF_SETTING_MCSM0 0x18
#define SMARTRF_SETTING_FOCCFG 0x16
#define SMARTRF_SETTING_BSCFG 0x6C
#define SMARTRF_SETTING_AGCCTRL2 0xC7
#define SMARTRF_SETTING_AGCCTRL1 0x40
#define SMARTRF_SETTING_AGCCTRL0 0x91
#define SMARTRF_SETTING_WOREVT1 0x87
#define SMARTRF_SETTING_WOREVT0 0x6B
#define SMARTRF_SETTING_WORCTRL 0xF8
#define SMARTRF_SETTING_FREND1 0x56
#define SMARTRF_SETTING_FREND0 0x10
#define SMARTRF_SETTING_FSCAL3 0xA9
#define SMARTRF_SETTING_FSCAL2 0x0A
#define SMARTRF_SETTING_FSCAL1 0x00
#define SMARTRF_SETTING_FSCAL0 0x11
#define SMARTRF_SETTING_RCCTRL1 0x41
#define SMARTRF_SETTING_RCCTRL0 0x00
#define SMARTRF_SETTING_FSTEST 0x59
#define SMARTRF_SETTING_PTEST 0x7F
#define SMARTRF_SETTING_AGCTEST 0x3F
#define SMARTRF_SETTING_TEST2 0x88
#define SMARTRF_SETTING_TEST1 0x31
#define SMARTRF_SETTING_TEST0 0x0B
#define SMARTRF_SETTING_PARTNUM 0x80
#define SMARTRF_SETTING_VERSION 0x03
#define SMARTRF_SETTING_FREQEST 0x00
#define SMARTRF_SETTING_LQI 0x00
#define SMARTRF_SETTING_RSSI 0x00
#define SMARTRF_SETTING_MARCSTATE 0x00
#define SMARTRF_SETTING_WORTIME1 0x00
#define SMARTRF_SETTING_WORTIME0 0x00
#define SMARTRF_SETTING_PKTSTATUS 0x00
#define SMARTRF_SETTING_VCO_VC_DAC 0x00
#define SMARTRF_SETTING_TXBYTES 0x00
#define SMARTRF_SETTING_RXBYTES 0x00
#define SMARTRF_SETTING_RCCTRL1_STATUS 0x00
#define SMARTRF_SETTING_RCCTRL0_STATUS 0x00

My PCB layout picture is below. GROUND plane and POWER plane secitons under the antenna are blank. 

tmk

Senior System Design Architect


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