OMAP4 GPMC Synchronous Burst Failure

I try to interface an FPGA with the OMAP4 using the GPMC in synchronous burst mode.
The FPGA acts like an FIFO which triggers just on the GPMC_CLK and GPMC_CS signals and outputs the data on the 16Bit GPMC_AD bus.
The GPMC is configured in non-multiplexed 16Bit NOR Flash mode. To enable the burst mode of the GPMC a DMA is used. The kernel code below shows the DMA configuration.


    ret=omap_request_dma(OMAP44XX_DMA_GPMC,"dma",dma_callback,NULL,&spartan_dma.transfer_id);

    omap_set_dma_transfer_params(spartan_dma.transfer_id,
                  OMAP_DMA_DATA_TYPE_S16,
                  spartan_dma.buffers.buf_size / 2,
                  1,
                  OMAP_DMA_SYNC_ELEMENT,
                  0,
                  0);

       omap_set_dma_src_params(
                  spartan_dma.transfer_id,0,OMAP_DMA_AMODE_POST_INC,
                  cs_mem_base,1,1);

    omap_set_dma_dest_params(
                   spartan_dma.transfer_id,0,OMAP_DMA_AMODE_POST_INC,
                   spartan_dma.buffers.ping_buf_phys,1,1);

       omap_set_dma_src_burst_mode(
                  spartan_dma.transfer_id,OMAP_DMA_DATA_BURST_16 );


       omap_set_dma_dest_burst_mode(
                  spartan_dma.transfer_id,OMAP_DMA_DATA_BURST_16  );

      omap_set_dma_dest_data_pack(spartan_dma.transfer_id,1);
      omap_set_dma_src_data_pack(spartan_dma.transfer_id,1);

       omap_dma_set_global_params(
                  0x1, 0x20,DMA_THREAD_RESERVE_THREET);
       omap_dma_set_prio_lch(
                  spartan_dma.transfer_id,DMA_CH_PRIO_HIGH,DMA_CH_PRIO_HIGH);

        omap_start_dma(spartan_dma.transfer_id);


DMA Register content:

[159908.133087] REVISION:10900
[159908.137329] IRQSTATUS_L3:f
[159908.140319] IRQENABLE_L3:0
[159908.145416] SYSSTATUS:1
[159908.148132] CAPS_0:1c0000
[159908.153076] CAPS_1:10900
[159908.155883] CAPS_2:1ff
[159908.160461] CAPS_3:f3
[159908.163024] CAPS_4:7ffe
[159908.167663] GCR:10020
[159908.170196] CCR:4005040
[159908.174865] CLNK_CTRL:0
[159908.177612] CICR:922
[159908.180053] CSR:0
[159908.184844] CSDP:e1c1
[159908.187377] CEN:200
[159908.191589] CFN:1
[159908.193756] CSSA:1000000
[159908.198455] CDSA:aaa2c800
[159908.201354] CSEI:1
[159908.203613] CSFI:1
[159908.208557] CDEI:1
[159908.210815] CDFI:1
[159908.214874] CSAC:1000400
[159908.217681] CDAC:aaa2ac00
[159908.222778] CCEN:200
[159908.225219] CCFN:0
[159908.229309] COLOR:0
[159908.231689] CDP:0
[159908.233825] CNDP:0
[159908.238616] CCDN:0

The GPMC is configured as following

159782.092132] GPMC_SYSCONFIG :0
[159782.096313] GPMC_REVISION   :60
[159782.099792] GPMC_SYSSTATUS  :1
[159782.104827] GPMC_IRQSTATUS  :0
[159782.108184] GPMC_IRQENABLE:0
[159782.113128] GPMC_TIMEOUT_CONTROL:0
[159782.116882] GPMC_ERR_ADDRESS:0
[159782.121948] GPMC_ERR_TYPE:0
[159782.125061] GPMC_CONFIG:2
[159782.129364] GPMC_STATUS:901
[159782.132446] GPMC_CS_CONFIG1:79001013
[159782.138061] GPMC_CS_CONFIG2:a0a00
[159782.142700] GPMC_CS_CONFIG3:0
[159782.145965] GPMC_CS_CONFIG4:10056a12
[159782.151611] GPMC_CS_CONFIG5:808110b
[159782.155426] GPMC_CS_CONFIG6:8f070f8f
[159782.161224] GPMC_CS_CONFIG7:f41


The OMAP mux is configured the following:

cd /sys/kernel/debug/omap_mux
sudo echo 0x100 > gpmc_ad0
sudo echo 0x100 > gpmc_ad1
sudo echo 0x100 > gpmc_ad2
sudo echo 0x100 > gpmc_ad3
sudo echo 0x100 > gpmc_ad4
sudo echo 0x100 > gpmc_ad5
sudo echo 0x100 > gpmc_ad6
sudo echo 0x100 > gpmc_ad7
sudo echo 0x100 > gpmc_ad8
sudo echo 0x100 > gpmc_ad9
sudo echo 0x100 > gpmc_ad10
sudo echo 0x100 > gpmc_ad11
sudo echo 0x100 > gpmc_ad12
sudo echo 0x100 > gpmc_ad13
sudo echo 0x100 > gpmc_ad14
sudo echo 0x100 > gpmc_ad15
sudo echo 0x100 > gpmc_clk
sudo echo 0x100 > gpmc_nadv_ale
sudo echo 0x100 > gpmc_nbe0_cle
sudo echo 0x000 > gpmc_ncs0
sudo echo 0x000 > gpmc_ncs1
sudo echo 0x100 > gpmc_nwp
sudo echo 0x100 > gpmc_wait0
sudo echo 0x100 > gpmc_nwe
sudo echo 0x100 > gpmc_noe

But unfortunately sometimes the GPMC_CLK and GPMC_CS signals stops working during individual bursts (see figure below)
(the internal GPMC clock is 200 Mhz, using an prescaller of 4 , GPMC_CLK is 50Mhz)



Zoom in:


For me this failure looks like it has random occurrence because the bust number on which the failure occurred is always different.

Using the scope, the GPMC_CLK looks like this if no failure happens (1.8Vpp)



and like this if the failure happens


Can anybody help me to solve this issue?
For me it looks like the GPMC_CLK pin is somehow wrong configured, but I tried many different configuration without solving the issue.


Best Regards