hi sirs,
I am trying to run different *.out file on core0 and core1 of C6657 via RBL pcie boot. And then Core 0 send "Core 0 boot form PCIe..." when it is running via Uart. And Core 1 send "Core 1 boot from Core 0..." when it is running via Uart too. But I could not get Core 1's message via Uart.
My question is why Core 1 could not use Uart when Uart is initialized on Core 0.
Thank you in advance.
Regards,
Bai