Way confusing is TI's nomenclature for peripherals, particularly timers. Apparently the format that was used to define these has not evolved with the processors themselves. Hence, for my processor, we have 4 TIMERS labeled:
Timer0_A5
Timer1_A3
Timer2_A3
Timer0_B7
The timers A5, and A3 are "timer A" modules. B7 is a "Timer B" module. The number after the module type describes the number of capture-compare blocks within the module.
Cryptic: it took some time to figure this out.
However, the msp430F5659.h file seems to have not kept pace.
To define an interrupt vector handler we refer to the hex file and find the following as example:
#define TIMER2_A0_VECTOR ".int40" /* 0xFFD0 Timer2_A5 CC0 */ #else #define TIMER2_A0_VECTOR (40 * 1u) /* 0xFFD0 Timer2_A5 CC0 */ #endif
0xFFD0 is the base address defined for Timer TA2. The definition says interrupt flags TA2CCR0 and CCIFG0 are handled by this address. Note that it's labeled as TIMER2_A0_VECTOR. So, what does A0 denote here? There is no TIMER2_A0. It's TIMER2_A3 !! FUBAR?
Not only that, but the comments to the above definition say TIMER2_A5.
It's enough to drive one batty.
Can TI produce a simple chart that shows the relationship between the timers, and the associated VECTOR definitions please??