Part Number:TPS53647
Tool/software: WEBENCH® Design Tools
Hello,
I am designing dc-dc for an FPGA, PN XCVU9P using the TPS53647RTAR. I used WeBench to get a pretty good design -thanks. I have a question though about the VOut and IOut graphs on page 15 of the WeBench Design Report. Is the ramp-on-rate of the IOut current the actual, specified ramp-on-rate of the XCVU9P? Or is it just a typical ramp-on-rate? If the IOut shown in the graph is not the actual ramp-on-rate of the XCVU9, what IOut I should expect when powering up the XCVU9P? How do I find this spec? The ramp-on-rate of the IOut is critical. Can it be inferred from the data sheet, or do I have to test to determine it?(Please visit the site to view this file)