Part Number:DP83630
Hi,
I'm in midst of looking for potential the solutions to improve PTP implementation onto design board which currently uses the DP83630 PTP PHY IC and it's linked up to TMS320DM8148.
By default design, the DM8148 (Davinci) is provided with RMREF_CLK 50MHz to pin 34 of DP83630 and RMREF_CLK is actually synthesized from 20MHz DEVOSC with 10ppm.
Then the DP83630 will generate PTP_1PPS to DM8148 based on the RMREF_CLK. Since the PTP timestamp is generated based on RMREF_CLK and the 10ppm stability of RMREF_CLK may not be sufficient for my application.
Are there alternative sources to synthesize with RMREF_CLK to achieve higher stability without having any component changes/layout changes?
Regards,
Leo