Part Number:TMDS181
Dear TI support team,
I have some questions which concerns the TMDS181. I'm using this chip on the sink side in combination with a Kintex7 FPGA as an HDMI 2.0/1.4 capable receiver. Due to the location of the HDMI-connector, the TMDS181, and the FPGA on the PCB, I have to swap the lanes, and the polarity of the lanes. The question is, how do I have to program the TMDS181 via I²C, in order to achieve HDMI1.4b and HDMI2.0 compliancy:
Questions:
1) According the datasheet, only the Retimer Mode is possible when I swap the polarity of the lanes. So I assume that I cannot use automatic crossover. Can I use the retimer mode for the full clock range from 250Mbps to 6Gbps? In the datasheet there are inconsistent statements regarding the range. Please compare page 35 (DEV_FUNC_MODE) and page 31 chapter 8.4.1. Please can you clarify this?
2) Assuming I have to use the retimer mode for the full clock range, could I still achieve HDMI1.4b and HDMI2.0 compliancy?
3) Assuming I have to use the retimer mode for the full clock range, it is not clear to me which sequence I have to program. In one of the other threads (see link below), it is mentoined that you have to set the register DEV_FUNC_MODE to "11", and then do a PD_EN afterwards. But if I do a PD_EN after setting the DEV_FUNC_MODE register, then all I2C registers will be reset to its default value. This means the DEV_FUNC_MODE will be reset to "01" = Automatic redriver to retimer crossover at 1Gbps. This does not sound logical to me. Please can you clarify this?
https://e2e.ti.com/support/interface/f/138/t/736159?tisearch=e2e-sitesearch&keymatch=TMDS181
Best regards
Steffen Gräßle