Hi
I am working on cc3200 with code composer studio IDE, To check the code size optimization on different compilers I ported my application to IAR and compiled it successfully.
Requirement: We are using second stage bootloader which loads the ti-rtos application to SRAM, at address location of 0x2000e001 .
To make it working in CCS IDE we have changed the application's linker files as follows...
1) CC3200_LP.cmd
#define RAM_BASE 0x2000D000
/* System memory map */
MEMORY
{
/* Application uses internal RAM for program and data */
SRAM (RWX) : origin = 0x2000D000, length =0x00043000
}
/* Section allocation in memory */
SECTIONS
{
.intvecs: > RAM_BASE
.boot : > 0x2000E000
{
-l"C:\TI\tirtos_simplelink_2_01_00_03\products\bios_6_40_03_39\packages\ti\targets\arm\rtsarm\lib\boot.aem4"<boot.oem4>(.text)
}
.text : > SRAM
.const : > SRAM
.cinit : > SRAM
.pinit : > SRAM
.init_array : > SRAM
.vtable : > SRAM
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM
}
__STACK_TOP = __stack + __STACK_SIZE;
2) linker.cmd (inside Release/configPkg)
SECTIONS
{
.bootVecs: type = DSECT
.vecs: load > 0x2000d000, type = DSECT
.resetVecs: load > 0x2000d000
xdc.meta: type = COPY
}
This is working Fine, Similarly I tried to apply the changes in icf file, but I couldn't make it working and I am new to IAR workbench.
I was able to change the reset vector location, but I couldn't find where to change the boot location of application.
Could you guys help in solving jumping to entry point issue.