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enabling interrupts in stellarisware

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We recently transitioned to LM3S2793-IQC80-C5  date code $A-28.  The current processor does not function with our firmware. We replaced the Stellaris processor on a failed PCB with an older lot code and the board passed all functional tests.  What changed in the ARM hardware to cause our code not to function and how to remedy it?

History:
Software complier Code Composer 4.2.4
Software  boot loader located at 0x000000
Software application located at 0x002000
Software uses the ROM StellarisWare

I recompiled the bootloader and application using CCS 5.3.0 and the issue persisted.
The problem centers around interrupts. I can run the code until interrupts are enabled and vectored to.
If I remove the bootloader and only load the application (load address 0x000) the software appears to function.

Optimization is set at either 0 or 1.

I compiled current software using CCS5.1.1 without a bootloader. I loaded this code into a LM3S2793-IQC80-C5 $A-28 to determine the impact of the compiler on a new part.

The code fails on line 216  ROM_IntEnable(INT_GPIOC); /* enable interrupts */
There is a 50k pulse on the interrupt input pin

My Latest theory is the ROM StellarisWare is causing the problems. Is there new errata on the ROM based Stellarisware?

 

 


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