Quantcast
Channel: Forums - Recent Threads
Viewing all 262198 articles
Browse latest View live

AFE4420: AFE4420

$
0
0

Part Number:AFE4420

We would use 8 LEDs and 4 PD by different Spectrum.

How could we control the phase to match LED and PD?


Linux/DRA72: Problem fetching ti kernel

$
0
0

Part Number:DRA72

Tool/software: Linux

I keep getting a fetch error whenever I start a new clean yocto build.

What puzzles me is that a git clone outside yocto works perfectly

I tried on my main computer which has Redhat Enterprise 7.5 and on a computer that has the Ubuntu version that TI suggests to use

The problem is much the same on both whether I do with a Poky or Arago yocto.

An other programmer had the same issues a few weeks ago with both his ubuntu in virtual box (on windows 10) and my shared ubuntu computer.

Last time we had this issue it was not until early the next monday morning that a fetch was successful. That is the last time we had clean new builds.

There is no fetch issue with anything else, is there a way to switch to a tar file? That could perhaps remove the issue.

At home I can do the same fetch on these without any issue, whether done at night, weekend or work day.

Since I can git clone this would mean that ACTIA is not blocking it, so what does?

I do have the added mirrors suggested by TI in my configuration file

Kernel fetch works on my home computer with any of Fedora 29, Funtoo, Gentoo, Ubuntu, SuSE, Centos, Debian or Arch Linux

Here is what I got this morning

 [michelcatudal@mcatu01d build]$ bitbake linux-ti-staging -c fetch
NOTE: Started PRServer with DBfile: /misc/home/michel/actia-yocto-poky/build/cache/prserv.sqlite3, IP: 127.0.0.1, PORT: 46708, PID: 23976
Loading cache: 100% |########################################################################################################################################################| ETA:  00:00:00
Loaded 4032 entries from dependency cache.
NOTE: Resolving any missing task queue dependencies

Build Configuration:
BB_VERSION        = "1.30.0"
BUILD_SYS         = "x86_64-linux"
NATIVELSBSTRING   = "RedHatEnterpriseWorkstation-7.5"
TARGET_SYS        = "arm-actia-linux-gnueabi"
MACHINE           = "actia-dra726-12inch"
DISTRO            = "actia"
DISTRO_VERSION    = "2018.08"
TUNE_FEATURES     = "arm armv7a vfp thumb neon       callconvention-hard"
TARGET_FPU        = "hard"
meta-actia        
meta-ublox-modules-master = "<unknown>:<unknown>"
meta              
meta-poky         
meta-yocto-bsp    = "krogoth:444dc2e99b3c3967d9f83380c34bb99077a6ffa8"
meta-qt5          = "HEAD:f8584d7a7c90afc71484a40279aa3df651d0e04f"
meta-networking   
meta-ruby         
meta-python       
meta-oe           = "HEAD:55c8a76da5dc099a7bc3838495c672140cedb78e"
meta-ti           = "HEAD:5f3a1169d307fec41626f850f5c700437dedbe93"
meta              = "HEAD:bfa04fa71c47e8fe9528208848cfcec2e232777d"

NOTE: Preparing RunQueue
NOTE: Executing RunQueue Tasks
Currently 1 running tasks (1 of 1):
0: linux-ti-staging-4.4.45+gitAUTOINC+89944627d5-r7a do_fetch (pid 24113)

WARNING: linux-ti-staging-4.4.45+gitAUTOINC+89944627d5-r7a do_fetch: Failed to fetch URL git://git.omapzoom.org/kernel/omap;protocol=git;branch=p-ti-lsk-linux-4.4.y-next, attempting MIRRORS if available
ERROR: linux-ti-staging-4.4.45+gitAUTOINC+89944627d5-r7a do_fetch: Fetcher failure: Fetch command failed with exit code 128, output:
Cloning into bare repository '/misc/home/michel/actia-yocto-poky/downloads/git2/git.omapzoom.org.kernel.omap'...

fatal: The remote end hung up unexpectedly
fatal: early EOF
fatal: index-pack failed

ERROR: linux-ti-staging-4.4.45+gitAUTOINC+89944627d5-r7a do_fetch: Function failed: Fetcher failure for URL: 'git://git.omapzoom.org/kernel/omap;protocol=git;branch=p-ti-lsk-linux-4.4.y-next'. Unable to fetch URL from any source.
ERROR: Logfile of failure stored in: /misc/home/michel/actia-yocto-poky/build/actia-tmp/work/actia_dra726_12inch-actia-linux-gnueabi/linux-ti-staging/4.4.45+gitAUTOINC+89944627d5-r7a/temp/log.do_fetch.24113
ERROR: Task 0 (/misc/home/michel/actia-yocto-poky/sources/meta-ti/recipes-kernel/linux/linux-ti-staging_4.4.bb, do_fetch) failed with exit code '1'
NOTE: Tasks Summary: Attempted 1 tasks of which 0 didn't need to be rerun and 1 failed.
NOTE: Writing buildhistory

Summary: 1 task failed:
  /misc/home/michel/actia-yocto-poky/sources/meta-ti/recipes-kernel/linux/linux-ti-staging_4.4.bb, do_fetch
Summary: There was 1 WARNING message shown.
Summary: There were 2 ERROR messages shown, returning a non-zero exit code.

Michel Catudal

ACTIA Corp

TL331: TL331Q1 support the AEC-Q100 or not

$
0
0

Part Number:TL331

Hi  Experts:

I'd like to know if the TL331IDBVRQ1 does support the AEC-Q100 standard or not , I didn't find any formation that this device support Q100.

TPS23841: Evaluation Board

DP83867IS: What is the difference between DP83867ISRGZR and DP83867ISRGZT?

$
0
0

Part Number:DP83867IS

For the DP83867ISRGZ two orderable parts are available (having very different qty = 1 pricing!).

What is the difference between DP83867ISRGZR and DP83867ISRGZT?

LMH6517: SPI problem

$
0
0

Part Number:LMH6517

Hello!

I am trying to program the gain of the LMH6517 via SPI using a beagleboard, but that does not seem to work. I already checked the communication lines on the oscilloscope and everything seem fine, so I would like to know if anyone can help identify what the problem is.There is some fixed gain there because I get an amplified signal out of it, but it does not change. The latch pin should not matter when spi is in use so I wonder what could be happening.

This would be the python code:

from Adafruit_BBIO.SPI import SPI

spi = SPI(1,0) #configure device and bus at beagleboard

spi.msh = 10500000 #clock
spi.bpw = 16 #bits per word

spi.open(1,0) #opens it

spi.xfer2([128,0]) #transmits data

Thank you,

JPL

RTOS/TMS320F28034: SYS/BIOS Memory management

$
0
0

Part Number:TMS320F28034

Tool/software: TI-RTOS

Hello,

I am using SYS/BIOS for one of my project. I come to the point where my L3DPSARAM is getting full. But L2DPSARAM still have space. As below

L0SARAM 00008000 00000800 000006f1 0000010f RWIX
L1DPSARAM 00008800 00000400 00000320 000000e0 RWIX
L2DPSARAM 00008c00 00000400 00000100 00000300 RWIX
L3DPSARAM 00009000 00001000 00000fe5 0000001b RWIX

How I can merge both memory using .tcf file as I am using it to manage?

I tried directly as non-bios but it fives me an error.

It's urgent. Please advise.

Thanks

Jigar

TDA3XEVM: SBL Failure

$
0
0

Part Number:TDA3XEVM

Hi,

I'm trying to build iss_capture_isp_simcop_display,iss monochrome usecases.I have enabled those usecases in uc_cfg.mk make file.

Following errors are observed while booting the board

1.520679 s: CHAINS: Please make sure BSP is build with WDR and LDC enabled !!!
[IPU1-0] 1.520893 s: SYSTEM: NOTIFY: [HOST] is NOT ENABLED in this build !!!
[IPU1-0] 1.520954 s: Assertion @ Line: 199 in system_ipc_bios_ipc.c: (Bool)FALSE : failed !!!
[IPU1-0] 1.521350 s: Assertion @ Line: 199 in system_ipc_bios_ipc.c: (Bool)FALSE : failed !!!

May I know the reason for failure.

Thanks in advance.

Regards,

Anil


TMS570LC4357: GIO deactivation in N2HET

$
0
0

Part Number:TMS570LC4357

Hello,

We would like to have more information about N2HET.

As described in the Referendce manual (Figure 23-1.) the N2HET modules can be turn off via the TO bit in the HETGCR register.

GIO functionality of N2HET module seems cannot be turned off.

Is it possible to put the N2HET pins in N2HET functionality rather GIO functionality (in order to cut-off the GIO functionality) ?

Or is there another means to shut-off the N2HET that TO bit to stop globally the NHET ?

Is the HETPINDIS, the good register to disable the N2HET pins ?
E.g :
- Pin disabled if HETPINDIS at 0x00 + HETDIR at 0x00
- Output buffer disabled (Hi-Z) if HETPINDIS at 0x01 and (nDIS at 0x00 or HETDIR at 0x00 or HET Pin ENA at 0x00)

Best regards,

Christopher

RTOS/66AK2H12: How does the ARM of the 66AK2H12 processor enter the security state from an non-security state?

$
0
0

Part Number:66AK2H12

Tool/software: TI-RTOS

I used the 66AK2H12 Evaluation Module (EVMK2H)and started it in DSP SPI-boot mode. Since the ARM is in an non-security state after power-on, how to switch from an non-security state to a security state? Looking forward to your answer!

LMG5200: [Design Help] Half-bridge for high frequency DC-DC converter

$
0
0

Part Number:LMG5200

Hello,

I am designing a buck converter (non-isolated) with following specification:

Vin = 24V 

Vout = 5V

fsw = 10 MHz

The inductor is going to be planar inductor (spiral with increasing track width). I was asked to choose a half-bridge with an integrated gate driver (preferably GaN devices) and LMG5200 80-V, 10-A GaN Half-Bridge Power Stage is all I could find using TIs designing tools. The reason I cannot use this is because it is impossible to solder in our lab (we lack the necessary technology). Is there a different package available?

Or half-bridges in different technology other than GaN that meets my demands?

Regards,

Girish

CD74HC4059: Strange Output of Frequency Divider

$
0
0

Part Number:CD74HC4059

Hello,

I have this frequency divider circuit (see below) that takes a sine wave input and divides the frequency by different values using jumpers. The signal looks clean and consistent through each device until it goes through the HC4059; after which the signal is very inconsistent. I've tried several different things and can't seem to find a fix. The only thing I can think of is maybe the small duty cycle is causing errors? Please help!

I've attached a small .docx file containing images and descriptions. 

(Please visit the site to view this file)

TMS320F280049: eCAP value is zero sometimes when capture PWM

$
0
0

Part Number:TMS320F280049

Hi,

My customer use eCAP to capture PWM wave. To count when switch between high and low level to know the time on high and low voltage. It is used to

calculate PWM frequency and duty cycle.

Read value periodically. We find the value is "0" sometimes during low voltage. But no this issue during high voltage.

The count should be some number, but why it's zero during low voltage?

Nothing unusual on waveform. 

Count is zero during low voltage.

LM3671: Is there any describe about the Vref value's error?

$
0
0

Part Number:LM3671

Dears:

From datasheet we can see the value of Vref is 0.5V.

Is there any describe about the Vref value's error, and we can not find in the datasheet.

Could you kindly give some advice? Since customer's design output is not stable and want to know the for calculating.

The below picture is the schematic, pls. kindly help to check it, thanks~~

TM4C123GH6PM: Is it possible to convert GPIO pin to QEI capable?

$
0
0

Part Number:TM4C123GH6PM

Hi,

I'm using TM4C123GH6PM,CCSv8.1.0,TI-RTOS - 2.16.00.08

As per my project requirement I have to use 8 QEI's. But TM4C123GH6PM is capable of 2 QEI . Is there any possibility of making normal GPIO pins as QEI capable for remaining 6 QEI. If not how can I over come this problem. Please suggest me a better solution in this.

Thanks in Advance

Regards,

Yashwanth Kumar Gandeti


TPS25942A: Terminal treatment of TPS25942

$
0
0

Part Number:TPS25942A

Hi

Please let me ask you  about the terminal treatment of TPS25942
If I don't use DMODE, /FLT, PGOOD, PGTH and IMON, 
may I treat those terminal as below?

 DMODE:Open
 /FLT:Open
 PGOOD:Open
 PGTH:Connect ti GND
 IMON:Open

Best regards,
Yokota

TINA/Spice/LM139: TINA not simulating correctly

$
0
0

Part Number:LM139

Tool/software:TINA-TI or Spice Models

I am designing a circuit with the LM139 and wanted to use TINA for the simulation.

LM139 is not part of the TINA distribution so I added its model as described in a tutorial for TINA. The necessary model file was downloaded from the product pages on TI site.

The results of the simulation looked odd to me so I simply copied a circuit from the applications section of the device datasheet (I took the square wave generator example, which happens to be part of my design, but in this case I copied exactly the circuit in the datasheet )

The simulation results are wrong - I get a triangle shaped signal instead of a square wave and voltage levels are wrong.

So my suspicion is that the model file from the site may be wrong.

What can be done to get a correct simulation on TINA for the LM139?

LM2903: LM2903 LM193

$
0
0

Part Number:LM2903

I need to know if TI has additional documentation for LM2903, LM193 that shows certification from independent labs ( UL file number , Applied Research , MET Lab etc. ) that would confirm AEC-Q100 or

MIL-STD-883 standards. We are involved with a testing lab ETL certifying our design which includes these parts and they are disputing the ability of TI to self qualify these parts. I have read the MIL-PRF-38535

document and believe that TI does a good job in this respect. ETL will not accept our design till we can find an independent lab document to support these qualifications. This is the only component stopping

our certification by ETL.

              Thanx Mike Gallagher

MSP430G2553: Code for built-in program on MSP430G2ET LaunchPad?

$
0
0

Part Number:MSP430G2553

Hi there,

Where can I find the code for the program already Flashed into the device on the MSP430G2ET LaunchPad?

I removed the device and plugged it into a breadboard, along with power, ground and an LED+resistor on Pin 1.0, but it didn't flash like it did on the LaunchPad, so I'm wondering if there's another dependency.

Thanks!

Jason

TM4C1294KCPDT: My customer feedback that their system is dead when TM4C1294 power on.

$
0
0

Part Number:TM4C1294KCPDT

Dears: 

My customer feedback that their system is dead when TM4C1294 power on.

Could you kindly help give some suggestion I will check with customer.

Viewing all 262198 articles
Browse latest View live