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Compiler/TMS570LS1227: using –o2 and –o3 compiler does not generate constructor calls (struct is not initialized correctly)

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Part Number:TMS570LS1227

Tool/software: TI C/C++ Compiler

Hi,

I am using CGT v5.2.9.

Can somebody please advise the scope of the issue described in associated SDSCM00040934.

Is it restricted to C++ and constructor call generation, or do I need to consider my use of linker defined symbols in C structure initialisation (both constants in flash and RAM based initialisation)?

Regards, Tony


RTOS/DK-TM4C129X: tiva c series arm MCU

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Part Number:DK-TM4C129X

Tool/software: TI-RTOS

hello :)

i am new with MCU 

and i am trying to find examples to download from the website.

i am working with TIVA-C TM4C129X Developement board

and with IAR embedded workbanch

can someone direct me from where do download this.

thanks.

UCD3138: UCD3138 Successive Approximation Mode issue

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Part Number:UCD3138

Hi Sir:

We are using FRONT END 0 (EADC and DAC together) in Successive Approximation Mode, while we found some timing issue;

when there is bias voltage(around 1V) on EAP0/EAN0 before or during V33 rising, the final SAR calculation is always zero, do you know why? if the bias voltage is unavoidable how to use SAR under this condition? thanks a lot;

waveform is attached; CH1:V33, CH2:EAP0/EAN0;

thanks a lot;

66AK2H12: Remapping by MPAX and EDMA transfer

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Part Number:66AK2H12

Hi,

I would like to use EDMA to transfer data from DDR3A to tree DSP L2 memories.
I know that address extension will be done on MPAX of MSMC when accessing DDR3A with EDMA.

For example, I need to allocate 2GB of DDR3A as the work area of each core.

DSP core1: 0x8_0000_0000 - 0x8_7FFF_FFFF
DSP core2: 0x8_8000_0000 - 0x8_FFFF_FFFF
DSP core3: 0x9_0000_0000 - 0x9_7FFF_FFFF

In this case, when transferring data by EDMA from the work area of each core to own L2 RAM, I think that it is necessary to remap the work area by MPAX of MSMC.
Is my thinking correct? I would like to do EDMA transfer without remapping as much as possible, do you have any good ideas?

Although accesses to 0000_0000 through 0BFF_FFFF are constrained by MPAX of XMC, does this also apply to MPAX of MSMC?
[7.3.2.1.3 Address Ranges Unaffected By MPAX](SPRUGW0C)


Best Regads,
H.U

LED171596A: facing I2C device address problem

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Part Number:LED171596A

HI,

     I am using 3 IC s for RGB lines but we are facing I2C device address inconsistent ,when i do I2C read it showing proper but led's are not glowing.

Thanks,

Balajiganesh.p

TMS320F28034: LIN port has communication problems when electromagnet work

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Part Number:TMS320F28034

When the electromagnet is working, LINTXA and LINRXA communication is not normal

When the electromagnet is working, SCITX and SCIRX communication is normal.

The schematic  is as follows:

 The abnormal waveform is as follows(green is LINTX and yellow is LINRX):

The normal waveform is as follows(green is SCITX and yellow is SCIRX)

PCB Layout(LIN port)

Product MSP430FR5972IPMR export control restrictions???

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Part Number:MSP430FR5972

Hi!
I am Ukrainian!
I live in Ukraine, the city of Kiev.
I have nothing to do with Russia !!!!!!!!!!!!

I bought from you three times orders.
MSP430FR5972IPMR - Ultra Low Power Micro Controller

Today I could not buy anything, because when you make an order you write to me:
"...Product MSP430FR5972IPMR cannot be shipped to nor purchased by country Ukraine due to export control restrictions. Please remove this product from your cart..."

what happened ?
Why can not I buy these chips?
I do not use them for military or automotive applications, I make chargers for lead batteries.
please help me

DS90UB940-Q1: DS90ub940 get resolution

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Part Number:DS90UB940-Q1

Hi,

in DS90UB940 manual I found the following:

8.4.4 Input Display Timing
The DS90UB940-Q1 has built−in support to detect the incoming video format extracted from the FPD-Link III
datastream(s) and automatically generate CSI-2 output timing parameters accordingly. The input video format
detection is derived from progressive display resolutions based on the CEA−861D specification. The video data
rate and frame rate is determined by measuring internal VS and DE signals.

I am wondering if I can get video data and frame rate somewhere in the registers.

Thanks in advance for the help.


DS90UB927Q-Q1: LINK Detect Detail Conditions

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Part Number:DS90UB927Q-Q1

[ DS90UB927-Q1 ] LINK Detect Detail Conditions

Hi,

Can you please let me know the detail condition where DS90UB927-Q1 detects the link fault?



Does DS90UB927-Q1 monitor the voltage at DOUT+/- pins and compare with reference voltage?
Or detect based on the CRC error on the backchannel communication?

Thank you for your help in advance.
Regards,
Ken

Searching for SN65ALS543 Datasheet

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Need a datasheet for SN65ALS543. The website doesn't have any mention of it. 

Compiler/MSP430FR5994: static_cast(int) returns always 0

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Part Number:MSP430FR5994

Tool/software: TI C/C++ Compiler

I don't understand why the operator static_cast<color>(1) returns 0 (see the code below).


#include <cstdio>
#include <msp430.h>

/**
 * hello.c
 */

enum class color: unsigned char
{
    red = 1,
    green = 2,
    blue = 4,
};

int main(void)
{
    color c;

    WDTCTL = WDTPW | WDTHOLD;    // stop watchdog timer

    c = color::red;   printf("Red   = %d\r\n", static_cast<int>(c));
    c = color::green; printf("Green = %d\r\n", static_cast<int>(c));
    c = color::blue;  printf("Blue  = %d\r\n", static_cast<int>(c));
    printf("\r\n");

    c = static_cast<color>(1); printf("Red   = %d\r\n", static_cast<int>(c));
    c = static_cast<color>(2); printf("Green = %d\r\n", static_cast<int>(c));
    c = static_cast<color>(4); printf("Blue  = %d\r\n", static_cast<int>(c));
    printf("\r\nEnd\r\n");

    return 0;
}

/*
Console:

Red   = 1
Green = 2
Blue  = 4

Red   = 0
Green = 0
Blue  = 0

End
*/

/*
Compiler version: TI v18.1.4.LTS

Compiler flags:

-vmspx
--data_model=restricted
--use_hw_mpy=F5
--include_path="${CCS_BASE_ROOT}/msp430/include"
--include_path="${PROJECT_ROOT}"
--include_path="${CG_TOOL_ROOT}/include"
--advice:power="1,2,3,4,5.1,5.2,6,7,8,9,10,11,12,13,14,15"
--advice:hw_config=all
--define=__MSP430FR5994__
--define=_MPU_ENABLE
-g
--printf_support=minimal
--diag_warning=225
--diag_wrap=off
--display_error_number
--enum_type=unpacked
--silicon_errata=CPU21
--silicon_errata=CPU22
--silicon_errata=CPU40
*/

/*
Linker flags:

-m"${ProjName}.map"
--heap_size=300
--stack_size=160
--cinit_hold_wdt=on
-i"${CCS_BASE_ROOT}/msp430/include"
-i"${CCS_BASE_ROOT}/msp430/lib/5xx_6xx_FRxx"
-i"${CCS_BASE_ROOT}/msp430/lib/FR59xx"
-i"${CG_TOOL_ROOT}/lib"
-i"${CG_TOOL_ROOT}/include"
--priority
--reread_libs
--define=_MPU_ENABLE
--diag_wrap=off
--display_error_number
--warn_sections
--xml_link_info="${ProjName}_linkInfo.xml"
--use_hw_mpy=F5
--rom_model
*/


Linux/AM5728: Kernel booting is too slow

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Part Number:AM5728

Tool/software: Linux

Hello,

I am looking for the reason why it takes more than 4 seconds for jumping to kernel from u-boot which is shown as the following: 

[2018-11-13 17:00:03.198] Loading Device Tree to 8ffe3000, end 8ffffe88 ... OK
[2018-11-13 17:00:03.208]
[2018-11-13 17:00:03.208] Starting kernel ...
[2018-11-13 17:00:03.210]
[2018-11-13 17:00:07.557] [ 0.000000] Booting Linux on physical CPU 0x0
[2018-11-13 17:00:07.562] [ 0.000000] Linux version 4.9.65-rt23-g7069a470d5 (hwyang@ubuntu) (gcc ve

I guess there are some wrong hardware configuration because it is extremely slow to take 4s for booting kernel. Maybe I didn't format or write the EMMC flash correctly? Thanks for any comment.

Regards,
Hungwei

LM25010: burns out

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Part Number:LM25010

Good morning,

our customer has reported following issue: after several weeks of operation, the LM25010 burns out (please, see attached picture).

Nominal power supply: 24V

We don't know the supplied current (we are gathering this data).

The LM25010 is used to generate +12V and -12V (please, see attached schematic)

are there any macroscopic errors before I start to simulate the circuit?

The customer suspecs possible input surge/burst over 50V

Thank you in advance for your help.

Regards

Riccardo

MSP432P401R: Issue related with MSP432P401R microcontroller

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Part Number:MSP432P401R

As you can see in the below code i did not get any errors. But even though without errors i still dont see my data written into the flash in the memory browser. Can you help me out  where im doing wrong. the screen shots and code is below. As you can see in the first screen shot there is no errors, but in the second the data 0x47 should be written but in the memory browser its only "F's" and im running CCS v8 with MSP432P401R red board.

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#include <ti/devices/msp432p4xx/driverlib/driverlib.h>
/* Standard Includes */
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
unsigned intj= 0;
intmain(void)
{
   WDT_A_holdTimer();
   // make sure green led is off
   // flash red led to show reset occured
   P2OUT &= ~0x02;     //TURN OFF THE GREEN LED
   P1DIR |= 0x01;
   P1OUT ^= 0x01;      //TURN RED LED ON
   //delay_1sec();       //wait 1 second
   for(j=0; j< 100000; j++);
   P1OUT &= ~0x01;     //turn red led off
   uint8_t data_value = 0x47;  //the data to be written to flash
   // init watchdog timer, source: smclk, 8192k clock iterations(about 4 secs), soft reset
   WDT_A_setTimeoutReset(WDT_A_SOFT_RESET);
   WDT_A_initWatchdogTimer(WDT_A_CLOCKSOURCE_SMCLK, WDT_A_CLOCKITERATIONS_8192K);
   WDT_A_startTimer();
   while((P1IN & BIT4)==0);   // check to see if user id holding the button, if so trap them and cause reset
  // this array is to make for loop look pretty: contains all sectors locations
  intsector_array[32] = {FLASH_SECTOR0, FLASH_SECTOR1, FLASH_SECTOR2, FLASH_SECTOR3, FLASH_SECTOR4, FLASH_SECTOR5,
                        FLASH_SECTOR6, FLASH_SECTOR7, FLASH_SECTOR8, FLASH_SECTOR9, FLASH_SECTOR10, FLASH_SECTOR11,
                        FLASH_SECTOR12, FLASH_SECTOR13, FLASH_SECTOR14, FLASH_SECTOR15, FLASH_SECTOR16, FLASH_SECTOR17,
                        FLASH_SECTOR18, FLASH_SECTOR19, FLASH_SECTOR20, FLASH_SECTOR21, FLASH_SECTOR22, FLASH_SECTOR23,
                        FLASH_SECTOR24, FLASH_SECTOR25, FLASH_SECTOR26, FLASH_SECTOR27, FLASH_SECTOR28, FLASH_SECTOR29,
                        FLASH_SECTOR30, FLASH_SECTOR31};
  // keep repeating writing flash unitl user forces reset
  while(1) {
   //   delay_1sec();    //wait 1 second
      for(j=0; j< 100000; j++);
      WDT_A_clearTimer();  //rest wdt
      void* dest = (char*) 0x00020000;    //first place in sector 0 of bank 1
      uint8_t data [4096];                  //array which will be filled to program entire memory sector
      memset(data, data_value, 4096);       // fill array with data
      // do the flash stuffs
      inti = 0;
      for(i = 0; i < 32; i++){
          WDT_A_clearTimer();    //reset wdt
          while((P1IN & BIT4)==0);         //check to see if user is holding the button, if so trap them and cause reset
          FlashCtl_unprotectSector(FLASH_MAIN_MEMORY_SPACE_BANK1, sector_array[i]);    // unprotect sector
          FlashCtl_initiateMassErase();     //erase unprotected sectors
          FlashCtl_enableWordProgramming(FLASH_IMMEDIATE_WRITE_MODE);   //allow for immediate writing
          FlashCtl_programMemory(data, dest, 4096);    //write sector
          FlashCtl_protectSector(FLASH_MAIN_MEMORY_SPACE_BANK1, sector_array[i]);   // protect sector
          dest = dest + 0x00001000;     //update flash location to the next sector
}
       WDT_A_clearTimer();
P2OUT ^= 0x02;     //turn on green led
//delay_1sec();
for(j=0; j< 100000; j++);
P2OUT &= ~0x01;    // turn off the green led
}
}

And please do check the console window in this screen shot.

CC2543: The variation of RSSI on CC2543

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Part Number:CC2543

Hello,

Could you give me the reason of RSSI variation on CC2543?

My customers are evaluating CC2543 with CC2543EM and SmartRF studio.
There are two CC2543EMs and one is a transmitter in the "Packet TX" mode and one is a receiver in the "Packet RX" mode.
And they are connected by Coaxial cable through attenuator.
They use the settings based on "Proprietary 2.4 GHz - GFSK, 2Mbps data rate, 500kHz deviation, BT (2420Mhz)" and only change Packet Data Size as 22 and Packet Count as 1000.

The result is attached file.

(Please visit the site to view this file)
Almost of all RSSI is between -38 and -39; however, -18 to -21 appears sometimes.
The irregular RSSI can be seen of about 2%.

We want to know the reason of this result and the solution.

Also, we find that the proportion of this irregular RSSI is high in lower frequency (e.g. 2403MHz and 2413MHz).
We cannot find the irregular RSSI in 2430MHz, 2448MHz, 2464MHz, 2474MHz, 2484MHz, 2494MHz.

Best Regards,
Nomo


WEBENCH® Tools: New WEBENCH® Power Designer: is it possible to add a part?

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Tool/software: WEBENCH® Design Tools

Gentlemen,

I'm trying to simulate my design in Webench power designer. It is a buck converter realised with LMR23630A.

The designer has created a schematic, I can change some components to my custom ones, it works, everything is happy.

Almost happy ... I'd like to add some components to the schematic. For example, a compensation capacitor (not added by the designer), and simulate it's effect.

Is it possible somehow?

TPS7A49: Ground plane area required for achieving R(theta-ja) specified in the datasheet

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Part Number:TPS7A49

As specified in the datasheet of TPS7A49, the R(theta-ja) of DRB (VSON) package is 47.7 deg C/W.

Please let me know the area of ground plane required for achieving the above R(theta-ja).

LMK03318: No output after working for a while

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Part Number:LMK03318

Hi team,

The output may disappear after working for a while. Sometimes it always keeps OK.

The output becomes OK after reset the power supply.

Any suggestion for this?

Robin

How to reduce ringing of the drain voltage in the push pull design

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have tried calculating the resistor value for my snubber but the ringing and peak is again seen in this case.How should i go about designing the resistor?Please help me with regards to this issue?

TAS5755M: Volume Control for PBTL Mode

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Part Number:TAS5755M

Hi,

The output level after DRC1 is difference between the changing ch1_volume and the changing master_volume if using TAS5755MEVM with PBTL mode.
So, what are the possible causes for this symptom ?

Best regards,
Kato

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