Part Number:BOOSTXL-EDUMKII
Hello!
When I try to download examples for BOOSTXL-EDUMKII for Windows, an error occurs: 404 Not Found:
http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/BOOSTXL-EDUMKII/latest/index_FDS.html
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BOOSTXL-EDUMKII: BOOSTXL-EDUMKII example download error
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INA333: how we can verify/read device marking/date code
Part Number:INA333
Dear Mr,
I had received your goods, please see attached file, what is date code and lot no?
Please let me give your advice.
LM2902MX/NOPB
Thank you
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IWR1642BOOST: Log file save of Demo Visualizer 2.0.0
Part Number:IWR1642BOOST
When using mmWave Demo Visualizer for logging the results UART data from IWR1642 EVM, error happens about after 5 minutes.
It seems that there no such issue before, the issue happened recently.
So, what will be the issue with the Demo Visualizer (2.0.0) with the data logging feature?
Can you guide how to get longer time UART result data with Demo Visualizer 2.0.0?
Best regards,
Hayden
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CCS/AM5728: How to eanble L2 cache on AM5728
Part Number:AM5728
Tool/software: Code Composer Studio
In my preview question, I found that my BIOS project didn't use the L2 ram as cache, it case the dsp run slower that DM8148 with the same code
I had try to set L2 memory use as cache fllow by the code I had foun in sprugy8.pdf, but it didn't work.
#include <ti\csl\csl.h>
#include <ti\csl\csl_cache.h>
...
CACHE_enableCaching(CACHE_CE00);
CACHEsetL2Size(CACHE_256KCACHE);
It pass the compile ,but linker can't find the functions. I find th csl dir in pdk install dir.
It would be better for me to eanble l2 cache in BISO config file, can it be done ?
I find the link and try its code , but it didn't work for me
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Linux/DM36XCODECS: dm36x
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CCS/TMS320C6745: Interface spi flash memory
Part Number:TMS320C6745
Tool/software: Code Composer Studio
Hello all Am new to DSP processor and i started with TmS320C6745 processor, I need to interface SPI flash (SST25VF010A) with C6745 processor and need to Create bootloader program to execute our program even after if we remove emulator , how can i do it? is there any specific document to do it? pls guide me, I need yours help....
Thanks in advance..
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CCS/TMS320C5515: SPI slave mode in C5515 DSP
Part Number:TMS320C5515
Tool/software: Code Composer Studio
Hello, we're implementing a SPI slave mode on C5515 chip. However, as document pointed out, C5515 doesn't support SPI slave mode (only master).
Our solution is to use GPIO interrupt to detect sck trigger. The problem is, our SPI can only handle up to 490kHz clock frequency, but our goal is 1.5MHz.
Our interrupt funcion do nothing else but read data from GPIO pin, we have tried interrupt every clock and read one bit or interrupt every 16 bit (length of every command from master).
We have tested that even a single GPIO clear interrupt flag funcion need 87 clocks, our board run in ~100MHz. By calculation it seems impossible to reach 1.5MHz SPI clock rate, yet there are some products on the market that use 55x series does the exact samethihg we are hope to do but can achieve our goal clock rate.
We are wondering if there is anyway to acclerate or other ways to implement SPI slave mode, we are still very new to DSP programming and hope to get some help. Thank you for reading.
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66AK2G12: Questions about DDR3 register calc tool
Part Number:66AK2G12
Hi,
My customer is trying to fill out the required cells in register calc tool. The calc tool is found in the following document.
Now they have some questions :
1. They will use MT41K64M16TW107AIT(DDR3L-1866) with the clock of 666.666 Mhz (1333MT/s). In this case, they will have to set C9 cell to "User defined" and take the required TIMING values from the datacheet to fill out SDRAM Timing Values in the Design Parameter sheet. Correct ?
2.In the Refresh Configuration table in the Design Parameter sheet, what value should be set in INITREF_DIS ? I believe it should be basically set to "Normal Operation", but they has another option "Disable SDRAM Initialization and Refresh". Could you please explain the use case for this ?
3. In the Controller Register sheet, there is a bit field "T_RTW " in EMIF_SDTIM2 Register, and TRM explains that is:
Minimum number of DDR3_CLKOUT cycles between read and write
date phases, minus 1. This is not an SDRAM timing parameter. The
value depends on the board topology supported.
For single rank: reg_t_RTW= (((2*dqs_delay_for_cs0)+tDQSCK+
wr_leveling_tolerance)/clock_period)-1
For dual rank: reg_t_RTW=
((dqs_delay_for_cs0+dqs_delay_for_cs1+
absolute(command_delay_for_cs0-
command_delay_for_cs1)+tDQSCK+
wr_leveling_tolerance)/clock_period)-1
They are not sure what values could be used for dqs_delay_for_cs0, tDQSCK, wr_leveling_tolerance and clock_period.
4. In the Controller Register sheet, there is a bit field "T_CSTA " in EMIF_SDTIM4 Register, and TRM explains that is:
Minimum DDR3_CLKOUT cycles between write-to-write or read-toread data phases to different chip selects, minus 1.
If DDR3L spec defined CAS#- to-CAS# command delay (tCCD)＝4CLOCK, they would apply 3 for this bit filed. Correct ?
5. In the Controller Register sheet, there is a bit field "ZQ_REFINTERVAL" in EMIF_ZQ_CONFIG Register, and TRM explains that is:
Number of refresh periods between ZQCS commands, minus one.
This field supports between one refresh period to 256 ms between
ZQCS calibration commands. Refresh period is defined by the
EMIF_SDRFC[15-0] REFRESH_RATE field.
ZQ_REFINTERVAL = number of refresh periods between ZQCS
commands.
The interval is calculated as = 0.5% / [(Tsens x Tdriftrate) + (Vsens x
Vdriftrate)].
Tsens = max (dRTTdT, dRONdTM) from the memory device data
sheet.
Vsens = max(dRTTdV, dRONdVM) from the memory device data
sheet
Tdriftrate = drift rate in o C/second. This is the temperature drift rate
that the SDRAM is subject to in the application. Vdriftrate = drift rate
in mV/second. This is the voltage drift rate that the SDRAM is
subject to in the application.
Example:
If Tsens= 1.5%/ o C, Vsens = 0.15%/mV, Tdriftrate = 1.2 o C/second
and Vdriftrate = 10mV/second,
Interval = 0.5/[(1.5 x 1.2) + (0.15 x 10)] = 152ms.
Since refresh interval = 7.8µs, ZQ_REFINTERVAL = 152ms/7.8µs =
4C1Fh
Here, they could not fiond Tdriftrate and Vdriftrate from the DDR3L datasheet. Could you please take a look at DDR3L datasheet and let us know if what parameters are used for these variables.
Best Regards,
NK
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CCS/IWR1642BOOST: How to Trigger GPIO when motion detected
Part Number:IWR1642BOOST
Tool/software: Code Composer Studio
Hi TI,
i want Trigger GPIO when motion detected, How i can do this
i configure GPIO
but It's little confusing of source code flow of PPLCount
I need to trigger GPIO when i get my pplCount
thank you for your support
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CCS/TPS65987D: TPS65987D Application Customization tool --- program issue
Part Number:TPS65987D
Tool/software: Code Composer Studio
HI TI,
In the program, I encountered some problems and wanted to be clarified. As described below:
(PWR confg. host only , Output ability 5V@3A 12V@2A )
<Item/sheet --- > Q&A>
1). High/Low Voltage Warning --> When the option is turned on, Warning message will appear in ?
2). High/low Voltage Warning Level --> already has Over voltage Protection Trip Point, What is the difference between the High Voltage Warning Level and Over voltage Protection Trip Point?
3). Set UVP Debounce --> What is the Debounce mean here? Function is?
4). Programmable voltage(power) thershold --> My HW configuration does not control external FET through GPIO, And my biggest output capacity is 24W, how should I do this?
5). Auto Negotiate sink min required power --> According to my output ability, how to set?
5). PD3 Configuration Register sheet --> Support xxxxx message, Will these messages appear in?
6). peek current (duty cycle) -- > What is the duty mean here?
7). Tx Source Capabilities Extende sheet --> <A> Regarding the power part, if I use the internal MOSFET how should I set it? <B> Is this page setting mosfet controlled by GPIO? <C> peek current 1,2,3 What is the location of the corresponding HW?
8). Battery Design capacity / Battery Last Full Charge Capacity / Battery Type --> If not used, Value default is?
BR,
Delun (Please visit the site to view this file)
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TMS570LS1224: Clear RAM when reset TMS570
Part Number:TMS570LS1224
Hi Team,
TMS570LS12x/11x can be reset by several conditions, which reset can clear RAM? If customer can clear the specific RAM address and how to do that?
Thanks
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BQ24610: About Inductor selection
Part Number:BQ24610
Dear experts, I use the bq24610 to charge 4-series Li-iron battery. The external DC adapter will select 19V or 24V product. The charging current will set 800mA or 1.5A. The PACK+ voltage will set 16.8V. From TI datasheet, It suggest to use 6.8uH inductor(If charging currrent is 2A). If I change inductor from 6.8uH to 10uH, is it suitable? Does it will cause any defect or fault on system operation? Because I want to increase the inductor value to see the result of EMI radiation. Maybe it wil have improvement to reduce the system EMI. On the other hand, I will reduce external DC Adapter voltage from 24V to 19V to see the EMI field intensity(I already add the snubber and gate resistor, but EMI test is still fail.). Regards.
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SN74LVC16245A: SN74LVCH16245A & SN74LVC16245A difference
Part Number:SN74LVC16245A
What's the difference between SN74LVCH16245A and SN74LVC16245A
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Ask 1kW ac to dc solution
Hi sir,
Does Ti have reference design or recommend for the following AC to DC spec
Input :85~264VAC
Output:12VDC (1kW)
PFC+LLC or efficiency need to over 88%
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TPS7A19: input short test issue
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TPS54240: IMDS data for TPS54240DGQR and LP2951ACM-3.3
Part Number:TPS54240
Hi all,
My customer need MDS data from IMDS system about TPS54240DGQR and LP2951ACM-3.3. They have a customer ID 74494. Can we enter their account# in IMDS system so they can get MDS data about the two devices? Thanks for your kindly help.
Somebody have similar issue in below link...
Best regards,
Gary Teng
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TPS65217: AC and USB switching
Part Number:TPS65217
Hi
The customer intend to use TPS65217 under the following condition.
- Battery is absent
- AC is prioritized over USB
Question
1.
Could AC_EN and USB_EN be turned off automatically if the input absence is detected?
2.
Is it possible that the leak current from USB to AC pin could be flowed when AC_EN and USB_EN are 1? (AC and USB are shorted?)
The reason why they have second question is that they concern possibility of reset
could occur when power input is switched from AC to USB.
3.
Can we switch input from AC to USB without Vsys voltage droped?
BestRegards
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TPL0102-100: Sch review
Part Number:TPL0102-100
Hi Team,
I use TPL0102 in output of positive/negative converter, in the past I was problem to connect potentiometer to third pin it will be nice if you recommended who to connect.
Attached the schematic.
Thanks,
Shlomi
(Please visit the site to view this file)
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UCC28070A: Calculation sheet sluc114
Part Number:UCC28070A
Hello.
Thank you for the data of Mathcad calculator the other day.
I calculated using this.
Also, we designed the same specifications using WEBENCH.
As a result, it became a big difference design.
Choke coil value is about 10 times (MathCAD: 22 μH versus WEBENCH: 220 μH) There is a difference.
Also, the choke coil selected by WEBENCH has a very small rated current of 3.5 A is selected.
Actually I think that it is necessary to have a peak of 30 A class.
Is it possible to send design data of WEBENCH and MathCAD and see which design is better?
Please let me know your email address if possible.
Thank you.
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ADS1262: Switching the multiplexer
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