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Need to generate a single hex file .

August 15, 2018, 11:41 pm
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Hi,

   I  need to generate a single hex file from all different projects that we created  in CCS.How is it possible???If possible ,What is the settings in CCS or any tool is available???

Regards

Arun

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TLK10232: TLK10232

August 15, 2018, 11:42 pm
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Part Number:TLK10232

HI,

   Could I use TLK10232 as 10G LAN 3R application? It it can do this, how to process REFCLK? Do I need use CLK output through de-jitter?

Thanks 

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CCS/TMS320F28377S: Transmit and Receive CAN Messages

August 15, 2018, 11:44 pm
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Part Number:TMS320F28377S

Tool/software: Code Composer Studio

Hi everyone,

I established CAN communication using can_external_transmit code and ixxat usbtocan converter and I saw the messages on Minimon v3. And now, I want to establish CAN communication with DCAN_Boot.c example or flash_kernel_code examples. Is the transmiting and receiving message logic same ? In sci_flash_kernel code example, there are GetPacket and SendPacket functions. But in can flash kernel examples, GetPacket and SendPacket functions don't exist. Can I see the messages only using GetWordData and SendWordData functions ?

Thanks and Regards. 

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TUSB544: TUSB544 in cable application.

August 15, 2018, 11:47 pm
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TMS570LS1224: TMS570LS1224

August 15, 2018, 11:48 pm
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Part Number:TMS570LS1224

Need details for CPU Illegal Operation and Instruction Trapping, what is required for handling this?

Requirement from safety manual:

The Cortex-R4F CPU includes diagnostics for illegal operations and instructions that can serve as safety mechanisms. Many of these traps are not enabled after reset and must be configured by the software. Installation of software handlers to support the hardware illegal operation and instruction trapping is highly recommended. For more information on enabling traps, see the Cortex-R4 and Cortex-R4F Technical Reference Manual located at infocenter.arm.com/.../index.jsp. Examples of CPU illegal operation and instruction traps include: • Illegal instruction • Floating-point underflow and overflow • Floating point divide by zero • Privilege violation

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LM358: LM358 output question

August 15, 2018, 11:50 pm
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Part Number:LM358

Hi Team,

 

Sorry to bother you.

We use LM358 to do comparator application (V+ 5VSB and V- GND). Currently, the measured result on pin7 is 3.72V.

As we can see from datasheet, it define the minimum voltage range of Voh is Vcc-1.5V, but we can’t find the data of maximum voltage range.

We have two questions as below, may I have your comment? Thanks for your help and time.

 

  1. Per my understanding, the output voltage range on pin7 is 3.5V~5V, am I correct?
  2. May I know how to get a stable output voltage on pin7?

 

Yours Faithfully

Redick Lee

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PROCESSOR-SDK-AM335X: About the DDR Frequency setting issue in Am335X Platform .

August 15, 2018, 11:59 pm
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Part Number:PROCESSOR-SDK-AM335X

Hi  TI Expert Team,

I want to modify DDR 400MHZ CLK  for AM3352 Platform 

I follow the egent provide below Sample code information to modified, but  verify the single by Oscilloscope is 300MHZ 

How  to exclude DDR issue?    I would appreciate it if you have any advice for me.   

===============================================================================================

Egent Provide information:

 

The DDR clock rate is set at MLO stage.

 

In SDK default setting, it will support 400MHz for GP-EVM/Starterkit EVM

 

You can check the source code board.c in u-boot folder as below

 

        a. please set the right board ID

        b. set the right DDR Clock setting

 

void sdram_init(void)

{

     if (board_is_evm_sk()) {

         /*

         * EVM SK 1.2A and later use gpio0_7 to enable DDR3.

         * This is safe enough to do on older revs.

         */

         gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");

         gpio_direction_output(GPIO_DDR_VTT_EN, 1);

     }

     if (board_is_icev2()) {

         gpio_request(ICE_GPIO_DDR_VTT_EN, "ddr_vtt_en");

         gpio_direction_output(ICE_GPIO_DDR_VTT_EN, 1);

     }

     if (board_is_evm_sk())

         config_ddr(400, &ioregs_evmsk, &ddr3_data,

                 &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);

     else if (board_is_pb() || board_is_bone_lt())

         config_ddr(400, &ioregs_bonelt,

                 &ddr3_beagleblack_data,

                 &ddr3_beagleblack_cmd_ctrl_data,

                 &ddr3_beagleblack_emif_reg_data, 0);

     else if (board_is_evm_15_or_later())

         config_ddr(303, &ioregs_evm15, &ddr3_evm_data,

                 &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0);

     else if (board_is_icev2())

         config_ddr(400, &ioregs_evmsk, &ddr3_icev2_data,

                 &ddr3_icev2_cmd_ctrl_data, &ddr3_icev2_emif_reg_data,

                 0);

     else if (board_is_gp_evm())

         config_ddr(266, &ioregs, &ddr2_data,

                 &ddr2_cmd_ctrl_data, &ddr2_evm_emif_reg_data, 0);

     else

         config_ddr(266, &ioregs, &ddr2_data,

                 &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0);

}

#endif



BR

Egbert Liu

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Does this device support other sample rate not defined in the "clock control register"

August 16, 2018, 12:02 am
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Does this device (TAS5719)support other sample rate not defined in the "clock control register"

if i want to use fs = 31KHz, which value should i write to the clock control register.

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UCC28780: UCC28780 OCP Protection

August 16, 2018, 12:05 am
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Part Number:UCC28780

Hi,

There is OPP, PCL for current protection.

The Vcst(opp) range is 0.425V to 0.6V, and PCL value is set to 0.8V.

Could you help explain what is the difference between OPP and PCL?

If the full power is 65W, and the OPP is 78W. When we put a 130W at the output for 10ms, how is the reaction of the current sense voltage Vcst? 0.8V or OPP threshold?

When it will trigger PCL?

Thanks!

BR

Eleven Chen

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ADS58J63: Ground separation for ADS58J63

August 16, 2018, 12:06 am
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Part Number:ADS58J63

Hi,

I am using ADS58J63 in my design. I was planning to do ground separation for Analog and Digital signal lines. I checked the EVM schematic and there no such separation is done. I see in the device pin diagram there are separate AGND and DGND pins. Regarding this I had couple of queries.

1. Are these pins separate internally also so that I can use separate grounds?

2. Or are these AGND and DGND pins are internally connected to same ground and hence separating them externally won't have any effect?

Regards,

Kiran

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TFP401: td(st) condition

August 16, 2018, 12:07 am
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Part Number:TFP401

TFP401 Datasheet is described td(st): 0.25 tpix and Test condition is STAG = low, PIXS = high.

Is td(st): 0.25 tpix timing spec depend on Test condition?

For example, when STAG = High, PIXS = Low, is td(st) spec change?

If Yes, please let me know about td(st) timing spec for the other condition.

Best regards,

Satoshi

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TPS82150: Can TPS82150 be flux cleaned?

August 16, 2018, 12:15 am
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Part Number:TPS82150

 Hello guys,

 One of my customer is considering using TPS82150 now. Then they want to know whether TPS82150 be flux cleaned (Defluxing) or not.

 Could you please tell me the answer? Your reply would be much appreciated.

 Best regards,

 Kazuya Nakai.

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RTOS/CC3220SF-LAUNCHXL: recvfrom/sl_RecvFrom have issue to handle struct sockaddr_storage *src_addr

August 16, 2018, 12:18 am
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Part Number:CC3220SF-LAUNCHXL

Tool/software: TI-RTOS

Hello,

I write one simple code to receive UDP packet, for IPV4/IPV6 portable , I use struct sockaddr_storage to handle and process the sender address,

the code something like below ,

==

struct sockaddr_storage addr;
socklen_t addrLen;

addrLen = sizeof(struct sockaddr_storage);

memset(&addr,0,sizeof(addr));

numBytes = recvfrom(sock_id, buffer,1024, 0, (struct sockaddr *)&addr, &addrLen);

if (numBytes > 0 )

{

       if (AF_INET == addr.ss_family)
       { //process IPV4 ....}

       else if (AF_INET6 == addr.ss_family)

       {//process IPV6 ....}

}

====

the above code, will cause the sender address (addr) always be 0.0.0.0.

but if I change the

addrLen = sizeof(struct sockaddr_in);

it can success to get the sender address.

My test environment currently only have ipv4 address.

I using CC32xx SDK 2.20.00.10,

Is this a bug or know issue?


wenij

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WEBENCH® Tools/CC2530: How many devices are connected

August 16, 2018, 12:18 am
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Part Number:CC2530

Tool/software: WEBENCH® Design Tools

How can I get the number of devices connected to my coordinator.

How to get number from coordinator??

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ISO7820LL: ISO7820LL - Reliability Data

August 16, 2018, 12:19 am
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Part Number:ISO7820LL

The http://www.ti.com/quality/docs/estimator.tsp does currently not provide any data about the Digital Isolators. I notice that behavior already in the past and sometime later (few month) the data were available again. Is there a data base available where I can check the values independent of the MTBF estimator?

Currently the device of  interest is:ISO7820LL

Could you please provide me the following Data:

Part number   

MTBF   

FIT   

Usage temp (°C)     

Conf level (%)     

Activation energy (eV)     

Test temp (°C)

Test duration

Sample Size

Number of Fails

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LPV821: High Side Current Sensing Using LPV821

August 16, 2018, 12:22 am
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Part Number:LPV821

Hi,

I am making a high side current sense using LPV821 and Si7948(PMOS from Vishay).

During simulation(Transient analysis) I can see a peak initially. Please see the attached image. May I know is this due to the fault in my circuit or the

way I am doing simulation in TINA is wrong(I am new to Tina). May I know how to sweep the current source from

.2mA to 100mA with a step of 0.005mA.

Regards

Hari

(Please visit the site to view this file)I am also attaching the simulation file along with this.

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AM5728: USB access from DSP

August 16, 2018, 12:28 am
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Part Number:AM5728

Hi Sir,

I am using GPEVM AM572x, I need to access any USB on EVM from the DSP core. Is it possible? If so where can I find the example project for the same if available.

Thanks,

Janardan M

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TPS54427: Schematic review

August 16, 2018, 12:29 am
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Part Number:TPS54427

Please review the attached schematic and let me know of feedback.

Thanks,

Andrew(Please visit the site to view this file)

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CC1352P: Again compile options for Z-Stack 3.10

August 16, 2018, 12:32 am
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Part Number:CC1352P

Help me please to find full list of compile options for Z-Stack 3.10 with TI-RTOS

I can't found it..

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UCC28881: UCC28881 buck converter to output -12V with respect to VIN-

August 16, 2018, 12:33 am
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Part Number:UCC28881

TI tida-01097 single firewire communication chip is bluetooth, is it feasible to use sub-1g chip si4432 (sending data working current in 35ma/10ms)?

Is there a good suggestion that a capacitor be added before LDO?

How to select capacitance?

Thankyou very much.

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