In the software Management Studio ,BQ40Z50-R1 chemic ID number is more than BQ40Z50-R2.Why share the same chemic ID library files,but two different software ID number.
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BQ40Z50-R2 Chemic ID
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TLV2543: TLV2543 application
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TPS25940: Compete with NX5P3290 for type C and PD port load switch application
Part Number:TPS25940
Dear all,
We have application for the typeC and PD application just like below, they need load switch to implement the OTG function, the feature is need have reverse block feature when the input is inserted power source, competitor NX5P3290 has this feature, could you please help check if TPS25940 can work in this situation.
Thanks.
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CCS/MSP430FR2311: GPIO Interrupt Pin 2.6 LPM
Part Number:MSP430FR2311
Tool/software: Code Composer Studio
I'm trying to get the launchpad to go into LPM3 unless it receives a high signal (3.3V) from pin 2.6 ( I have an LED turning on so that I can see it on the launchpad) which is a GPIO interrupt pin.
I have pin 2.6 connected to the ON signal from a xbee module. Not sure if I am setting up my interrupt vector correctly.Thanks in advance.
#include <msp430.h>
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
// Disable the GPIO power-on default high-impedance mode
// to activate previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
P1DIR |= BIT1; // Set P1.0 to output direction
P2DIR &= ~BIT6;
P2REN &= ~BIT6;
P2IES &= ~BIT6; // P2.6 Lo/High edge
P2IE |= BIT6;
P2IFG &= ~BIT6;
__bis_SR_register(GIE); // Global interrupts Enable
}
// Port 2 interrupt service routine
#pragma vector=PORT2_VECTOR
__interrupt void Port2_ISR(void)
{
P2IFG &= ~BIT6; // Clear P2.6 IFG
P1OUT |= BIT0; // led ON
__bic_SR_register_on_exit(LPM3_bits); // Exit LPM3
}
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OMAPL138B-EP: Deepsleep mode: minimum time that DEEPSLEEP pin stay at high state when wakeup
Part Number:OMAPL138B-EP
Hi Ti,
I am using OMAPL138 and turn chip to deep sleep mode by DEEPSLEEP pin, when it wakeup( DEEPLSEEP pin go from low to high state), I would like to to know the minimum time that the DEEPSLEEP pin have to stay at high state.
Thanks,
Nhan
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MSP430FR6047: Problems with the USS LIB test
Part Number:MSP430FR6047
hi,
I tested using USSLIB version 1.40.00.06 and 1.40.00.01.I use the same configuration,However, the zero-flow drift of 1.40.00.06 is much higher than the description in the white paper, which is about 2000ps. The test result of 1.40.00.01 complies with TI's test results. Is there a difference in signal sampling and signal processing between these two versions?
Best Regards
Lucas
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TPS54200: Function question
Part Number:TPS54200
Does TPS54200/01 have Frequency Spread Spectrum to Reduce EMI function (like TPS54202)? Or any pass EMI test report ?
Can running Vin 30V ?
Can pass running Vin 36V one hour ?
TPS92xxx pin out and Components too much, CTMR have Board size and cost Consider and Current Local solution package is SOT-89 (VLED 0.8A no any EMI countermeasures Components need)
Thanks and Best Regards
James Su
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TPS2421-1: Maximum Fault Time
Part Number:TPS2421-1
Hi,
My customer is worrying about what device is damaged by too long fault time set by CCT.
Though CCT is set based on startup time, they would like to know how much derating is.
Their usage conditions are follows;
・RLOAD:22Ω
・CLOAD:40uF
・VIN:16V
・ILIM:4.229A(min)（RSET=53.6K）
・Ta:50℃MAX
Startup Time will be about ten few msec.
On the other hand, we don't know limit of startup time(it can be ten few msec).
Do you have any data which prove what above startup time is safety?
Best Regards,
Kuramochi
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CC1310: Whtat is this error stand for? "../main_tirtos.c", line 3: error #7: unrecognized token"
Part Number:CC1310
I used CCS 7.4 and simplelink_cc13x0_sdk_1_60_00_21 SDK. Just simply input the "packetRx" example without any modificaiton. when I compliered it, reported below error. please suggest how to fix it.
thanks.
"../main_tirtos.c", line 3: error #7: unrecognized token
"../main_tirtos.c", line 3: error #7: unrecognized token
"../main_tirtos.c", line 3: error #7: unrecognized token
"../rfPacketTx.c", line 1: warning #1268-D: null (zero) character in input line ignored
"../rfPacketTx.c", line 1: warning #1268-D: null (zero) character in input line ignored
"../rfPacketTx.c", line 1: warning #1268-D: null (zero) character in input line ignored
"../smartrf_settings/smartrf_settings.c", line 1: error #7: unrecognized token
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TLC5916: TLC5916 special mode problem
Part Number:TLC5916
(Please visit the site to view this file)Dear all
Concerning TLC5916, I have some problem.
Normal mode is good work but it is not enter to special mode.
(CLK,_OE,LE clock is same as datasheet)
* Test Condition
1. SDI, CLK is generated by MCU(I have tried to SPI and GPIO)
2. CLK Frequency : 4KHz (Tested while changing the frequency)
Refer to attahced file
Could you check to this problem, and inform to me?
Thanks and BR
PJ
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Multiplexer for HDMI and SDI outputs
Hi TI,
In our design we are using HDMI receiver IC which gives 8 bit output and SDI receiver IC which also gives 8 bit (actual 10 bit but we are neglecting 2 LSBs) output. At a time,single output is available only and our processor's has 8 bit input port.So we want to multiplex these two 8 bit data.
We have found SN74CB3Q3257, but it is 4 bit only and we have use 2 of them. Is there any 8 bit multiplexer available with TI ?
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CCS/TMS320F28377D: CCS/TMS320F28377D
Part Number:TMS320F28377D
Tool/software: Code Composer Studio
Hi,
We have a batch of TMS320F28377DZWTT that cannot use on-chip Flash of CPU2. CPU1 Flash can be programmed, but CPU2 Flash cannot ( We test CPU2 RAM is ok ). All environments are the same, if I use TMX320F28377DZWTT replace it, then CPU1 & CPU2 Flash can be programmed. I use XDS100v2 & XDS200, CCS 7.1.0 & UniFlash. Is it mean CPU2 Flash can't be connected by Emulator?
The error is shown below:
[2018/3/30 上午11:09:21] [INFO] C28xx_CPU2: GEL Output: Memory Map Initialization Complete
[2018/3/30 上午11:09:21] [INFO] C28xx_CPU1: GEL Output: Memory Map Initialization Complete
[2018/3/30 上午11:09:22] [INFO] C28xx_CPU2: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.
[2018/3/30 上午11:09:22] [INFO] C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.
[2018/3/30 上午11:09:28] [SUCCESS] Program Load completed successfully.
[2018/3/30 上午11:09:40] [INFO] C28xx_CPU2: GEL Output: Memory Map Initialization Complete
[2018/3/30 上午11:09:40] [INFO] C28xx_CPU1: GEL Output: Memory Map Initialization Complete
[2018/3/30 上午11:09:41] [ERROR] C28xx_CPU2: Error: (Error -1135 @ 0xC0CC) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)
[2018/3/30 上午11:09:41] [ERROR] C28xx_CPU2: Trouble Halting Target CPU: (Error -1044 @ 0x0) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)
[2018/3/30 上午11:09:41] [ERROR] C28xx_CPU2: Error: (Error -1135 @ 0xC0CC) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)
[2018/3/30 上午11:09:42] [ERROR] C28xx_CPU2: Unable to determine target status after 20 attempts
[2018/3/30 上午11:09:42] [ERROR] C28xx_CPU2: Failed to remove the debug state from the target before disconnecting. There may still be breakpoint op-codes embedded in program memory. It is recommended that you reset the emulator before you connect and reload your program before you continue debugging
[2018/3/30 上午11:09:46] [ERROR] C28xx_CPU1: Error: (Error -1044 @ 0x0) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)
[2018/3/30 上午11:09:46] [ERROR] C28xx_CPU1: Error: (Error -1135 @ 0x3FF16A) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)
[2018/3/30 上午11:09:46] [ERROR] C28xx_CPU1: Unable to determine target status after 20 attempts
[2018/3/30 上午11:09:46] [ERROR] C28xx_CPU1: Failed to remove the debug state from the target before disconnecting. There may still be breakpoint op-codes embedded in program memory. It is recommended that you reset the emulator before you connect and reload your program before you continue debugging
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005F444@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0005F444@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x00130@Program: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error writing the PLL values. (Flash algorithm returned error code). Operation cancelled.
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005D200@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: File Loader: Memory write failed: Unknown error
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read register PC: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005F800@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x00000@Program: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Cannot enable while the target is disconnected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0005F444@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005F444@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0005F444@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Failed to run target while trying to execute pwrite_en.alg
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Flash operation timed out waiting for the algorithm to complete. Operation cancelled.
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005F444@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0005F444@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005D200@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x5D200@Program: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Flash Programmer: Unable to acquire the clock semaphore. The other core might still be accessing the clock registers. Operation Cancelled.
[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write register PC: target is not connected
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TMS37157: eZ430-TMS37157
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LMG3410: LMG3410 EMI issue
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DS90UB921-Q1: Opening Placement Size
Part Number:DS90UB921-Q1
Hi,
Could you tell me the following opening placement size?
Best Regards,
Kuramochi
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AM4372: GPMC address output delay time
Part Number:AM4372
Hi all,
I have questions about the following parameters.
This is because the output delay time of the address is FI4 + FI5.
That is, the maximum delay time is 13 ns. Is it correct?
Best regards,
Sasaki
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TMS570LS1114: @QJ WANG Summarizing Bootloader issues and thank you
Part Number:TMS570LS1114
Dear Expert.
Thank you for these days of patient solutions.
First, I want to say that you are right. In fact, Bt Code is no problem. The problem bothers me due to the board we design. Now, I rewrite some configurations to replace it, The Bt and PC can communicate successfully.
And Only 16 bytes data transmit still exist,So what should I do next.
Thanks and Regards.
Qiuchi
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LM5088: External Supply voltage to LM5088
Part Number:LM5088
Hi,
We are designing a Buck controller for driving dc motor in single direction.
We are currently using LM5088 and external N channel Mosfets.
I want to design a buck regulator with a still higher voltages.
Input will be around 100vdc and output will be 1.5v to 42vdc.
I can give an external supply 15vdc / 24vdc / 5vdc etc that is not a problem.
Is it possible to design with supply voltages externally to controller and the DC bus rail only connected to mosfet.
If yes is there any cheaper alternative to LM5088 for the same.
Kindly advise
Regards
Atul Bhakay
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LM48511: Vfb Feedback Pin reference voltage
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CC1310: Searching guidance for the simulating I2C protocol using GPIO of CC1310
Part Number:CC1310
Hi, champions,
The case in here is that I have need to receive two sources of I2C data using one single CC1310 launchpad, as you've known here, only one I2C interface were provided in each launchpad so I'm wondering if
there're any possibilities that I can use GPIOs to simulate I2C, and, if it's practical, could anyone kindly offer me some guidance or examples here, really appreciate it!
BR,
Alan Xie
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