Quantcast
Channel: Forums - Recent Threads
Viewing all 262198 articles
Browse latest View live

LM5050-1: GATE pin voltage

$
0
0

Part Number:LM5050-1

Hi

I have a question about GATE pin voltage. VGS is defined as below on the datasheet.

Does this mean that VGS is kept as the above voltage(12V typ @VIN=12V~75V) even if VIN is 12V~75V?

If it so,can we lower the GATE pin voltage beause we want VGS to be more than 12V?

How VGS is determined?

Regards,

Koji Hamamoto


CC2540: cc2540 dongle Host test packet loss

$
0
0

Part Number:CC2540

As title,

I used cc2540 dongle and HostTest project as a central.

I used  BTOOL to connect peripheral and dongle and then started notification from peripheral to central, I found that there are some packets loss.

However I use sniffer to observe that whether  the peripheral miss any packets sending, and the answer is that peripheral didn't miss any packets.

So I'm thinking that the problem is on HostTest project, maybe the project had some sleeping code in the source code.

Is there anyone can help me to fix the problem ?

TPS543B20: About RSP/RSN pin connection and layout

$
0
0

Part Number:TPS543B20

Hi,

Could you tell me the notes of the connection guideline and layout guideline of the RSP/RSN pin.
Also please give me the material related to it.
Customers use remote sense (differential) DCDC for the first time.
Therefore, I would like to introduce the you have materials.

Best Regards,
Yusuke/Japan Disty

CC1310: chip not recognized by debugger

$
0
0

Part Number:CC1310

Hello!

I made a new version of my custom board with cc1310 4x4 and it's not working (chip not recognized by CCS, Smart RF...).

My previous board works fine. Changes in new version: 24 MHz crystal moved, 0 Ohm resistors removed, antenna changed.

Voltages on cc1310 pins looks correct:

11 (VDDS) - 3.17V

12 (DCOUPL) - 1.27V

18 (DCDC_SW) - 1.67V

19 (VDDS) - 3.15V

21 (NRESET)  - 2.86V

27 (VDDS) - 3.17V

28 (VDDR) - 1.67V

32 (VDDR) - 1.65V

I checked connection between JTAG/RESET pins on cc1310 and debug probe (i used cc1350 LP) - it's ok.

I tried to remove 24 MHz crystal (to force internal RC OSC) - no success, chip still not recognized.

What else can i check?

My gerbers in attach (cc1310 part is on bottom): (Please visit the site to view this file)

 

RM48L930: how to combine os_heap with sysmem, or eliminate one of these heaps?

$
0
0

Part Number:RM48L930

Support Path: /Product/Help with Device Selection/

Hello,

I am running a CCSv7 project built with HALCoGen and FreeRTOS.  In the project properties, under ARM Linker - Basic Options, the Heap Size for C/C++ dynamic memory allocation is set.  This memory is located in .sysmem and following a build the location of .sysmem  is visible in the created .map file.  The malloc() function in the runtime support library (rtsv7R4) (file = memory.c) uses this heap area.  And the C++ operator 'new' works as expected in my code.

Notice also that in FreeRTOSConfig.h the configTOTAL_HEAP_SIZE setting.  The HALCoGen code in os_heap.c uses this to create its own heap (ucHEAP[]) that is used by pvPortMalloc().  And pvPortMalloc() also works as expected.  Note that FreeRTOS uses pvPortMalloc() when creating tasks and OS objects.

So in my current setup I have 2 different heaps, which appears very wasteful of limited RAM if each is lightly used.  Why does HALCoGen have a heap separate from the runtime library?  Can I merge these 2 heaps so to minimize my memory footprint?  Do you recommend that application code never call pvPortMalloc() and instead use the malloc() from the RTS lib (memory.c)?

Thank you,

Keith

CC1310: Bogus CCFG in nortos project in SDK 1.50

$
0
0

Part Number:CC1310

Hi, I'm having trouble programming firmware through the bootloader. I eventually narrowed the problem down to what appears to be bogus CCFG section in the hex file. In a good project (from a pre-SDK project), the last 128 bytes of the CCFG page in the hex files are

ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff ff ff ff ff ff 00 00 80 01 10 00 88 ff fd ff 58 00 3a f
f bf f3 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff c5 06 fe c5 ff ff ff ff 00 ff ff ff c5 00 c5 ff 00 00 00
ff 00 00 00 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

This looks okay. For example, the first non-ff bytes are contain 01 and 0x8000000 which are SET_CCFG_EXT_LF_CLK_DIO and SET_CCFG_EXT_LF_CLK_RTC_INCREMENT.

The same bytes in a hex file from an SDK 1.50 project that started as one of the RF nortos examples, I got

ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff ff ff ff ff ff 00 10 fd 3a ff ff ff ff ff ff ff ff c5 f
f 00 c5 00 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

This seems wrong. The on-board bootloader refuses to program this into the device (which is probably a great thing otherwise the chip would be bricked due to the incorrect configuration of the bootloader backdoor).

Any idea what might be causing the file to be generated this way? The ccfg.c file seems fine.

Thanks, Sivan Toledo

RTOS/CC2640R2F: Unable to Build the simple_broadcaster_cc2640r2lp_stack_library in simplelink_cc2640r2_sdk_1_40_00_45 ?

$
0
0

Part Number:CC2640R2F

Tool/software:TI-RTOS

Hi,

I have imported Simple Peripheral Example from simplelink_cc2640r2_sdk_1_40_00_45 to CCS work-space  ,

 Clean option is not actually building the BLE stack and there is no any hex file being made. 

I tried building individually but the simple_broadcaster_cc2640r2lp_stack_library  is not an Active, its always shown in the App as in the screenshot.

Please help me out with this, I changed to CC2640R2 because of the ROM limitation in CC2640 , and we are running out of time.

RTOS/TMDSICE3359: UART example questions

$
0
0

Part Number:TMDSICE3359

Tool/software:TI-RTOS

Hello experts,

I created PDK example projects using pdkProjectCreate.bat file for AM335x icev2AM335x. Imported and compiled UART_BasicExample_icev2AM335x_armExampleProject project. I followed instruction provided in "Rebuilding The PDK" wiki page to debug. I need extra information to successfully test the application. Information like which uart has been used (I assumed uart0 which I connected to com port via MAX ). I don't see any data in the terminal. 

It would be very helpful if there is any AppNote which clearly explains how to run this example project. Without running this basic projects I can't move further on my task. Kindly guide me through this issue. Thank you!

Note: I just started working with TI boards from last week so all my doubts might sound lame.

Best regards,

Vinay


CC2640R2F: SNV one ID 255 bytes full

$
0
0

Part Number:CC2640R2F

Dear friends,

SNV's each ID has maximum 255 bytes in default. So in that case, if customer keeps writing on the same SNV ID again and again and again and again, finally it will be full. If we use only one SNV ID, 80% occupation of 4K SNV will never happen, compact will not execute, so what will happen? We are not able to write to the same SNV ID anymore?

If we could not write to the SNV ID anymore, what else we can do if we still want to use the same SNV ID?

Thanks!

AMC7812: input impedance of the AD channels

$
0
0

Part Number:AMC7812

Hi 

I saw in the AMC7812 datasheet (pag.29) that "if the signal source has high impedance it is recommended to buffer the analog input before applying it to the ADC".

May be that in my project I'll use a voltage divider (about 66k/10k resistors) to read signals at 24 Vdc but for the moment I'm not sure...

Please, could tell me which is the limit for the impedance of the signal source that it is not necessary the use of the buffer?

Thank you, Nicola

RTOS/IWR1642: How to make us level delay

$
0
0

Part Number:IWR1642

Tool/software:TI-RTOS

I want to make 10us level delay in a task for the external chip, but I don't want change the timetick value of the project. How to have a delay?

like this

GPIO=1;

delay_us(10);

GPIO=0;

CC1310: UART callback mode

$
0
0

Part Number:CC1310

Hi Dear guys,

My customer has a question of the UART callback mode:

for the readcallback function, when will it be triggered? When the receiving data length meets defined ISR buffer size in the code? If so, does it have a timeout if the receiving data length never meets the ISR buffer size?

thank you!

WL1837MOD: Coexistence Implementation Details

$
0
0

Part Number:WL1837MOD

Hi Team,

My customer would like to know if the WL1837MOD implements all of the following as part of the WiFi/BT coexistence mechanism:

“As part of the coexistence solution the Bluetooth Module shall implement, at minimum, the following:
• Time Division Multiplexing (TDM)
• Adaptive Frequency Hopping (AFH)
• Channel Quality-Driven Data Rate (CQDDR)
• Arbitration/prioritization between Bluetooth and WiFi
• Dynamic allocation of bandwidth between Bluetooth and WiFi”

Can you please confirm if all of these are met?

Thanks,

Antonio

Linux: How to apply PWM and ADC device driver on ti-processor-sdk by c syntax

$
0
0

Tool/software: Linux

I used ti-processor sdk -linux-am335x v04.02  that i would like to do device driver for detect rising edge and read the ADC immediately also duty.

Are there concepts that can work with this concept?

PACKET-SNIFFER: Export data to excel format

$
0
0

Part Number:PACKET-SNIFFER

Hi everybody,

I want to export data received and display by Packet sniffer in Excel format (Csv for exemple). Have you a solution Please?

Je cherche à exporter les données recues par Packet sniffer en format excel (Csv par exemple) ; Avez vous une solution s'il vous plait?


TUSB3410: Question for OSC

$
0
0

Part Number:TUSB3410

Hi team,

A customer asks if there is a problem when connecting to two TUSB3410s with one oscillator (12MHz/ 30PPM). If it has problem, can you please explain the reason for eliminating the controversy between them?

Thanks,

Sam Lee

MSP430F5325: MSP430F5x Flash based custom UART boot loader

$
0
0

Part Number:MSP430F5325

Hi,

We are planning to create a UART based custom boot loader for MSP430F5325. We cannot use any JTAG lines, we can only use its UART TX and RX pins P3.3 and P3.4. So we are planning to create a custom flash based boot loader which takes bin image from UART and load in to the application area.

Basically we are planning to create a code with UART to take date and flash it into the application area. This will acting as boot loader code and after updating it will jump into the application area.

The linker file of the BL will be only in FLASH location : origin = 0x4400, length = 0xBB80 and our application code linker file will be only in FLASH2 : origin = 0x10000,length = 0x4400.

We have seen some BSL scripter and custom BSL examples, so please let us know how we can use those in our application and it seems like it is using some pins in JTAG which we cant use in our application. So please let us know your thoughts on the above method and let us know if there is any risks.

Thanks

Rahul

INA121: Offset Voltage Specification for GAIN=1

$
0
0

Part Number:INA121

Hi,

I am using INA121U for my design and would like get some clarification on using the Offset Voltage specification in the datasheet.

The first page of datasheet provides "LOW INPUT OFFSET VOLTAGE: ±200uV". For what gain and temperature it is specified?

In page2, Typical Offset Voltage (in uV) at 25C is given as ±200±200/G.

So for GAIN=1 what should I infer from this?

For GAIN=2 what is the typical Offset Voltage (in uV) at 25C?

INA121

Thanks,

Shihab.

MSP432P401R: MSP432 Launchpad

$
0
0

Part Number:MSP432P401R

Hi,

Is ir possible to cut off MSP432 Launchpad at Jumper Block Isolation Line without any issues. What will be the recommended setup for programming it.

Thanks,

Sudhir Gupta

Linux/DRA746: waylandsink: Not able to play video

$
0
0

Part Number:DRA746

Tool/software: Linux

Hello, 

we are trying to play video using below commands, however it is not playing and gives following error. Attached here the complete log. This error comes with specific video format(.wmv) while I am able to play other videos correctly. 

gst-launch-1.0 playbin uri=file:///tmp/SDCard_Slot-1/Guns.wmv.WMV video-sink=waylandsink

etting pipeline to PAUSED ...
Pipeline is PREROLLING ...

(gst-launch-1.0:2567): GStreamer-WARNING **: Failed to load plugin '/usr/lib/gstreamer-1.0/libgst_ia_asfp.so': libgst_ia_asfp_ittiam.so: cannot open shared object file: No such file or directory

(gst-launch-1.0:2567): GStreamer-WARNING **: Failed to load plugin '/usr/lib/gstreamer-1.0/libgstiawmadec.so': libgstiawmadec_ittiam.so: cannot open shared object file: No such file or directory
Redistribute latency...
Pipeline is PREROLLED ...
Setting pipeline to PLAYING ...
[destroyed object]: error 0: invalid format 0x32315559
New clock: GstAudioSinkClock
Got EOS from element "playbin0".
Execution ended after 0:00:07.805685539
Setting pipeline to PAUSED ...
Setting pipeline to READY ...
Setting pipeline to NULL ...
Freeing pipeline ...

gst-launch-1.0 filesrc location=/tmp/SDCard_Slot-1/Guns.wmv.WMV ! qtdemux ! h264parse ! ducatih264dec ! waylandsink

Setting pipeline to PAUSED ...
Pipeline is PREROLLING ...
ERROR: from element /GstPipeline:pipeline0/GstQTDemux:qtdemux0: This file is invalid and cannot be played.
Additional debug info:
/home/buildserver/work/jenkins/var/lib/jenkins/workspace/MMT2020-ADV-R2-5-Release-Builds/project/elina-distro/build-cpm-mmt-2020/tmp/work/cortexa15hf-vfp-neon-elina-linux-gnueabi/gstreamer1.0-plugins-good/1.6.3-r0/gst-plugins-good-1.6.3/gst/isomp4/qtdemux.c(692): gst_qtdemux_pull_atom (): /GstPipeline:pipeline0/GstQTDemux:qtdemux0:
atom has bogus size 807842421
ERROR: pipeline doesn't want to preroll.
Setting pipeline to NULL ...
Freeing pipeline ...

Also, from our media player .wmv files are not playable, but after playing .wmv file not able to play any other file and getting these kind of logs 

223649 2018/03/27 17:45:08.000000 541.9517 116 ECU1 CrM HMPE 2036 log info verbose 1 T2785 GSTLogs WARN ducati gstducatividdec.c(570):codec_process:<decoder> err=-1, extendedError=00001409
223680 2018/03/27 17:45:08.000000 541.9577 121 ECU1 CrM HMPE 2036 log info verbose 1 T2785 GSTLogs WARN ducati gstducatividdec.c(570):codec_process:<decoder> err=-1, extendedError=00040000
223681 2018/03/27 17:45:08.000000 541.9578 122 ECU1 CrM HMPE 2036 log info verbose 1 T2785 GSTLogs ERROR ducati gstducati.c(61):gst_ducati_log_extended_error_info: Bit 18 (00040000): stream end
223684 2018/03/27 17:45:08.000000 541.9603 123 ECU1 CrM HMPE 2036 log info verbose 1 T2785 GSTLogs WARN ducati gstducatividdec.c(570):codec_process:<decoder> err=-1, extendedError=00040000
223685 2018/03/27 17:45:08.000000 541.9604 124 ECU1 CrM HMPE 2036 log info verbose 1 T2785 GSTLogs ERROR ducati gstducati.c(61):gst_ducati_log_extended_error_info: Bit 18 (00040000): stream end

274871 2018/03/27 17:45:28.000000 562.1891 218 ECU1 CrM Glue 2036 log verbose 1 T2331 PlayerIf[Default] << openUri: uri=container://127.0.0.1:13800/usb/F692B29592B259B7/collection/fast%5Fplay/?TITLE=fast%5Fplay&ViewId=0 Version: 18131 Engine: undefine
276316 2018/03/27 17:45:29.000000 562.7778 11 ECU1 CrM Glue 2036 log verbose 1 T2036 PlayerIf[Default] >> setPlaybackStatusAttribute: value=PAUSED
276559 2018/03/27 17:45:29.000000 562.8153 23 ECU1 CrM HMPE 2036 log info verbose 1 T2331 GSTLogs WARN ducati gstducatividdec.c(570):codec_process:<decoder> err=-1, extendedError=00040000
276561 2018/03/27 17:45:29.000000 562.8154 24 ECU1 CrM HMPE 2036 log info verbose 1 T2331 GSTLogs ERROR ducati gstducati.c(61):gst_ducati_log_extended_error_info: Bit 18 (00040000): stream end
278046 2018/03/27 17:45:29.000000 563.2484 41 ECU1 CrM Glue 2036 log verbose 1 T2036 PlayerIf[Default] >> setPlaybackStatusAttribute: value=PLAYING

Could you please suggest us on what might be going wrong?

Thanks & Regards,

Ikshwaku

Viewing all 262198 articles
Browse latest View live


<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>