Part Number:AM3358
Tool/software: Linux
Dear Champs,
Could you please let me know if HW flow control can be used in current 8250 UART driver with DMA enabled in current Linux PSDK 4.0?
My customer is trying to use 8250 UART driver, but found there was an issue in using HW flow control with DMA enabled.
So, they want to know if it was resolved or not.
And, actually they are using Linux PSDK 2.0.2.11 now. Could you please check the patch also?
Thanks and Best Regards,
SI.
Part Number:DP83848I
Dear Sir, please, answer
I use boarde (newly developed by us) with PIC32MZ2048EFH144-I/PH + DP83848iVV (MMI mode). POSC=12MHz. And I tried FRC mode with Fppl = 200MHz.
Based on the project .......\Microchip\harmony\v2_04\apps\rtos\freertos\tcpip_client_server.
MAC driver>External PHY Configuration>External PHY type - National_DP83848.
RMII flags - No checked.
When WEB browser is connected, there are big delays when receiving data on the main page.
Always time is different.
Here is the data of the HTTP Analyzer.
Please, explain, why?
I use PIC32MZ starter kit too and it works well, without delays.
I use TRJ16093BENL connector, please see attach.
The truth is, I do not know where to connect the contact P8 of the TRJ16093BENL. May be to GND оf the my board? But why in that case a transformer? GND of my board should not be earthed for safety reasons.
I have Starter Kit (EF) PIC32MZ and it works without any delays.
(Please visit the site to view this file)
TIA
Sincerely
Vladimir Naumenkov
www.agat.by
Part Number:CC1310
Tool/software:TI-RTOS
Hi,
I'm using the sensor example from the simplelink SDK 1.50 and I need to allocate one Flash Page for my software. So I reduced the Flash size in the .cmd file. The problem is that the programm doesn't fit in the flash anymore when I use the Two Page NV, but it fits when using One Page NV.
As far as I know, it is only possible to delete the Flash page by page. So it is clear how a two page NV could work. For the One Page NV, I'm wondering how this can work.
I can only imaging that new data is written to a place what is still free. But that would mean that the page will be full after some time and the software stops working.
So my question is, how does the One Page NV work and will it work for a long time, or will the page get full and that's it?
Part Number:AM5K2E04
Hi,
a customer of mine has designed a new processor board which is based on a Keystone II device, namely the AM5K2E04. Currently we’re in the bring-up phase of the project, i.e. we’re trying to get all relevant hardware units up and running. Unfortunately, we ran into problems when enabling the PCI Express controllers of the Keystone processor.
Our board acts as a PCIe root complex and uses both PCIe interfaces of the Keystone. PCIe #0 is connected to an FPGA, PCIe#1 is connected to a PCIe switch. Both interfaces use 2 lanes PCIe Gen 2. Our problem is that neither of the PCIe interfaces of the Keystone is able to establish a stable physical connection to its communication partner.
To look into this, we’ve modified the bootloader (UBoot) so that it continuously monitors the state of the PCIe controllers.
The bootloader does the following:
After that, the bootloader enters an endless loop where it continuously reads and outputs a number of PCIe debug registers, most importantly the physical link state (LTSSM) In this loop we can see that the link training takes very, very long (seconds!). And even if the link comes up, it usually breaks down after some time (sometimes seconds, sometimes minutes). All this pretty much non-deterministically.
Because of that, we guess that there’s probably a hardware problem. But how can we proceed to diagnose this?
So our questions are:
Thanks
Part Number:AM3352
Tool/software: Linux
Hi All,
we made a customized board with AM3352 processor, 1GB DDR3 and 512 MB Nand flash. we are using am335x-evm-linux-rt-sdk-src-04.00.00.04.tar.xz and arago-base-tisdk-image-beagleboard.ubi. we compiled and flashed the Linux, filesystem and DTB in NAND Flash.
When we give run nandboot, the following issue occur.
Starting kernel ...
and hangs,
What can be the issue. Where the modification has to be done ?
Regards,
Avinash N
Part Number:TDA3
Hello.
Can you notify VSDK-team about a bug in vsdk301 makefile?
Here are stderr-output from 'gmake -j -s PROFILE=release'.
D:/ti/vsdk301/vision_sdk/build/rtos/makerules/rules_66.mk:181: target `D:/ti/vsdk301/vision_sdk/binaries/apps/tda3xx_evm_bios_all/obj/app_alg_plugins/tda3xx-evm/66/release/GAlignLUT_tda3xx.oe66'
given more than once in the same rule.
D:/ti/vsdk301/vision_sdk/build/rtos/makerules/rules_66.mk:181: target `D:/ti/vsdk301/vision_sdk/binaries/apps/tda3xx_evm_bios_all/obj/app_alg_plugins/tda3xx-evm/66/release/GAlignExt_tda3xx.oe66'
given more than once in the same rule.
D:/ti/vsdk301/vision_sdk/build/rtos/makerules/rules_66.mk:181: target `D:/ti/vsdk301/vision_sdk/binaries/apps/tda3xx_evm_bios_all/obj/app_alg_plugins/tda3xx-evm/66/release/GAlignLUT_tda3xx.oe66'
given more than once in the same rule.
D:/ti/vsdk301/vision_sdk/build/rtos/makerules/rules_66.mk:181: target `D:/ti/vsdk301/vision_sdk/binaries/apps/tda3xx_evm_bios_all/obj/app_alg_plugins/tda3xx-evm/66/release/GAlignExt_tda3xx.oe66'
given more than once in the same rule.
warning: ti.sysbios.family.c66.Cache: "D:/ti/vsdk301/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c66/Cache.xs", line 340: ti.sysbios.family.c66.Cache : Cache settings were
changed in user configuration. User configuration options will override platform settings. Check your memory map to make sure that Cache does not conflict with your L1/L2 memory placement. To avoid
conflicts between L1/L2 memory and cache, we recommended specifying cache sizes along with memory sizes in a platform package.
warning: ti.sysbios.family.c66.Cache: "D:/ti/vsdk301/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c66/Cache.xs", line 340: ti.sysbios.family.c66.Cache : Cache settings were
changed in user configuration. User configuration options will override platform settings. Check your memory map to make sure that Cache does not conflict with your L1/L2 memory placement. To avoid
conflicts between L1/L2 memory and cache, we recommended specifying cache sizes along with memory sizes in a platform package.
The problem file is: 'vision_sdk/apps/src/rtos/alg_plugins/surroundview/SRC_FILES.MK'.
Targets GAlignLUT and GAlignExt both added to 'SRCS_SURROUND_VIEW_GALIGN' and 'SRCS_SURROUND_VIEW_SYTH'.
Both variables used in 'SRCS_c66xdsp_1' and 'SRCS_c66xdsp_2'. The result contains muliply targets.
Suggested patch (changes are marked with yellow) . Both vars (GALIGN and SYTH) are commented with '#' (exclude from build) inside SOC-sections.
---
SRCDIR += surroundview
SRCS_SURROUND_VIEW_SYTH = synthesisLink_algPlugin.c \
SRCS_SURROUND_VIEW_PALIGN = pAlignLink_algPlugin.c \
SRCS_SURROUND_VIEW_ULTRASONICFUSION = uFusionLink_algPlugin.c UFusionExt.c UFusion_bufferZonesLUT.c \
SRCS_SURROUND_VIEW_GALIGN = gAlignLink_algPlugin.c \
gAlign3DLink_algPlugin.c\
svLutGen_If.c \
svBlendTableGen_If.c \
adaptiveBowlLink_algPlugin.c
ifeq ($(EARLY_SRV_ENABLE), yes)
SRCS_SURROUND_VIEW_SYTH += GSynthLUT_default.c
endif
ifeq ($(SOC), tda2xx)
#SRCS_SURROUND_VIEW_GALIGN += GAlignLUT_tda2xx.c GAlignExt_tda2xx.c
#SRCS_SURROUND_VIEW_SYTH += GAlignLUT_tda2xx.c GAlignExt_tda2xx.c
SRCS_SURROUND_VIEW_LUTEXT += GAlignLUT_tda2xx.c GAlignExt_tda2xx.c
endif
ifeq ($(SOC), tda2px)
#SRCS_SURROUND_VIEW_SYTH += GAlignLUT_tda3xx.c GAlignExt_tda3xx.c
#SRCS_SURROUND_VIEW_GALIGN += GAlignLUT_tda3xx.c GAlignExt_tda3xx.c
SRCS_SURROUND_VIEW_LUTEXT += GAlignLUT_tda3xx.c GAlignExt_tda3xx.c
endif
ifeq ($(SOC), tda2ex)
#SRCS_SURROUND_VIEW_SYTH += GAlignLUT_tda2xx.c GAlignExt_tda2xx.c
#SRCS_SURROUND_VIEW_GALIGN += GAlignLUT_tda2xx.c GAlignExt_tda2xx.c
SRCS_SURROUND_VIEW_LUTEXT += GAlignLUT_tda2xx.c GAlignExt_tda2xx.c
endif
ifeq ($(SOC), tda3xx)
#SRCS_SURROUND_VIEW_SYTH += GAlignLUT_tda3xx.c GAlignExt_tda3xx.c
#SRCS_SURROUND_VIEW_GALIGN += GAlignLUT_tda3xx.c GAlignExt_tda3xx.c
SRCS_SURROUND_VIEW_LUTEXT += GAlignLUT_tda3xx.c GAlignExt_tda3xx.c
endif
SRCS_c66xdsp_1 += $(SRCS_SURROUND_VIEW_SYTH) $(SRCS_SURROUND_VIEW_PALIGN) $(SRCS_SURROUND_VIEW_ULTRASONICFUSION) $(SRCS_SURROUND_VIEW_GALIGN)
SRCS_c66xdsp_1 += $(SRCS_SURROUND_VIEW_LUTEXT)
SRCS_c66xdsp_2 += $(SRCS_SURROUND_VIEW_SYTH) $(SRCS_SURROUND_VIEW_PALIGN) $(SRCS_SURROUND_VIEW_ULTRASONICFUSION) $(SRCS_SURROUND_VIEW_GALIGN)
SRCS_c66xdsp_2 += $(SRCS_SURROUND_VIEW_LUTEXT)
---
Also, Can you explain warnings 'conflicts between L1/L2 memory and cache'? These warnings are old and observed in previous releases.
Thank you.
Hello. I am new to this forum and am writing to request your advice please. I’m looking for a battery-less wireless temperature sensor to measure the internal and external temperature of a concrete roof. The structure is located in Western India where temperatures can vary from 12 deg. C. in WInter to 45-50 deg.C. in Summer. It is a very dry climate but in the monsoon months (July-September) there can be a lot of rainfall in one day, so the sensors need to be able to survive these conditions. I want to know the annual surface temperature variation so these sensors need to be left in place for a long time and ideally they require little or no maintenance (like replacing batteries). I’m also looking for a data-logger that these sensors can connect to. I would be grateful for any advice you can give me. Thank you.
Part Number:CC2640R2F
Tool/software:TI-RTOS
Hey, so I'm using this Launch pad http://www.ti.com/tool/launchxl-cc2640r2. I'm currently working with sensor composer studio but can't appear to get an output reading on the I2C Temp & humidity sensor I'm using https://www.silabs.com/documents/public/data-sheets/Si7021-A20.pdf. I've read several forums and Altered the clock frequency and stretch time out to no avail. I have also altered the code several times but the output graph while testing just flat lined bar i2cStatus the outputs a 1 value. Here is my code below. I'd appreciate the help, thanks.
i2cStart();
i2cRepeatedStart();
i2cTx(I2C_OP_READ|Temp_NHM);//0xf3
i2cRxAck(output.Temp);
i2cTx(I2C_OP_READ|Hum_NHM);//0xf5
i2cRxAck(output.Hum);
i2cStop();
// Read the result after 100 milliseconds + a 20% margin
evhSetupTimerTrigger(0, 120, 2);
// Schedule the next execution
fwScheduleTask(400);
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
Part Number:SN74HC4851-Q1
Hi All,
I need to know the Number of transistors in Multiplexer IC - SN74HC4851QPWRQ1 , need for Fit rate calculation.
I couldn't find it in Datasheet or any technical document . Could anyone help me to find it.
Thanks in Advance.
Part Number:TXS0108E-Q1
Hi,
In section 6.3 of the TXS0108E-Q1 datasheet there is a specification for input transition rate to be no greater than 10ns/V for Push-Pull I/O's.
Is there also a transition input rate requirement for Open-Drain I/O's?
Look forward to your response.
Many Thanks,
Bhav
Part Number:CC2650EM-7ID-RD
Tool/software: Code Composer Studio
Hello,
I have this project of connecting a "ATGM336H" (GPS DEVICE) via the 20pin jtag connectors of the "SMARTRF" CC2650.
However, i do not know or have the required codings to enable the smartrf to:
Are there any project examples regarding connection between CC2650 and an external device (in this case, its GPS receiver)?
My aim here is to connect both of them, and then test it out outside by walking for a few kilometres while the data is collected into the receiver. This probes another question which is, do i need to insert any MICRO-SD into the board since data is being collected?
Thanks.
Part Number:ADC128S102QML-SP
Team,
I have seen the below E2E answer already:
https://e2e.ti.com/support/data_converters/precision_data_converters/f/73/p/599103/2202850?tisearch=e2e-sitesearch&keymatch=ADC128S102%20slower%20clock#2202850
I understand that we expect the device to be operated in the condition we describe in the data manual.
But may be we have some more information to share:
-When operating outside of the specified condition (at clock rate between 300khz and 800khz) what would be the typical consequence?
-What effect could appear when operating at such clock frequency?
Thanks in advance,
Anthony
Part Number:AM5718
Tool/software: Linux
Hi Champs,
I've already got a support below, but I have another question.
o GStreamer qp-max-i property
(e2e.ti.com/.../2335057)
I executed a GStreamer pipleline as following that it was suggested in the above thread. However, stiil qp-max-i seemed to be invalid.
Could you please give me some advise?
ducatih264enc bitrate=1024 entropy-coding-mode=1 rate-preset=low-delay qp-max-i=40 qp-min-i=26 profile=main level=level-51 intra-interval=250 rate-control-params-preset= rate-control-params-preset-user-defined
Regards,
j-breeze
Part Number:MSP430F5529
Tool/software: Code Composer Studio
Hi,
I am trying to toggle an LED on the MSP430F5529 Launchpad when a button is pressed. The button is on board the chip, connected to P1.1, and the LED is connected to 1.0.
I am not getting an interrupt for the button press.
My code is shown below. Can you tell me what is wrong?
#include <msp430.h>
/**
* main.c
*/
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // stop watchdog timer
//Switch LED off
P1DIR |= BIT0; // P1.0 is output and the rest are input
P1OUT &= ~0x01;
P1IE |= (BIT1);
P1IES &= (~BIT1); // Falling Edge 1 -> 0
P1IFG &= (~BIT1); // Clear interrupt flag for P2.1
while (1)
{
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0 and wait for an interrupt
__no_operation(); // Set breakpoint >>here<< and read
}
return 0;
}
#pragma vector = PORT1_VECTOR
__interrupt void InterruptVectorPort1()
{
P1OUT ^= 0x01; // Toggle P1.0
P1IFG &= ~BIT1; // Clear Interrupt Flag
}
Part Number:TMS320VC5416
Tool/software: Code Composer Studio
Hello, my name is Alexander. I have a problem with setting up interrupt vectors for external interrupts. I use a SPRA036 document to do it. When i build the project i get the error:
<Linking>
undefined first referenced
symbol in file
--------- ----------------
_c_int2 ./vecs.obj
_c_int3 ./vecs.obj
_c_int4 ./vecs.obj
_c_int5 ./vecs.obj
error #10234-D: unresolved symbols remain
>> Compilation failure
error #10010: errors encountered during linking; "VC5416.out" not built
gmake: *** [VC5416.out] Error 1
gmake: Target `all' not remade because of errors.
**** Build Finished ****
Can someone send me the correct versions of the files, which i attached here? Or can you give me an example?(Please visit the site to view this file) Thank you.
Part Number:MSP-EXP430F5438
Tool/software: Linux
Hi,
I am new to TI microcontrollers and have issues regarding the same.
I am trying to run RIOT-OS on MSP430 and am working on Ubuntu 16.04 using MSPGCC compiler. I tried using MSPDebug for this device " mspdebug uif" but got the error
Unknown device : 0451:f500.
I have tried patching mspdebug from various sources but that doesn't seem to resolve issues either.
Part Number:BQ77905
Hi,
Our customer uses BQ7790502 to protect Li battery, and it can protect battery when SCD, OCD, OTD, OTC, OV or UV occur. The problem is that when fault occurs and the battery is protected, the fault recovers automatically after about 2 ms. Bucause the fault recovery method of BQ7790502 is load removal, so the fault should recover when the load is removed, rather than it recovers automatically.
They tested TI EVM with BQ7790500, on which the fault recover through load removal + delay, and it can keep protection state, and not recover automatically. Then they used BQ7790502 instead of BQ7790500 on TI EVM, however, the fault can also recover automatically. So why BQ7790500 can keep protection state, but BQ7790502 can not keep protection state and recover automatically when fault occurs? I am waiting your reply, thanks!
Note: the screenshot of datasheet of BQ77905 and the customer's schematic as follows.
Part Number:MSP430G2755
Hi,
I have a voltage regulator that will likely have a few 100mV of voltage ripple that will be feeding the MSP430G2755. Is there any concern on normally operation of the MSP430 with this much ripple?
Regards,
Jake