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Compiler/PROCESSOR-SDK-AM335X: GPMC connection to SRAM

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Part Number:PROCESSOR-SDK-AM335X

Tool/software: TI C/C++ Compiler

hi,TI experts

I have a chip named IS62WV1288DBLL-45QLI which is a SDRAM need to be linked to the am335x gpmc, I look at the kernel code and did not find the relevant driver , is there any relevant information can refer to?


DS90CR286A: The Difference between DS90CR286 and DS90CR286A.

WEBENCH® Tools/LM2842: Steady state failed

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Part Number:LM2842

Tool/software: WEBENCH® Design Tools

Dear All

When i try to simulate the LM2842 from Webbench . I am getting Steady state failed. Could i know what is the setting i had to do??

Currently i am using default setting 

Please refer the attachment 

MSP430F5659: Unable to start XT1 (LF Oscillator), XT1LFOFFG = 1

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Part Number:MSP430F5659

Hi,

We are bringing up boards with MSP430F5659 devices which are an alternate for us from the MSP430F5529 devices, and apart from the different device, the crystals, capacitors, etc are identical between the boards.

We can't get the XT1 LF 32.768K oscillator to start on MSP430F5659 despite trying everything from different crystal manufacturers to different capacitor values. The crystal setup and clock setup code work perfectly on MSP403F5529.

There is no errata, no port pins that need configuring and nothing else that we can see that could cause the XT1 not to start.

Would anyone know if there are any specific differences between '5529 and '5659 variants with respect to the TX1?

Thanks

Stomp!

 

AWR1642: About setting Tx output power back-off code for tx antennas

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Part Number:AWR1642

Hello,

I have some issue as my title.

i find the power of two Tx antennas cannot be changed at the same time.please look the fft graph below:

i had changed the back-off code of Tx to 30, i think it means both Tx1 and Tx2 should be reduced 30dB at the same time,

but the changing only show at channels of Tx2. Levels of Rx5-Rx8 are lower than max power 30dB,but Rx1-Rx4 not changed.

My configfile is below:

-------------------------------------------------------------------------------------------------------------

sensorStop
flushCfg
dfeDataOutputMode 1
channelCfg 15 3 0
adcCfg 2 1
adcbufCfg 0 0 1 1
profileCfg 0 77 7 7 58 30 0 68 1 128 2750 0 0 30
chirpCfg 0 0 0 0 0 0 0 1
chirpCfg 1 1 0 0 0 0 0 2
frameCfg 0 1 32 0 400 1 0
lowPower 0 0
guiMonitor 1 1 1 1 1 1
cfarCfg 0 0 8 4 4 0 5120
cfarCfg 1 0 4 2 3 0 5120
peakGrouping 1 1 1 1 255
multiObjBeamForming 1 0.5
calibDcRangeSig 0 0 20 32
sensorStart

-------------------------------------------------------------------------------------------------------------

Is there something wrong? Please tell me the way to change the power of two Tx at the same time.

Best Regards;

Duan

TM4C129XKCZAD: Gpios toggle speed.

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Part Number:TM4C129XKCZAD

Hello Team,

Customer tested on gpio's toggle speed and the result shows around 400nS high and low period.

May i know the max speed gpio's toggle ?

thanks 

Best regards

DRV8835: absolute maximum ratings

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Part Number:DRV8835

Hello,

Are there absolute maximum ratings for AOUT1/2 and  BOUT1/2 voltage ?

Our customer cares about the spike voltage at above output pins that is generated when the motor is suddenly disconnected or some other factor.  

Thanks and best regards,

Hiro

AWR1443: Questions about LVDS configuration for test

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Part Number:AWR1443

Hi champion,
    My customer is trying to connect AWR1443 with their own data capture board through LVDS. In debugging it with SDK 1_0_0_5, they have below questions. Could you help to check them?

 1. How to set LVDS output lane? In SDK, the LVDS default output is 4 lane, while on their board, only 2 lanes are utilized.  Is the only to change line 401 in Cbuff_lvsds.c the loop 4 to 2?

 2. Bit map on different lane? Since chapter 4.1.4.1 in swra555 shows a example of 4 lane bit map for interleaved mode, so how it is with 2 lane only.

 

Thanks,
Adam


Linux/PROCESSOR-SDK-AM335X: Errors running Ubuntu

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Part Number:PROCESSOR-SDK-AM335X

Tool/software: Linux

Hi, 

I am using am3354 platform (512MB & 1GB DDR3) and running Linux 3.12 with uBuntu 14.04.

I am able run Ubuntu image on my LCD and if i touch or run any application, It gets hang or crash my system. 

Xorg is giving segmentation error and again manually i am starting my startx again from my command line and running, but again the same problem. It not stays X window desktop more time in my platform.

Is there any problem for my LCD display (Parallel RGB ) or touchscreen (ti-tsc) or any Graphics drivers.

Please find attached Xorg log for your reference.

The below modules loaded in our platform:-

-----------------------------------------------------------------

root@ubuntu-armhf:# lsmod
Module Size Used by
bufferclass_ti 5405 0
omaplfb 11286 0
pvrsrvkm 175355 2 bufferclass_ti,omaplfb
uvcvideo 66582 0
videobuf2_vmalloc 2577 1 uvcvideo
videobuf2_memops 1276 1 videobuf2_vmalloc
videobuf2_core 24581 1 uvcvideo
cdc_acm 14473 0
wl18xx 82396 0
snd_soc_omap 2494 0
snd_pcm_dmaengine 2997 1 snd_soc_omap
wlcore 166014 1 wl18xx
mac80211 251910 2 wl18xx,wlcore
cfg80211 163054 3 mac80211,wl18xx,wlcore
snd_soc_davinci_mcasp 9484 0
musb_dsps 6511 0
snd_soc_davinci 5438 1 snd_soc_davinci_mcasp
musb_hdrc 42838 1 musb_dsps
snd_soc_core 99221 3 snd_soc_davinci_mcasp,snd_soc_omap,snd_soc_davinci
snd_compress 7419 1 snd_soc_core
regmap_spi 1469 1 snd_soc_core
snd_pcm 66734 4 snd_soc_core,snd_soc_omap,snd_soc_davinci,snd_pcm_dmaengine
snd_page_alloc 4843 1 snd_pcm
snd_timer 16028 1 snd_pcm
snd 45368 4 snd_soc_core,snd_timer,snd_pcm,snd_compress
soundcore 4767 1 snd
ak8975 5031 0
fxos8700 9856 0
wlcore_sdio 4233 0
musb_am335x 1199 0
btwilink 3560 0
bluetooth 204293 2 btwilink
-----------------------------------------------------------------

Regards,

Lofna

(Please visit the site to view this file)

AWR1243BOOST: RadarStudio and TSW1400 Connectivity

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Part Number:AWR1243BOOST

Hi,

I am trying to connect AWR1243 +mmwave DEVPACK+TSW1400 with Radarstudio tool.

I have successfully flashed the TSW1400 board. and able to get connected status in radar studio tool across FTDI, RS232 and SPI. the connection status tab looks fine as expected.

But when I click on any of the 'Set' button in static Config or data config tab, I get an error in output page as if  "Failed: RSP Timeout". The connection page and output page screenshots are attached.

Another point to note is, I have the AWR1443 and AWR1642 boards also. But with those boards, The SPI connection doesnt get connected at all. And anyway I get the same error in the other pages. This is an added point, which I though might help in debug.

Can anyone help me on this?? Can I bypass some of these set buttons and can directly go ahead with some default configurations for data capture??

Any pointers or ideas to try is highly appreciated.

Thanks in advance,

Santhana Raj

Linux/AM3352: Triggering DMA from XDMA pin

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Part Number:AM3352

Tool/software: Linux

Hello,

I can not get DMA transfers to get triggered with GPIO pin or XDMA pin. We use kernel 4.4.41 from TI SDK. We have external device which should trigger DMA transfers. It works if we register interrupt handler for GPIO in Linux and in the interrupt handler DMA transfers are software triggered as memory to memory transfers. But interrupt handling takes to much and jitter is unacceptable so we want to trigger DMA directly. There are some related threads on e2e :

https://e2e.ti.com/support/arm/sitara_arm/f/791/p/593810/2203586 

abcd {
compatible = "abcd";
status = "okay";
dmas = <0x34 20 0 29>;
dma-names = "dma_test";
};

0x34 is reference to crossbar (in this config we wanted to trigger DMA with XDMA_EVENT_INTR1 pin)

we also tried with 

dmas = <0x2d 22 0>;

where 0x2d is reference to edma (in this config we wanted to trigger DMA with GPIO0_7 pin)

we get the channel, for which we have interfaces for device_prep_slave_sg (no reference to mem2mem copy interface - as in the thread mentioned above). So we configure transaction for dma with prep_slave_sg, then we submit transaction but it is never executed. We would like to trigger it with external pin but it seems that something is missing. 

Pins are configured in appriopriate mode for XDMA and GPIO but it seems that events are never registered. When I dump ER register of EDMA3CC I do not see any changes in corresponding bits for events. TRM says that events are registered even if they are not enabled - should I see status change in ER register for any GPIO change? . Is there some configuration that I am missing to trigger DMA from external device? 

Best regards.

SN74LVC2G74: SN74LVC2G74 IBIS model

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Part Number:SN74LVC2G74

Hi all,

I'm trying to download IBIS model for SN74LVC2G74. It seems available from this link:

www .ti.com/product/SN74LVC2G74/toolssoftware

but the download does not start (actually also for other SN74LVC).

CAn someone help me?

Thanks and best regards,

Roberto Carretta

 

DS90UB925Q-Q1: DS90UB925QSEVB could not installed NSC USB Nano driver

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Part Number:DS90UB925Q-Q1

Hi Team,

Our customer is using DS90UB925QSEVB, but he could not  installed NSC USB Nano driver.

There have a similar question on E2E Forum, the customer reprogram the Atmel uC on DS90Ux925 EVM, but it also couldn't work. 

Do you have any comments to solve this issue?  Please let me known.

Regards,

Ricardo

LM27403: LM27403 calculation Excelsheet

WEBENCH® Tools/TPS62202: Export efficiency

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Part Number:TPS62202

Tool/software: WEBENCH® Design Tools

Hi,

is it possible to simply export the converter's efficiency for a wide range of input voltages and output currents (min-max)?

It is more a general question concerning the export funitionality, but i'm especially interested in the TPS62202.

Regards,

Marc 


TMS320DM8148: Does VOUT0 support spread spectrum clocking on DM8148

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Part Number:TMS320DM8148

Hi all,

I checked TRM to find VIDEO0PLL_STATUS register could make sure spread spectrum clocking status on VOUT0.

However, VIDEO0PLL_CLKCTRL register had ENSSC bit to control spread spectrum clocking. But the description seems spread spectrum clocking is not support by VOUT0.

Could you please help to clarify this?

Thanks in advance.

B.R.

OC 

TMS320F28069M: Lab02a - slow acceleration then complete stop after motorID

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Part Number:TMS320F28069M

motorRs calculations vary wildly during motor ID, start with few ohms then goes to less then milliohms, motor sounds like struggling to turn then runs real rough and slow, comes to a complete stop after a while, Fast estimator speed calculations vary wildly during this period too.  Power stage is 3rd party HV. Voltage filter values are consistent with what the instaspin requires but there is no mention for how to filter current feedback signals.

CCS/CC1310: Crypto Functions ROM - NOROM question

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Part Number:CC1310

Tool/software: Code Composer Studio

I want to use the ROM crypto functions for AES encryption/decryption. But somehow the functions still ends up in FLASH as NOROM.

00006728    00000184     driverlib.lib : crypto.obj (.text:NOROM_CRYPTOCcmAuthEncrypt)
000068ac    00000184                   : crypto.obj (.text:NOROM_CRYPTOCcmInvAuthDecrypt)

00008438    000000d4     driverlib.lib : crypto.obj (.text:NOROM_CRYPTOAesCbc)

This is set in the cfg-file

var ROM = xdc.useModule('ti.sysbios.rom.ROM');
if (Program.cpu.deviceName.match(/CC26/)) {
    ROM.romName = ROM.CC2650;
}
else if (Program.cpu.deviceName.match(/CC13/)) {
    ROM.romName = ROM.CC1350;
}

Is there something else that needs to be set?

TL971: The Unit gain bandwidth question for TL971

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Part Number:TL971

Hi team,

The customer has an unit gain bandwidth question for TL971

For the figure 2 of the TL971 datasheet, when Gain is 0dB, the frequency(the blue line) is 12MHZ and the phrase margin (the red line) is 0.

Then 12MHZ is used as the unit gain bandwidth. The  frequency of the input signal cannot be allowed the frequency that the phrase margin is 0.

Unless the system will not be stable.

Is my understanding correct?

Best Wishes,
Mickey Zhang
Asia Customer Support Center
Texas Instruments

About several vulnerabilities of WLAN's WPA2

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Hi

I'm writing to ask about several vulnerabilities of WLAN's WPA2.

In 16/10/2017, Several vulnerabilities of WLAN's WPA2 have been released.

Do you have any measures for several vulnerabilities of BSP and Driver of OMAP4460 Android 4.1 ??

Could you please confirm it ??

Of course, I know that support has ended.

Yours sincerely,

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