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TMS320F280049: on-line flash programming via SCI-A

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Part Number:TMS320F280049

Hello Champs,

Are there any demo codes and application note for on-line flash programming via F28004x SCI-A (not using on-chip bootloader)?

Would you please kindly help? Thanks! 

Best Regards,

Linda


TLK105: effect of common mode filter

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Part Number:TLK105

Dear Specialists,

My customer is considering TLK105 and has a question.

I would be grateful if you could advise.

---

TLK105 sometimes reflect link pulse to TD+/- and hub become false link.

In this case, it is effective to add common mode filter at device side.

It is recommend by design guideline (SLVA531A).

I can't understand why common mode filter is effective.

I think since link pulse is differential, reflected link pulse is also differential.

In the meantime, common mode filter pass through differential signal.

I don't understand the mechanism.

---

I appreciate your great help in advance.

Best regards,

Shinichi

TPS3823: TPS3823 Reset

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Part Number:TPS3823

Dear Sir

My  project used TI TPS3823.

Some issue happened. 

When i download the  code to the MCU, the tps3823 abnormal reset.

When i download the CAN BOOTLOADER, the  tps3823 abnormal reset.

Could you please help to give me some proposal?

Thanks!

RTOS/TI-RTOS: RTOS SDK INSTALL IN CCS6.2

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Part Number:TI-RTOS

Tool/software:TI-RTOS

I have a TMDSICE3359 board and I want to develop app with profinet.But when i install ti-processor-sdk-rtos-am335x-evm-03.03.00.04-Linux-x86-Install.bin into ccs6.2/ccs7.1, a problem popup.

I've tried to make sdk and pdk, but the problem still exists.What should i do?

IWR1443: The bandwidth in distance resolution formula

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Part Number:IWR1443

Hello ,

I have a problem when calculating the distance resolution.What is the bandwidth in the resolution formula?

As shown in the figure,  Is the bandwidth corresponding to the ADC sampling time(tag1) or corresponding to the entire rise time(tag2).

Thank you

AM3352: Power failure reboots

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Part Number:AM3352

We have been trying to figure out a problem with a Sitara AM3352-based design for a weeks without success - problem description and known debugging info so far are provided below. Appreciate it if anyone has any insights, pointers.

Problem description

The basic problem is that the device reboots with a power-on-reset; there is no discernible pattern to the reboots, time between reboots ranges from 30 minutes to 36 hours, over several hundred reboots tested with about 8 units. Kernel panics, software crashes etc. are ruled out as causes, processor reports power-on reset and indeed, as would be seen from the detailed info below, the processor does get a power-on reset.

Design background

The device design is almost exactly the same as the latest production release Beaglebone Black Rev C. Basic design elements:

  • Processor: AM3352BZCZD30
  • PMIC: TPS65217C
  • 4GB eMMC flash
  • 4Gb DDR3-1866 SDRAM
  • USB0 used as OTG port
  • USB1 hooked up to an up-stream hub, which feeds Ethernet and USB host ports
  • TI WiLink based Wifi/BT/GPS module interfaced over SDIO and UART
  • Miscellaneous I2C and serial port peripherals

The system software is Android N.

The AC input to the PMIC is fed from an external regulated 5V supply. The USB input can be provided, but by default the USB power path in the PMIC is disabled. There is no battery (note: I am aware of the VIN brownout issue in the battery-less case with TPS65217, as will be seen below, our problem does not match that scenario).

Power rail configurations of the PMIC are exactly as in the Beaglebone Black.

Detailed debug info

The trace below shows the conditions leading up to the problem.

Channel 1 (yellow):  3.3V rail from LDO4 of the PMIC
Channel 2 (blue): PGOOD signal from PMIC (which gets fed to the processor reset)
Channel 3 (purple): SYS output from the PMIC
Channel 4 (green): 5V AC input to the PMIC

As is seen from the traces, the problem begins with the SYS output dropping linearly from 5V all the way to 1.8V --- along the way the 3.3V LDO of course starts tracking the SYS output since it is fed from it. After dropping to 1.8, there is a kind of shoulder where it dips further below. PGOOD follows this further dip, but still stays high. Eventually (right edge of the trace capture), PGOOD is de-asserted, which resets the processor, after which all rails return to normal, the processor boots again and life goes on.

AC input to the PMIC is solid throughout. 

This is different from the VIN brownout issue addressed in an app note and discussed elsewhere: a) there is no VIN brownout, and b) that issue leads to the PMIC falsely detecting the presence of a battery and not detecting the AC input recovery, thus staying in the OFF state and not recovering without a power cycle. We do not have this issue, the system recovers itself every single time, there is no "lockup."

By default the PMIC power path configuration is: AC enabled, USB disabled, both AC sink and USB sink enabled. The current limit on the AC input is set at maximum 2.5A.

Some points from debugging so far:

  1. There is indirect indication that the AC input current limit is being reached, and current draw demands exceed the 2.5A limit. We can reproduce the same reboot behavior and traces above by putting a large external constant current load on the SYS output which exceeds the 2.5A limit.
  2. Obviously, system consumption under normal conditions is far below, of the order of few hundred mA under normal conditions, so some fault condition triggers this high current demand.
  3. When PGOOD eventually gets de-asserted, and the processor is reset, the condition clears, and the system recovers, so this indicates the fault could be cleared by resetting the processor state. It does not persist.
  4. In our indirect load test, with the load applied between SYS and ground, the SYS output gets driven all the way to ground; however, the above trace in the real devices shows that the SYS voltage drop stops at about 1.8V. Perhaps this indicates a higher voltage rail shorting to 1.8V somehow.
  5. Of course, there is nothing obvious in the design that shorts any power rails together, so any such condition would have to a transient event created in a running system

If any further information, schematic snippets, software/driver details etc are needed on specific questions or areas of the design, I'll be happy to supply.

If anyone has any insights or information on the following questions first, any help is much appreciated:

  • has anyone seen this kind of behavior or has had a similar experience with Beaglebone Black or similar designs?
  • would the above be the expected behavior under the TPS65217 PMIC's AC current limit  conditions?
  • is it reasonable to infer a power rail short from a higher rail into 1.8V from the above behavior?
  • any other pointers inferred from above...

Thanks,

Best regards,
Anand.

 

TPA6211A1-Q1: POP Noise during power on with SD pulled low

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Part Number:TPA6211A1-Q1

Hello,

My customer has a pop noise problem with TPA6211A1 during 5V power up. The background and tests we have done are listed as the following.  

1. Input of TPA6211A1 is single ended and IN- is coupled with PCM5100 with 1uF capacitor and IN+ is connected to ground with 1uF and 20K resistor in series.

2. /SD is alway keep low after 5V start-up.

3. when 5V power is off and turned on after a short within a few sends, we will hear the pop noise, enven the /SD is still low.

4. We do see an unballanced output during 5V power-up and unballanced input.

My questions is that: the output of TPA6211A1 should be high impedance when /SD is pulled low, why there is unballaced output, especially when Vcc exceeds 2.5V? Is there anyway to avoid the pop noise?

Below is the waveform we captured.

TPS23756: TPS23756 PMP6659 program ripple large

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Part Number:TPS23756

10.8-57V POE power supply
Using the ti TPS23756 ,PMP6659 program,
pcb do small, component parameters such as schematic, now the problem is ripple, ripple screenshots in the annex.
Please reply as soon as possible.
Thank you

(Please visit the site to view this file)


RM44L520: GPIO input transition (rise and fall) time requirement question

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Part Number:RM44L520

Hi Champion

A question from customer, from the datasheet, it require input signal Tin_slew within 1ns, then if the RC circuit in the IO input >1ns, what problem will cause?

Thank you!

TMDXEVM3358: Couldn't load Linux image

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Part Number:TMDXEVM3358

Hi there,

I just received 2 units of TMDXEVM and WL1837MODCOM8I. I couldn't boot the system with the given image. I tried it with my colleague's older version (another SD card) and it booted up OK.

Could you please help to verify with the two images? I have attached both in ZIP files with one working, and the other one not. I would like to work with the one compatible with my given hardware, so that I can operate the WiFi module properly.

Thank you.

Best regards,

TeeHowe
Staff Electrical Design Engineer(Please visit the site to view this file)(Please visit the site to view this file)

HD3SS3412: HD3SS3412 / IBIS model

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Part Number:HD3SS3412

Hi, 

Before I asked about HD3SS3412 as below. Have you still had no plan to prepare its IBIS model? Please let me ask your latest situation.

Best Regards,

Satoshi / Japan Disty

TPA3245: Clipping level

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Part Number:TPA3245

Hi,

The clipping behavior described in '9.4.2 Signal Clipping and Pulse Injector' occurs at 83 % output level of PVDD×2 in our customer's TPA3245/PFFB board.

TPA3245/PFFB total gain : 10.2 dB.
PVDD: 21V.
Input level (starting clipping behavior) : 5.4×2 Vp-p

21V×2/(5.4×2Vp-p ×10^(10.2/20))×100 = 83.2%

Our customer thinks it is too early to start the clipping behavior.
Is our customer's TPA3245/PFFB operating correctly?
Does PFFB affect starting voltage level of clipping behavior?

Best regards,

Akio Ito

DS64MB201: SMBus Mode and Pin Mode Question

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Part Number:DS64MB201

Hi, Team

My telecom customer is using DS64MB201 in their base station project.

DS64MB201 datasheet says Control Pins RATE, TXIDELDO, TXIDELSO, FANOUT, SEL0, SEL1, VOD0, VOD1 can work in Both Modes.

If ENSMB is high, can RATE, TXIDELDO, TXIDELSO, FANOUT, SEL0, SEL1, VOD0, VOD1 pins still works?

What happen if SEL0/SEL1 pins setting is different with the SMBus register setting?

Thanks

Kevin Zhang

RTOS/PROCESSOR-SDK-AM437X: Unable to install TI-RTOS

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Part Number:PROCESSOR-SDK-AM437X

Tool/software:TI-RTOS

I have tried with the version of CCS supplied on the product download page (ccs_setup_7.2.0.00013.exe)

software-dl.ti.com/processor-sdk-rtos/esd/AM437X/latest/index_FDS.html

I have also tried with the most recent version of CCS (7.3.0.00019) ... both CCS versions run fine but after i download and run the SDK :(ti-processor-sdk-rtos-am437x-evm-04.01.00.06-Windows-x86-Install.exe) TI-RTOS for AM437x does not appear. Also there are no examples for AM437 (except basic "Hello World") ... nothing in the Resource Explorer.

Am I missing something?

HD3SS3212: HD3SS3212 / IBIS mode and HSpice model

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Part Number:HD3SS3212

Hi,

The customer request us to prepare IBIS model and HSpice model for HD3SS3212. I know that you already uploaded S-Parameter Model in product folder. Do you have IBIS model and HSpice model or plan to prepare them?

Best Regards,

Satoshi / Japan Disty


SN75DP139: Output problem for Vcc: 0V condition

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Part Number:SN75DP139

When SN75DP139's Vcc: 0V condition, TMDS data pin(OUT_D1~OUT_D4) supply voltage, is it no problem?

Is there possible to damage by the wraparound voltage?

Best regards,

Satoshi

TPS65982: Configuration Tool Missing Options

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Part Number:TPS65982

Hello,

For the variable DC-DC, we are doing it the GPIO way according to ‘TPS65982+LM3489 Variable DC-DC Converter for "Power Rules" Voltages’ (SLVA782)

For the TPS65982 software, it looks like there is no ‘default’ firmware that does the ACE GPIO variable DC-DC functionality. I have been attempting to build a simple firmware from the closest baseline firmware design (TPS65982_HD3SS460_DFP) and essentially mimic the ACE GPIO functionality according the above app note.

In the ‘Transmit Source Capabilities, I have set 5 as the ‘Number of Source PDOs’.

  • Source PDO 1: PP_5V, 3A max, 5V voltage, Fixed Source Supply Type
  • Source PDO 2: PP_HV, 3A max, 9V voltage, Fixed Source Supply Type
  • Source PDO 3: PP_HV, 3A max, 12V voltage, Fixed Source Supply Type
  • Source PDO 4: PP_HV, 3A max, 15V voltage, Fixed Source Supply Type
  • Source PDO 5: PP_HV, 3A max, 20V voltage, Fixed Source Supply Type

In the ‘GPIO Event Map’

  • GPIO #0: Source PDO0 Negotiated
  • GPIO #1: Source PDO1 Negotiated
  • GPIO #2: Source PDO2 Negotiated
  • GPIO #3: Source PDO3 Negotiated
  • GPIO #6: Plug Event
    • There is no PDO4 or PDO5

I am going to assume there is a ‘off-by-one’ typo within the program since the dropdown menus don’t exactly match?

Thanks for the help!

Ryan

DS90UB921-Q1: power over coax_921&940

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Part Number:DS90UB921-Q1

hi team,

ds90ub921 and ds90ub940 can both support coax cable according to datasheet. Thus, is power over coax supported if using 921+940 pair?

thanks,

Mike

DAC7718: Calculation for output impedance

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Part Number:DAC7718

Hello E2E,

Please let me know how to calculate for output impedance of DAC7718.
I found it that 0.5-Ω when code = 0x from datasheet.
I want to know output impedance when from 0x000h to 0xFFFh.

Best regards,
ACGUY

LP8860-Q1: LP8860 application questions.

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Part Number:LP8860-Q1

Hi Sir 

1.May we know how to set up Iset? is Iset = (Vbg/(50 * Riset))*1000 ? 

2.For Figure 61, may we konw what is Protection FETs function? May LP8860 can use in 63.9V application?

                                                          Bogey

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