Software and firmware source files for MOST devices that have evaluation kits are available on request.  Firmware source consists of the microprocessor/microcontroller code of the motherboard provided in the evaluation kit.  Software source consists of the User Interface code that runs on the PC; this will be LabVIEW(TM) code (project and VI files).

NOTE:  Firmware is only available for the processors associated with the EVM-PDK platforms.  The -PDK platform for the ADC EVM will support one of the following (depending on the platform):

• TMS320VC5507/9 (MMB0)
• MSP430F449 (MMB3)
• Spartan 3 FPGA (Opal Kelly XEM3010)

NOTE:  The software/firmware is optimized for the associated TI evaluation platforms and therefore may not be well suited to end-equipment applications.

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Hi Bill

I have a question regarding the coil in the BA500212A EVL.

From what I see the GND layer below the coil is exposed and there is some kind of metal plate on top of it and below the ferrite. from what I understand this is some kind of way to connect the ferrite to the GND. 

my questions are:

does this plate is only for conductivity reasons or it has some shielding abilities as well (not transferring the magnetic field to GND)?

why does the ferrite is not directly on the GND?

how did you adhere the ferrite to the plate and the plate to the GND? was it conducting adhesive? which kind?

thanks in advanced,

We have completed our project using TI microcontroller. But it is damaged due to short circuit during pcb design and we are not able to buy a new one.

And now we are not able to complete our project without that microcontroller.

What should we do now?

HI,

DO we need host controller with CC3000 wi fi module?  We want to implement a very simple software application and can we program the cc3000 module directly without using the host contrller ? or Do we have to have a host controller on board ?

please clarify ..

Thanks

Start from installer, TI Resource Explorer, AM3359, Generic Example, Hello Example,

result configured as Cortex M3

with clean install of 5.5.0.00077

TI experts-

We're implementing PCIe outbound transactions using EDMA.  We have C66x-to-host transfers working ok, but we're having trouble with host-to-C66x.  When we use a data test pattern, the initial 50 or so bytes are ok, but then we see repeated bytes.  The point where data starts repeating is not consistent.  For now we're using blocking transfers; i.e. we wait in CPU code for EDMA to complete.

At this point we have some general questions:

  -is there a fundamental difference in EDMA config
   for read vs. write?

  -do we need to use a different EDMA controller for
   read vs. write?  Or just a different channel
   within the same controller?

  -when we run the same code on multiple cores,
   should we assign different groups of cores to
   different EDMA controllers?  If so is there a
   recommended grouping?

If there is already an online document that discusses techniques for optimizing EDMA transfers for PCIe, please let us know.  I've attached a small .c file that has our current EDMA config.  Thanks.

-Jeff
Signalogic

is the maximum size of 7 pages of final report inclusive of self assessment and appendix

Hello,

SETUP: BLE-stack version: BLE-CC254x-1.4.0. Used IAR workbench and programmed using CC-debugger.

PROBLEM: Using SensorTag app on iOS7, I noticed that accelerometer is ranging between about +/- 0.2G. 

FOUND: In hal_acc.c, I noticed HalAccSetRange(HAL_ACC_RANGE_8G). Even when I changed it to *_2G, it did not work. Finally, I moved the range function inside HalAccRead() just before turning on the sensors and it worked. Now my final code looks like this -- 

bool HalAccRead(uint8 *pBuf )
{
...
HalAccSetRange(HAL_ACC_RANGE_2G) // didn't work in HalAccInit()

// Turn on sensor
HalSensorWriteReg(ACC_REG_ADDR_ ...

-----

I didn't see anyone else talking about the same problem. But still I thought of reporting it.

Thanks,

- Aditya

I have an eZ430-RF2500 and MSP430F2274 on it. What I did is:
- connected 3.6864 MHz crystal to XIN XOUT pins
- run a program selecting ACLK outside and sending data via UART

What I get is:
- ACLK frequency is 135kHz all the time
- changing crystal to 4.91C62 also gives me the same 135kHz frequency on ACLK
- set a divider for UART 135kHz / 14 = 9.6 kHz - works and sends data correctly on both crystals.

Why do I get such strange frequencies regardless of crystal value?

Here is my code:

#include "io430.h"

int main( void )
{
  // stop watchdog
  WDTCTL = WDTPW + WDTHOLD;
 

  //select aclk >3MHz
  BCSCTL1 |= BIT6 ;    // shut of  XT2, turn on HF mode
  BCSCTL2 = 0;
  BCSCTL3 |= BIT5 + BIT2; //  HF >3MHz, capacitors = 6pF
 
 
  //GPIO pins
  P2OUT &= ~BIT0;
  P2DIR |= BIT0;            // output
  P2SEL |= BIT0;           // select aclk fctn
  P3SEL |= BIT4 + BIT5; // select TXD i RXD
 
  // UART conf here
  UCA0CTL0 = 0x00;              // should be by default
  UCA0CTL1 |= BIT6;     // select ACLK
  UCA0BR0 = 0x0E;               // SHOULD BE BUT IS NOT 384= 128+256      3.6864MHz / 384 = 9600
  UCA0BR1 = 0;               //    SHOULD BE BUT IS NOT               3.6864MHz / 384 = 9600
 
  UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**

// send data here:

  //while(1)
  //{
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x4D;                // M    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x4F;                // O
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x4E;                // N    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x41;                    // A
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x20;                    // spacja
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x4B;             
        while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x4F;                    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x43;                    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x48;                    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x41;                    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x4D;                    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x20;             
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x43;                    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x49;                    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x45;                    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x21;                    
    while(!(IFG2&UCA0TXIFG));
    UCA0TXBUF = 0x20;                    
        
 // }


 
}

Using CCS 5.5.0.00077 on Windows XP SP3 32-bit with AM335x Starter Kit connected via built in XDS100v2, to debug the Cortex A8.

The 1st attempt to debug after powering-on the AM335x Starter Kit is successfull, is that can download and debug a program on the Cortex A8. If terminate the debug session, when attempt to restart the debug session fails with the following error message:

CortxA8: Error connecting to the target: (Error -1203 @ 0x3D5B) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.340.0)

Ruled out the program being debugged from causing the problem since:
a) Power cycle
b) Launch the selected target configuration without a project
c) Connect to the Cortex A8 (without loading a program) which works
d) Disconnect from the Cortex A8
e) Attempt to connect to the Cortex A8. Fails with:

CortxA8: Error connecting to the target: (Error -1203 @ 0x3D5B) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.340.0)

The last time debugged programs on the AM335x Starter Kit with CCS 5.5, don't recall having this problem, but have since performed CCS 5.5 updates. Therefore, installed CCS 5.5.0.00077 in a clean directory but didn't install any updates. The clean install of CCS 5.5.0.00077, which uses TI Emulators 5.1.232.0 doesn't suffer the problem. i.e. can perform multiple debug sessions without having to power-cycle the AM335x Starter Kit between each debug session.

Whereas using the same workspace/project/target configuration with a CCS 5.5.0.00077 installation with the "latest" updates, which uses TI Emulators 5.1.340.0 have to power-cycle the AM335x Starter Kit after each debug session to avoid getting the "Unable to access the DAP" error.

Therefore, it appears that an update has caused the problem. While CCS maintains a Installation History, I can't get the Eclipse revert function to work. i.e. can't back-out the updates one at a time to see which update introduced the problem.

do you have a wireless eeg program using  MSP430F2013 for transmitter and receiver? 

Hi

I am fairly new to micro controllers.I have been trying to use the pins Xin and Xout for general purposes like interrupts etc.

I have not got them working till  now.I would like to know if the problem is with my code or if its not possible to use them at all.

I have got the other pins working on interrupts.So its not a problem with different interrupt functions being called.

Thanks a lot for your inputs.

I am finalizing quite ambitious commercial audio project and one of its important features is HD audio quality over radio link using CC85xx. It is, however, only possible using 2.1 PCM configuration. For over two years I have lived in belief it is possible using CC85xx as I checked this configuration in PPC.  Now I am ready to testing and it has turned out it is probably not going to work since it is possible on the Master side.as I checked but it has just turned out to my great dissapointment that 2.1 config is not available on the Slave  ... I understand my config, i.e. 2.1 Master to 2.1 Slave is not one of the "use cases" defined by CC's designers. But the bandwidth is there, the firmware modification is slight if any - could you please add 2.1 configuration option to PPC on teh Slave side ? There is already a 2/1 Slave config available that allows to configure 3xPCM16 so the only change is 2.1 output channel instead of 2 out/1 in.

I would also like to remind of my earlier post and question also concerning the 2.1 mode - the user guide discourages from using it - what practical disadvantages or negative impacts I should count with when using it ?

As this issue seems quite straightforward to address while it is quite important for my business success in using  CC85xx chips I would appreciate an answer possibly soon here or even better directly by e-mail off-the-forum.

Thanks, Pawel

Sir,

my video is exceeding the limit of 8 minutes. Its around 10 minutes, but we feel that every part is quite important. So what to do now?

Hi,

I need some help and guidance on DSP core file analysis on Shannon platform (C6678 platform). My problem is I do get these DSP core dump that are generated because the DSP crashes, however I do not have any mechanism to know where and at what point the DSP crashed. 

Since the DSP has 8 cores would it be possible to know at what point the DSP was on each of these cores when the DSP hit an exception or encountered a segmentation fault. Knowing this would help in debugging the issue faster.

I would assume that there would be some capability with CCS where in one could open the core file with the C6678 executable (.out) to know the exact cause of crash and do a back trace (like in gdb).

I would really appreciate if one could share more information on the exact procedure of doing this.

Regards,

Nikhil

 Hello,

I need to do communication between TMS320F28027(master) and MSP430G2553(slave) (both launchpads). I was trying to do communication amongst these mcu's and failed a  lot.. I did not worry, since I thought it's my incompetence, but in the end I noticed one 'error' in program and now I wonder will I be able to do proper communication.

Technical part. This code somehow starts to work in loopback mode (pins are open, but received data arrays shows correct data if I consider just sdata 8 low bits and rdata 8 high bits).

Code is from TI example from 'C:\tidcs\c28\DSP2802x\v126\DSP2802x_examples_ccsv4\spi_loopback_interrupts' and modified accordingly.

// TI File $Revision: /main/3 $
// Checkin $Date: December 17, 2009   14:37:38 $
//###########################################################################
//
// FILE:   Example_2802xSpi_FFDLB_int.c
//
// TITLE:  DSP2802x Device Spi Digital Loop Back with Interrupts Example.
//


#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

// Prototype statements for functions found within this file.
// interrupt void ISRTimer2(void);
interrupt void spiTxFifoIsr(void);
interrupt void spiRxFifoIsr(void);
void delay_loop(void);
void spi_fifo_init(void);
void error();

Uint16 sdata[2];     // Send data buffer
Uint16 rdata[2];     // Receive data buffer
Uint16 rdata_point;  // Keep track of where we are
                     // in the data stream to check received data

void main(void)
 {
   Uint16 i;

   InitSysCtrl();

   InitSpiaGpio();


   DINT;
   IER = 0x0000;
   IFR = 0x0000;

   InitPieCtrl();

   InitPieVectTable();

   EALLOW;    // This is needed to write to EALLOW protected registers
   PieVectTable.SPIRXINTA = &spiRxFifoIsr;
   EDIS;   // This is needed to disable write to EALLOW protected registers

   spi_fifo_init();      // Initialize the SPI only

   for(i=0; i<2; i++)
   {
      sdata[i] = i;
   }
   rdata_point = 0;


   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
   PieCtrlRegs.PIEIER6.bit.INTx1=1;     // Enable PIE Group 6, INT 1
   IER=0x20;                            // Enable CPU INT6
   EINT;                                // Enable Global Interrupts


    for(;;)
    {
         SpiaRegs.SPITXBUF=sdata[0];      // Send data
         sdata[0]++;
         delay_loop();
    }

}

// Some Useful local functions
void delay_loop()
{
    long      i;
    for (i = 0; i < 10000; i++) {}
}

void error(void)
{
    asm("     ESTOP0");     //Test failed!! Stop!
    for (;;);
}

void spi_fifo_init()
{
// Initialize SPI FIFO registers
   SpiaRegs.SPICCR.bit.SPISWRESET=0; // Reset SPI

   SpiaRegs.SPICCR.all=0x0007;       //16-bit character, Loopback mode
   SpiaRegs.SPICTL.all=0x0017;       //Interrupt enabled, Master/Slave XMIT enabled
   SpiaRegs.SPISTS.all=0x0000;
   SpiaRegs.SPIBRR=0x0063;           // Baud rate
 //  SpiaRegs.SPIFFTX.all=0xC022;      // Enable FIFO's, set TX FIFO level to 2
 //  SpiaRegs.SPIFFRX.all=0x0022;      // Set RX FIFO level to 2
   SpiaRegs.SPIFFCT.all=0x00;
   SpiaRegs.SPIPRI.all=0x0010;

   SpiaRegs.SPICCR.bit.SPISWRESET=1;  // Enable SPI

   SpiaRegs.SPIFFTX.bit.TXFIFO=1;
   SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;
}

interrupt void spiRxFifoIsr(void)
{
    Uint16 i;

    rdata[0]=SpiaRegs.SPIRXBUF;        // Read data

    rdata_point++;
    SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1;  // Clear Overflow flag
    SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1;     // Clear Interrupt flag
    PieCtrlRegs.PIEACK.all|=0x20;       // Issue PIE ack
}

BUT if I change this line

SpiaRegs.SPICCR.all=0x0007;     

to

SpiaRegs.SPICCR.all=0x000f;     

Program quits loopback mode.

I need this communication in 8 bit mode, but I don't know how to avoid this problem.

Some working code example would be appreciated.

Hello,

I try to use a module CC1125 with my Ezdsp5535 board.
I have the evaluation module of the CC1125 which i plug into the CC connectors of the EZDSP5535 board.

For the moment i try to port the SPI code below found in "hal_spi_rf_trxeb.c"

/* Pull CS_N low and wait for SO to go low before communication starts */
TRXEM_SPI_BEGIN();
while(TRXEM_PORT_IN & TRXEM_SPI_MISO_PIN);
/* send register address byte */
TRXEM_SPI_TX(accessType|addrByte);
TRXEM_SPI_WAIT_DONE();
/* Storing chip status */
readValue = TRXEM_SPI_RX();
trxReadWriteBurstSingle(accessType|addrByte,pData,len);
TRXEM_SPI_END();

Please answer to the two below questions:

1 ) My first question/remark is for the orange highlighted parts:

The port is configured for SPI but here it read the state of the MISO pin as if it was a GPIO.
So is this good to assume that the input pin register state will be updated and read will be correct? Can i do this (read the input MISO pin state even if it is in SPI mode) with the DSP5535?

2) My second problem is that in the code above
the chip select is  asserted and then it wait that the MISO pin state is low in order to know that the CC is ready for operation.
The problem is that in the EZDSP5535 the chip select for CC board is the hardware chip select 2 of SPI module and so we can not drive it low and wait that a pin go to low state before start transfert.
In datasheet it's say that we can add a delay before start transfert but that's all: "The data delay can be specified from zero to three clock cycles".
So if the delay is not sufficient and that the MISO pin state haven't got the time to go low (CC is not ready), it will fail.
It seem that the SPI module can not be put into 3 wire mode (disable hardware chip select and make a soft chip select with GPIO).

So if someone have already used a CC board with EZDSP5535 can you explain how you do it?

Regards.

Max

Hi all,

One of my customer is using MSP430F5437IPN with external 16MHz crystal for applications, and is asking for the external crystal spec. of F5437. Do we have this kind of document showing customers the min/max voltage of crystal input pin?

Please advise if you have any idea of this, thanks in advance.

Luke Chen

Hi

I Have Queries on TLV320AIC3110 on I2S interface and EMI Filter. Please find below image and suggest your thoughts on this.

Currently iam not using Headphone and Microphone features, so left open, in feature i can use.

I have dome porblems on working I2C in slave interrupt polling mode.

In SPRU877e is Figure 26. Using Interrupts for Slave-Transmitter/Receiver Operation, Repeat Mode (RM = 1).

But is no good comments for this functional.

Can you give me sample of such program?