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UART sample in BIOSPSP not work over C6748LCDK

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Hi, I just used the UART sample in BIOSPSP to test the UART function over the C6748LCDK. My BIOSPSP version is 03.00.01.00.

The problem is that it hangs up in the uartFifoWrite() function over the 'lineStatus'. Now the weird thing is:After I download the uartEcho.out from C6748_StarterWare and execute the programe(this routine works fine!), stop and reload the BIOSPSP UART sample, then the UART sample work smoothly!!

I don't know what was wrong with the BIOSPSP UART sample. It looks as if it missed some forms of initilization that uartEcho routine happens to plug in the gap. Anyone have similar experience???

Z.F Yang

 


EMAC and PHY

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Hi all, 

I'm using Hercules TMS570 kit.  I would like to send few bits of information from one board to another just using EMAC, MDIO and PHY and without using any standard ethernet protocol. I took the PHYdp83640 file from the lwIP example software, to use for my work. But, i don't understand how are the EMAC or the MDIO and PHY connected. Is there any PHY register where i need to copy the data in order to put that into the bus ? 
 Is there any document where i could get detailed information on Ethernet functionality on this device ? 

TPA3110D2 Pout Calculation (Equation 1)

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Hello,

 

I am trying to calculate the numbers in Table 2 based on Equation 1 in the datasheet and I am having a hard time to get the numbers to come out correctly. Am I missing something in this calculation? I could use an example calculation from the table to help me out. Thanks!

SD card file download Problem

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Hi Everyone,

I have got a project that using Concerto F28M35H52C1 board and TIRTOS. The project aims to download a file which is around 27MB from the SD card through http and IP. The webpage is shown in the figure below. When "download" is pressed, file starts to be downloaded from the SD card. However, downloading process always stops at around 5.6MB which is not accomplished. Can anyone help to solve this problem? The CCS code and files on the SD card are attached. Please try it. The steps are listed as below.

1. Unzip the files and copy the two files (index.html and Albatern.csv) into the SD card.

2. Change the program mac setting to your MAC address of the Concerto.

3. After running the program, just type in the IP address: 192.168.2.10 (I am using Firefox)

Many Thanks in Advance!

Ben

(Please visit the site to view this file)(Please visit the site to view this file)

catalog on DLP

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Hi,  i am looking for the wearable computing devices.    by visiting following

http://www.ti.com/lsds/ti/analog/dlp/overview.page,  

I knew the overview of chipset solutions.  however, in this overview, i can not find any of chipsets information related to the web of:  

http://www.dlp.com/pico-projector/pico-product-developers.aspx

e.g. i can not find the detail data sheet on .2" TRP , .3" in example dlp pico chips.  can anyone give me indications? 

many thanks.



SDK 1.1.0.3

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Hi,

we are using SDK 1.1.0.3 Ethercat applictaion on earlier ICE_SCH version.

We are using below listed few GPIO's for other application in our design, But With new schematics ICE_SCH v2.0 GPIO's is observed to be used

Can any one help us out to undersatnd where they are used : As we are using the newer SDK 1.1.0.3  firmware with earlier version of ICE_SCH

GPIO0[14] , GPIO3[20], GPIO1[8] , GPIO0[0] , GPIO0[17]

6) GPIO1[9]

Is it being used in sync0Isr and Sync0task alone?

7) GPIO3[2]

Is it being used to indicte error led in LEDDriveACT0 function alone?

8) GPIO0[7]

FET switching, Is it being used in UTILsInitCpswIcssPorts alone?

9)GPIO0[16]

Is It being used LEDDriveRun alone?

 Regards,

Bindu

 

 

MSP-TS430RGC64C: question on 1.8v external dvio power supply

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Hi.

I have ordered and received MSP-TS430RGC64C & MSP-FET430UIF along with MSP430F5229 uC.

After installing CCS Version:5.5.0.00077, I connected MSP-TS430RGC64C to the USB port through MSP-FET430UIF. 

Then, I could see the famous “MSP430: Error connecting to the target: Unknown device” error.

According to several threads regarding this issue, the problem seems to be a hardware/connection issue.  

By the way, there was the following note which came with the product.

************************

Important: For correct JTAG connection, programming, and debug operation, it is important to follow this

procedure:

 1. Make sure that the VCC and DVIO voltage supplies are OFF and that the power rails are fully

discharged to 0 V.

2. Enable the 1.8-V external DVIO power supply.

3. Enable the 1.8-V to 3.6-V VCC power supply (alternatively, this supply can be provided from the MSPFET430UIF

JTAG debugger interface).

4. Connect the MSP-FET430UIF JTAG connector to the target board.

5. Start the debug session using IAR or CCS IDE.

 *********************************************

The user-guide also says that "This development platform does not supply the 1.8-V DVIO rail on board and it MUST be provided by external power supply for proper device operation".  

So, does "step 2" mean that “I need to provide 1.8V from an additional power supply through additional power cable”?

Thank you.  

BLE SDK 1.4 with IAR 8.10?

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Hi TI, Can I still use IAR version 8.10 to compile codes with BLE SDK 1.4? I really don't have money to buy a new compiler. --YC


Actual GPMC XIP Timing on EVM is different from TRM.

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Hello.
I measured GPMC XIP Timing on TMDXEVM3358.
The /CS0 wave is different from TRM definition.

Question:
 - I think tCEon = 0.
   How do you think about this? (Is this typo of TRM?)

 - How do you think about 6nsec delay existing on the /CS0?

my setting is :
  SYSBOOT[15:0] = 0100000100011010b

TRM description:

Actual wave:

Best regards, RY

 

Update to CCS 5 Emulation package causes "Unable to access the DAP" on 2nd attempt to connect to AM3358 Cortex A8

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Using CCS 5.5.0.00077 on Windows XP SP3 32-bit with AM335x Starter Kit connected via built in XDS100v2, to debug the Cortex A8.

The 1st attempt to debug after powering-on the AM335x Starter Kit is successfull, is that can download and debug a program on the Cortex A8. If terminate the debug session, when attempt to restart the debug session fails with the following error message:

CortxA8: Error connecting to the target: (Error -1203 @ 0x3D5B) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.340.0)
Once this error has occured, the only way to clear it is to power-cycle the AM335x Starter Kit.

 

Ruled out the program being debugged from causing the problem since:
a) Power cycle
b) Launch the selected target configuration without a project
c) Connect to the Cortex A8 (without loading a program) which works
d) Disconnect from the Cortex A8
e) Attempt to connect to the Cortex A8. Fails with:

CortxA8: Error connecting to the target: (Error -1203 @ 0x3D5B) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.340.0)
f) have to power-cycle to be able to connect to the Cortex A8 again

 

The last time debugged programs on the AM335x Starter Kit with CCS 5.5, don't recall having this problem, but have since performed CCS 5.5 updates. Therefore, installed CCS 5.5.0.00077 in a clean directory but didn't install any updates. The clean install of CCS 5.5.0.00077, which uses TI Emulators 5.1.232.0 doesn't suffer the problem. i.e. can perform multiple debug sessions without having to power-cycle the AM335x Starter Kit between each debug session.

Whereas using the same workspace/project/target configuration with a CCS 5.5.0.00077 installation with the "latest" updates, which uses TI Emulators 5.1.340.0 have to power-cycle the AM335x Starter Kit after each debug session to avoid getting the "Unable to access the DAP" error.

Therefore, it appears that an update has caused the problem. While CCS maintains a Installation History, I can't get the Eclipse revert function to work. i.e. can't back-out the updates one at a time to see which update introduced the problem.

Bluetopia--unable to initialize stack

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I've ported the Bluetopia Bluetooth stack to a project board.  I've based my port on the SPP demos provided with the SDK.  When my code calls the function BSC_Initialize, the return value is -14.  Looking at the BluetopiaCoreAPI.pdf document, I don't see a corresponding error code for this result.


Can someone help?

Thanks.

How to debug or what resource to check when DSP/BIOS failed to run?

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Hi:

 I use OMAPL137, which contains ARM926 running Linux and C6747 running DSP/BIOS program. The DSP/BIOS program is very simple: It contains main, idle function and two timer function, After init some data in main function, it returns idle function and timer function will toggle LEDs as I expected. 

 I then modify the DSB/BIOS program by insert a "arm clock off" function in the main function, try to turn off the Linux so it will behavior like a single C6747 chip.

The "arm clock off function follows the description  on the page : "section 10.6.2 ARM subsystem clock OFF", SPRUH92, "OMAPL137 Technical Reference Manual". all match the manual, I got ack from Linux. But after the "arm off" function, after main function return, the idle and timer no longer toggle LEDs.

 It seems some resources or registers, timers are abnormal after arm off. Can some one tell me what/how to check to see why DSP/BIOS not working?

LMC6081 & LMC6001 gain queries

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I am having trouble with a design which uses either the LMC6001 or the LMC6081 and I have a suspicion that the magnitude of the problem may relate to the value of the open loop gain.I have questions about the gain figure quoted in both the LMC6001 & LMC6081 data sheets.

The LMC6081 datasheet gives a headline voltage gain figure of 130dB in the "Features" section of the front page. The detailed specification gives a number of figures for large signal gain under different conditions, but the highest of these is 1400 V/mV; equivalent to 123dB. Looking at figure 8, I guess the discrepency is because the gain carries on increasing as the load impedance rises above 2k, but under what condition is the 130dB figure appropriate?

Both data sheets give a significantly  higher gain when sourcing current than when sinking current. The difference is around a factor of 4. The notes state that the tests were carried out with a single supply configuration (15V) with the "sourcing current" figure applying when Vout > 7.5V and "Sinking current" when Vout < 7.5V. In my circuit, the output is used to drive a PNP transistor gain stage, so it is always sinking current whatever the output voltage happens to be. Should I then apply the current sinking gain figure even when the output voltage is > 7.5V? Could I get a higher open loop gain if I included a high value dummy load down to 0V so that the output was always sourcing current? Is this change in open loop gain depending on the direction of current flow reflected in the SPICE models?

CAN TX RX code using sys bios HWI

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can anybody post sample example of CAN TX RX based on sysbios HWI .

Regards

Newbee

LP8556 driving 12x3 array or IRLEDs

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Is the LP8556 suitable to drive an array of 12x3 IRLEDs, using the Vishay VSMY2850RG LED?


MSP430F5528 Errata PMM17

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I'm checking errata list for MSP430F5528, and PMM17 description seems not specific enough. The accumulation of Vcore occurs when MSP is switching between active and LPM2/3/4 mode at very high frequency.  Could anyone please clarify what very high frequency would be?  I have a few old units running with revE switching between LPM-AM-LPM at 128Hz (periodic interrupt), and wonder if that could be affected by this errata.

Thank you,


Loc Pham

http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=slaz313&fileType=pdf

CCS 4 and 5 producing bigger memory loads

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CCS v 4 &5 produce loads much bigger than v3. Removed the math function pow and flash went unused 468H(1112D) to 2E70H(11,888D). It all had to do with removal of the eabi.lib functions which were included by the compiler due to two usages of the pow function in the code.

Look at your memory map in the text printout for the amount of memory used by each module.

Audio sample of BIOSPSP cannot run @456MHz clock rate

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Hi, Just test the function of audio sample of BIOSPSP(03.00.01.00) over the C6748LCDK. I found it CANNOT work at 456MHz maximimum clock rate (It stuck in the GBLCTL setting loop) and I want to know is that normal?

If that is the case, then what is the workaround over this problem? Thanks in advance!

Z.F.Yang 

 

drv 102

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I am using DRV 102 IC for power conservation purpose in coil. specification for coil 24 Vdc, current 1.88A,

When I connect output terminal of IC to coil then IC  is heated but when i removed coil from this terminal then IC is not heated.Please any help me on this issue.

Is this happening because of common ground path for supply and coil?

Implementing the blank flash memory

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Hi there.

I have a question about boot-up of DLPC350. I am considering that implementing the blank flash memory to the original target board. I would like to program the DLPC350 firmware to blank flash after it has been implemented. Is it allowed?

My understanding is: DLP350 has a internal mask ROM, and it will support program to blank flash. Is it correct?

Best regards, Masa

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